)]}'
[{"id":"openocd~master~Iea58cd3880d89e927d10113649d9a63f146f6368","project":"openocd","branch":"master","hashtags":[],"change_id":"Iea58cd3880d89e927d10113649d9a63f146f6368","subject":"tcl: interface: usb-jtag: clarify Xilinx cables support","status":"NEW","created":"2018-01-18 08:29:22.000000000","updated":"2018-01-30 09:22:07.000000000","submit_type":"CHERRY_PICK","mergeable":true,"insertions":2,"deletions":2,"total_comment_count":0,"unresolved_comment_count":0,"has_review_started":true,"meta_rev_id":"f9377a1a1c6cb06d32ac97a680ec19195e315cb9","_number":4353,"owner":{"_account_id":1000160},"requirements":[],"submit_records":[{"rule_name":"gerrit~DefaultSubmitRule","status":"NOT_READY","labels":[{"label":"Verified","status":"OK","applied_by":{"_account_id":1000014}},{"label":"Code-Review","status":"REJECT","applied_by":{"_account_id":1000160}}]}]}]
