)]}'
{"tcl/target/stm32l4x.cfg":[{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"951442e44443e4b914704b65fe64e15be386aea3","unresolved":false,"context_lines":[{"line_number":84,"context_line":"\t# Configure system to use MSI 24 MHz clock, compliant with VOS default (2)."},{"line_number":85,"context_line":"\t# 3 WS compliant with VOS\u003d2 and 24 MHz."},{"line_number":86,"context_line":"\tmww 0x40022000 0x00000102   ;# FLASH_ACR \u003d PRFTBE | 3(Latency)"},{"line_number":87,"context_line":"\tmww 0x4002100C 0x00000099   ;# RCC_CR \u003d MSI_ON | MSIRGSEL| MSI Range 10"},{"line_number":88,"context_line":"\t# Boost JTAG frequency"},{"line_number":89,"context_line":"\tadapter_khz 4000"},{"line_number":90,"context_line":"}"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"a9f3a1e8_75428043","line":87,"range":{"start_line":87,"start_character":5,"end_line":87,"end_character":15},"updated":"2016-05-18 07:28:30.000000000","message":"RCC_CR address is 0x40021000","commit_id":"b0c25aa71a7a06132025bbb8e5377d01c989fdef"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"7c204c698eab82bf730b5bda4b4164e432f959ab","unresolved":false,"context_lines":[{"line_number":64,"context_line":"#"},{"line_number":65,"context_line":"# Note that there is a pretty wide band where things are"},{"line_number":66,"context_line":"# more or less stable."},{"line_number":67,"context_line":"# For SWD, Tomas Vanek reported success up to adapter_khz 0.8 * HCLK"},{"line_number":68,"context_line":"adapter_khz 500"},{"line_number":69,"context_line":""},{"line_number":70,"context_line":"adapter_nsrst_delay 100"}],"source_content_type":"text/x-ttcn-cfg","patch_set":3,"id":"a9f3a1e8_98b759f4","line":67,"range":{"start_line":67,"start_character":2,"end_line":67,"end_character":68},"updated":"2016-05-24 19:48:16.000000000","message":"I would prefer a pointer to this changeset - there are more details in discussion","commit_id":"0b1e2a478dfcfbb458255ef016d7d96756ea51ca"}]}