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{"id":"openocd~master~I24df7c065afeb71c11c7e96de4aa9fdb91845593","project":"openocd","branch":"master","hashtags":[],"change_id":"I24df7c065afeb71c11c7e96de4aa9fdb91845593","subject":"Flash driver for STM32G0xx and STM32G4xx","status":"MERGED","created":"2018-12-16 17:52:52.000000000","updated":"2020-03-16 15:25:10.000000000","submitted":"2020-03-16 15:25:10.000000000","submitter":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"total_comment_count":30,"unresolved_comment_count":0,"has_review_started":true,"submission_id":"4807-1584372310854-039402ce","meta_rev_id":"a43b9571b20f0be3d0c0df6e8253a74e89da7acf","_number":4807,"owner":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"actions":{},"labels":{"Verified":{"approved":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"all":[{"value":0,"_account_id":1001559,"name":"Bob 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Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"reviewer":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"state":"REVIEWER"}],"messages":[{"id":"591618fc66f16177c5a24b6b3d4b639944bed905","author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"real_author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"date":"2018-12-16 17:52:52.000000000","message":"Uploaded patch set 1.","accounts_in_message":[],"_revision_number":1},{"id":"dc05603bbfe5e12598d7dc27667346b4adfac7d9","author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"real_author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"date":"2018-12-16 18:30:47.000000000","message":"Patch Set 1: Verified+1\n\nBuild Successful \n\nhttp://build.openocd.org/job/openocd-gerrit/10926/ : SUCCESS\n\nhttp://build.openocd.org/job/openocd-gerrit-build/10276/ : SUCCESS","accounts_in_message":[],"_revision_number":1},{"id":"3861eab71bd2228b34def7ce96023e536d2e70c3","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2018-12-18 12:07:23.000000000","message":"Patch Set 1: Code-Review-1\n\nAndreas, the functional changes of the code look good.\nBut there is also lot of refactoring changes:\n- it makes a review much more complicated\n- some of them are IMHO a step back: I know you are a big fan of bit-shift operator, but why did you change the readable code with register bits defined as masks to much worse looking numerous (1UL \u003c\u003c xx)?\nMoreover, bit masks are used consistently in all STM32 flash drivers. Are you going to change them all?","accounts_in_message":[],"_revision_number":1},{"id":"d5ead94922c390f0e7a0bfc1fa0a9b232349d991","author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"real_author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"date":"2018-12-18 12:52:54.000000000","message":"Patch Set 1:\n\nThat\u0027s an unpleasant effect, no doubt. In assembly files somestimes the bit numbers are necessary. To get the mask from the bit number is simple, but the other way round ...\n\nOn the other hand defining bit numbers in some cases but bitmasks in other cases in the header files creates a real mess.\n\nSame problem for the base address vs. register offsets.\n\nThe only other options I see would be to have extra definitions in the assembler sources (as it was before) or both \u0027bit\u0027 and \u0027mask\u0027 definitions in the header file. Only four are needed in the assembler file, that\u0027s maybe be a bit pedantic to care about \"single source of information\" here.  \n\nIf there is a strong objection to this change, I don\u0027t mind to revert that part. As I already came across the very same problem in spi.h I thought it might be a good idea to simplify that.","accounts_in_message":[],"_revision_number":1},{"id":"31d3575e6b97951d09b3db751cd01ceea84cb429","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2018-12-18 13:35:49.000000000","message":"Patch Set 1:\n\n\u003e In assembly files somestimes\n \u003e the bit numbers are necessary. To get the mask from the bit number\n \u003e is simple, but the other way round ...\n\nYes, sometimes. I know it and the first thing I checked was the asm loader. I found just (1 \u003c\u003c FLASH_PG) and (0 \u003c\u003c FLASH_PG), so no real need for a bit number...\n\n \u003e On the other hand defining bit numbers in some cases but bitmasks\n \u003e in other cases in the header files creates a real mess.\n\nAgreed. It is not a long time ago I reviewed http://openocd.zylin.com/4641\n\n \u003e Same problem for the base address vs. register offsets.\n\nI did not complain about register offsets. They are clearly distinguished by _OFFS postfix and do not require an extra parenthesis. Of course it would be nicer to have refactoring as one change and the new code as the second but I think I can overcome it for you.","accounts_in_message":[],"_revision_number":1},{"id":"521a52ff3c6cc44343e76a235af10d620f159dc9","author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"real_author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"date":"2018-12-18 19:37:07.000000000","message":"Patch Set 1:\n\nOh, the starting point was the \"lsrs r7, r6, #FLASH_BSY+1\" as the BSY mask didn\u0027t fit into signed 8-bit immediate.","accounts_in_message":[],"_revision_number":1},{"id":"ccd4adab860412a462137d3cf153ed2a8de629a7","author":{"_account_id":1000005,"name":"Andreas Fritiofson","email":"andreas.fritiofson@gmail.com","username":"Nattgris"},"real_author":{"_account_id":1000005,"name":"Andreas Fritiofson","email":"andreas.fritiofson@gmail.com","username":"Nattgris"},"date":"2019-04-26 07:14:54.000000000","message":"Patch Set 1:\n\n(1 comment)\n\nI think the better option here is to repeat the necessary definitions in the assembler file; relying on a C-header for the functionality of an assembler file that is not rebuilt as part of a normal build cycle is bound to break silently when the C-driver is refactored.","accounts_in_message":[],"_revision_number":1},{"id":"529958c9d0a96b704fbefbb8bb8778accfaa3278","author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"real_author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"date":"2019-04-28 12:50:44.000000000","message":"Patch Set 1:\n\n(1 comment)\n\nAlthough it might seem pedantic I would strictly adhere a \"single point of information\" idea as far as easily possible. Ok, there are just 5 definitions here, but ... Yes, it might break if the C sources are touched, but that\u0027s the case anyway, e. g. register usage is not shared across sources. So whoever touches these drivers must be well aware of the implications on the assembler parts, rebuild and test them even if the\u0027re not build automatically.","accounts_in_message":[],"_revision_number":1},{"id":"564b984a1d144b6a3c99d88bf5feb249cdeadb3f","author":{"_account_id":1000005,"name":"Andreas Fritiofson","email":"andreas.fritiofson@gmail.com","username":"Nattgris"},"real_author":{"_account_id":1000005,"name":"Andreas Fritiofson","email":"andreas.fritiofson@gmail.com","username":"Nattgris"},"date":"2019-04-30 08:24:17.000000000","message":"Patch Set 1: Code-Review-1\n\n(2 comments)\n\nThe point of \"single point of information\", which I very much subscribe to in general, is to make sure different parts are in sync, in particular if and when the definitions need to change. In this case the register definitions will never change as they are set in stone (silicon). Also, they do not necessarily need to be in sync since they are not part of the shared interface between the assembler and C code; the fifo is the interface with its register allocation and behaviour.\n\nMy point was that a simple C-level reorganization/rename will break the assembler, even if you don\u0027t touch the flash loader interface.\n\nI don\u0027t particularly mind the reorganization you\u0027ve made to the #defines, but they do make the diff a bit tl;dr.","accounts_in_message":[],"_revision_number":1},{"id":"5f2dafebc409afe683a4e5ef710b427ef8fcbcf6","author":{"_account_id":1001559,"name":"Bob Anderson","email":"rea952@gmail.com","username":"CInsights"},"real_author":{"_account_id":1001559,"name":"Bob Anderson","email":"rea952@gmail.com","username":"CInsights"},"date":"2019-06-10 06:30:33.000000000","message":"Patch Set 1:\n\nJust checking on status of this patch. G0 is being implemented in ChibiOS and updated openocd is next requirement.","accounts_in_message":[],"_revision_number":1},{"id":"14ff6ce1bfcb8bbca72dab9960ac5a99ef92e9c2","author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"real_author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"date":"2019-06-29 14:44:08.000000000","message":"Patch Set 1:\n\n(1 comment)\n\nI don\u0027t see your argument re. the include: First, it\u0027s matter of perspective. If you consider the current status, your\u0027re probably right that no change will be required in future. But if you start with an empty file, the definitions have to be changed (i.e. created in the first instance). Second, if it\u0027s absolutely certain nothing will ever be changed in the future, there will never be any reason for rebuilding the binary from the assembler file either. \nThe binary (or more precisely the C-array) is a blob checked in with the sources, the build system doesn\u0027t include any provision for rebuilding the loaders (this would require all assemblers etc. for various architectures and precisely specified versions thereof, not very useful). So the sources are just comments and consequently it\u0027s rather pointless to worry about path reorganization.","accounts_in_message":[],"_revision_number":1},{"id":"51181f792ddfa2494030bd3fb153f119fa28af42","author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"real_author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"date":"2019-06-29 19:27:45.000000000","message":"Uploaded patch set 2.","accounts_in_message":[],"_revision_number":2},{"id":"434cfc12b4bfcc3c187b1823233280f18a9c5c26","author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"real_author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"date":"2019-06-29 20:10:28.000000000","message":"Patch Set 2: Verified+1\n\nBuild Successful \n\nhttp://build.openocd.org/job/openocd-gerrit/11945/ : SUCCESS\n\nhttp://build.openocd.org/job/openocd-gerrit-build/11256/ : SUCCESS","accounts_in_message":[],"_revision_number":2},{"id":"397f4ecfbf60c081096e83b1bdc6eea6ce65386b","author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"real_author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"date":"2019-08-23 09:08:07.000000000","message":"Uploaded patch set 3.","accounts_in_message":[],"_revision_number":3},{"id":"fc01120d178e571d8b7a0082a5102d9837fe6d9c","author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"real_author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"date":"2019-08-23 09:46:56.000000000","message":"Patch Set 3: Verified+1\n\nBuild Successful \n\nhttp://build.openocd.org/job/openocd-gerrit/12041/ : SUCCESS\n\nhttp://build.openocd.org/job/openocd-gerrit-build/11350/ : SUCCESS","accounts_in_message":[],"_revision_number":3},{"id":"52b748ece92bf38bd9a8ebfc14653591b35a326e","author":{"_account_id":1000859,"name":"Karl Palsson","email":"karlp@tweak.au","username":"karlp"},"real_author":{"_account_id":1000859,"name":"Karl Palsson","email":"karlp@tweak.au","username":"karlp"},"date":"2019-09-01 21:31:31.000000000","message":"Patch Set 3:\n\n(4 comments)\n\nminor style comments.","accounts_in_message":[],"_revision_number":3},{"id":"46fd21bfe5d6d9942e11ba23ecefa859bfcf2038","author":{"_account_id":1001631,"name":"Guillaume Revaillot","email":"guillaume@ppp0.dev","username":"grevaillot"},"real_author":{"_account_id":1001631,"name":"Guillaume Revaillot","email":"guillaume@ppp0.dev","username":"grevaillot"},"date":"2019-09-03 13:16:56.000000000","message":"Patch Set 3:\n\n(1 comment)\n\nmww looks wrong.","accounts_in_message":[],"_revision_number":3},{"id":"b7492ad999541ea69a0a886d2156b675897749a1","author":{"_account_id":1001036,"name":"Andreas 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Set 4: Verified+1\n\nBuild Successful \n\nhttp://build.openocd.org/job/openocd-gerrit/12138/ : SUCCESS\n\nhttp://build.openocd.org/job/openocd-gerrit-build/11446/ : SUCCESS","accounts_in_message":[],"_revision_number":4},{"id":"9382663f95447fd56f3c89cd325349fe04d5d280","author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"real_author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"date":"2019-10-17 14:50:23.000000000","message":"Uploaded patch set 5: Patch Set 4 was rebased.","accounts_in_message":[],"_revision_number":5},{"id":"1ded34843723737cd351b64e82e3dd8d16ab15c9","author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"real_author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"date":"2019-10-17 15:10:10.000000000","message":"Patch Set 5: Verified+1\n\nBuild Successful \n\nhttp://build.openocd.org/job/openocd-gerrit/12148/ : SUCCESS\n\nhttp://build.openocd.org/job/openocd-gerrit-build/11456/ : SUCCESS","accounts_in_message":[],"_revision_number":5},{"id":"51b8b77528a53a5eaff2a3bf953e18b3cc9d67a0","author":{"_account_id":1001559,"name":"Bob Anderson","email":"rea952@gmail.com","username":"CInsights"},"real_author":{"_account_id":1001559,"name":"Bob Anderson","email":"rea952@gmail.com","username":"CInsights"},"date":"2019-12-01 09:47:15.000000000","message":"Patch Set 5:\n\nTested OK with ChibiOS on STM32G071RB-NUCLEO.\nSuggest adding st_nucleo_g0.cfg and st_nucleo_g4.cfg to the board scripts.\n\u003c\u003c\nsource [find interface/stlink.cfg]\n\ntransport select hla_swd\n\nsource [find target/stm32g0x.cfg]\n\nreset_config srst_only\n\u003e\u003e","accounts_in_message":[],"_revision_number":5},{"id":"101de0e58e5a85aaaecae46d1cd1bce6c94f93e0","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2019-12-13 16:46:43.000000000","message":"Patch Set 5:\n\nAndreas, it\u0027s sad that this change delayed almost a year.\nIn the meantime Tarek submitted http://openocd.zylin.com/4932\nand others in his series. #4932 prepared the driver for easier\ninserting of new devices. Could you please consider rebasing G0/G4\nchange on top of #4932 (precisely on top of #5358)?\n\nIf you feel that register bit masks have to be changed to bit positions, please do it in a separate change and use BIT() macro from src/helper/bits.h instead of \u003c\u003c operator.\n\nPadding in the target loader seems me as a real overkill. Since\nhttp://openocd.zylin.com/4399\nthe flash infrastructure handles padding and the only thing to do in the driver code is setting two variables:\n\n  bank-\u003ewrite_start_alignment \u003d bank-\u003ewrite_end_alignment \u003d 8\n\nNow I have both G0 and G4 devices so I can test the change quickly.\nThanks!","accounts_in_message":[],"_revision_number":5},{"id":"d1f0caad544ffb0af313bead7b5124b4943eaacc","author":{"_account_id":1001735,"name":"Patrick Elsen","username":"xfbs"},"real_author":{"_account_id":1001735,"name":"Patrick Elsen","username":"xfbs"},"date":"2019-12-14 23:40:17.000000000","message":"Patch Set 5:\n\nHey, I tested this changeset with\n\nhttp://openocd.zylin.com/#/c/5320/2\napplied on master, and I was able to run openocd and debug a Nucleo-G071RB with the following board config:\nhttps://pastebin.com/ZUwxhJWB","accounts_in_message":[],"_revision_number":5},{"id":"37aa2c7089cc52fe48cfa4edba27c8a8197d7185","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2019-12-15 11:02:42.000000000","message":"Patch Set 3:\n\n(1 comment)","accounts_in_message":[],"_revision_number":3},{"id":"7310a082cd09aff4c54ac173af3fc4a34dd276e3","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2019-12-18 10:00:18.000000000","message":"Patch Set 5:\n\nAndreas B, according to G4 ref man a cat 3 device with flash 256kB or less in dual bank mode has a gap in addressing between banks.\nCan you confirm or deny it? If it is true, this mode cannot be supported by the existing driver where whole flash is implemented as a single OpenOCD bank.","accounts_in_message":[],"_revision_number":5},{"id":"31204ebcf7351625c77d8104f464f47e76b26023","author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"real_author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"date":"2019-12-18 11:10:39.000000000","message":"Patch Set 5:\n\nRe. dual bank in G4: That\u0027s totally unclear. Although RM0440, Rev. 2, mentions 256kB and 128kB devices, table 7 isn\u0027t very specific, no footnote (as in the RMs of other devices) regarding the available pages for the \"smaller\" devices. And I\u0027ve got only some G474 with 512kB. Apparently the smaller variants aren\u0027t in stock at the usual distributors either ...\nBut even if there is a actually a gap, this must be handled by some hack in this driver: two separate banks are not feasible, as the single/dual can be switched dynamically.","accounts_in_message":[],"_revision_number":5},{"id":"bc0bea86c70defbde31f8d9cb625651c54beda1a","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2019-12-18 11:51:41.000000000","message":"Patch Set 5:\n\n\u003e Re. dual bank in G4: That\u0027s totally unclear.\n\nAgreed.\n\n \u003e But even if there is a actually a gap, this must be handled by some\n \u003e hack in this driver: two separate banks are not feasible, as the\n \u003e single/dual can be switched dynamically.\n\nWell, in case of opt change and OBL_LAUNCH the flash bank should be re-probed anyway. And yes, working with multiple OpenOCD banks on one device is real hell - I remember the work on kinetis driver. But there is no easy hack to add a gap into a bank - the flash infrastructure always regards the gap as a real flash.\nThe simplest safe solution seems me to limit a small flash dev in dual bank mode to the first bank only and warn the user. Or be more adventurous, try 2nd bank as is and warn the user too. If someone wants to use the second bank then he can at least report us the layout of flash banks.","accounts_in_message":[],"_revision_number":5},{"id":"1dec1abc4cb2b24007edfd71dbc15d4bb1e6a3ef","author":{"_account_id":1001559,"name":"Bob Anderson","email":"rea952@gmail.com","username":"CInsights"},"real_author":{"_account_id":1001559,"name":"Bob Anderson","email":"rea952@gmail.com","username":"CInsights"},"date":"2019-12-18 21:57:46.000000000","message":"Patch Set 5:\n\nRegarding gap between banks. RM0440 looks quite specific in showing the base address of bank2 in table 7 as being 0x0804 0000 for all of the memory sizes (512/256/128 KB) in dual bank organization.","accounts_in_message":[],"_revision_number":5},{"id":"1d95c1bff926769855ef7586ddde5e0096e790cc","author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"real_author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"date":"2020-01-07 15:34:15.000000000","message":"Patch Set 5:\n\nWell, no, although the start address seems to be fixed regardless of the total bank size, the rest of the table has no explicit description of the flash layout for the smaller sizes, cross check with e.g.\nRM0432 (L4Rxx, L4Sxx) and RM0394 (L41xx ...).\nBut nonetheless, there is now definite information:\nhttps://community.st.com/s/question/0D70X000007QFCN/flash-layout-of-stm32g4xx-cat-3-with-less-than-512-kbyte-missing-in-rm0440?s1oid\u003d00Db0000000YtG6\u0026s1nid\u003d0DB0X000000DYbd\u0026emkind\u003dchatterCommentNotification\u0026s1uid\u003d0050X000007vtKG\u0026emtm\u003d1578408609398\u0026fromEmail\u003d1\u0026s1ext\u003d0","accounts_in_message":[],"_revision_number":5},{"id":"d2fccc92efa4a6797e79b77ac7f1a3946dae9c29","author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"real_author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"date":"2020-01-19 18:25:11.000000000","message":"Uploaded patch set 6.","accounts_in_message":[],"_revision_number":6},{"id":"a6a77545c44605ae74cd3879fbf37632d434b09c","author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"real_author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"date":"2020-01-19 18:59:11.000000000","message":"Patch Set 6: Verified+1\n\nBuild Successful \n\nhttp://build.openocd.org/job/openocd-gerrit/12390/ : SUCCESS\n\nhttp://build.openocd.org/job/openocd-gerrit-build/11692/ : SUCCESS","accounts_in_message":[],"_revision_number":6},{"id":"d3b934204a466df39cdb78e3ea3e84fd085091a5","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2020-01-20 00:07:54.000000000","message":"Patch Set 6: Code-Review-1\n\n(2 comments)","accounts_in_message":[],"_revision_number":6},{"id":"7e130441df9218ff93976f21b249a4b1ca71549d","author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"real_author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"date":"2020-01-20 17:27:35.000000000","message":"Patch Set 6:\n\n(2 comments)\n\nAs the flash loader needs to access only FLASH_SR and FLASH_CR, it would be rather simple to supply these two addresses via one additional register instead of base and hardcoded offsets, hence extension to cover L5 would not be not complicated. \n\nSo, #5386 on top of this or separate. Opinions?","accounts_in_message":[],"_revision_number":6},{"id":"63178c28494fb61b93c141f8d970d89bcdca0989","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2020-01-29 10:32:36.000000000","message":"Patch Set 6:\n\n(1 comment)\n\n\u003e So, #5386 on top of this or separate. Opinions?\nI think this change goes first, I\u0027m saying that because STM32G0 and G4 are older, and we will be glad to have it merged soon.\nThen the owner of #5386 have to worry about register offsets for STM32L5.","accounts_in_message":[],"_revision_number":6},{"id":"16b10bdd6233b74d8ed7deab7c97a7011bdabf22","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2020-01-29 11:10:39.000000000","message":"Patch Set 6:\n\n(1 comment)\n\nThis change now has the priority - L5 support #5344 and better support of WRP areas #5395 will wait.\n\nAndreas, I understand that you added the manual flash size override as a test tool for emulating small flash devices we don\u0027t have - for this purpose it must be as is. Tarek\u0027s proposal to split out this functionality to another patch seems reasonable but IMO it should not be blocker.","accounts_in_message":[],"_revision_number":6},{"id":"7f34539245ca5f303b38b58d3cc15a0a3c2996f3","author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"real_author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"date":"2020-01-29 21:11:42.000000000","message":"Uploaded patch set 7.","accounts_in_message":[],"_revision_number":7},{"id":"b86fa5ee69573dcd9a9716ea8e213f7db9ddd3aa","author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"real_author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"date":"2020-01-29 21:42:16.000000000","message":"Patch Set 7: Verified+1\n\nBuild Successful \n\nhttp://build.openocd.org/job/openocd-gerrit/12445/ : SUCCESS\n\nhttp://build.openocd.org/job/openocd-gerrit-build/11746/ : SUCCESS","accounts_in_message":[],"_revision_number":7},{"id":"8bef3b48917506c96e2883c13b81c6fba429f003","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2020-02-13 22:41:05.000000000","message":"Patch Set 7:\n\nAndreas, I tested with Nucleo G474RE in dual bank mode.\nFlash probe/write/erase/protect works.\nstm32l4_protect_check() does not work as G4 has only 6 valid bits in WRP option regs and the 7th bit reads as one.","accounts_in_message":[],"_revision_number":7},{"id":"993a0184a526891f0c116f29258faa09441b6f1a","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2020-02-18 19:17:28.000000000","message":"Patch Set 7:\n\n\u003e Are you sure about 6 bits? On G474RE I see default 0xFF80FFFF...\n\nMy bad of course. I meant bits 0..6 are valid and bit 7 reads as one.\n\n\u003e But on G431RB default 0xFFC0FFFF, 2*6 bits writeable...\n\nUnbelievable what ST can do to complicate things\n\n\u003e My guess would be to use the max. number of sectors\n\u003e for the given device id for calculating the number of relevant bits...\n\nAgreed","accounts_in_message":[],"_revision_number":7},{"id":"f0065c4a0d782068deed7007c05da03fa6002cee","author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"real_author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"date":"2020-02-24 11:13:12.000000000","message":"Uploaded patch set 8.","accounts_in_message":[],"_revision_number":8},{"id":"f969b8d87bc49f773c6cceac81d3234af3555b6b","author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"real_author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"date":"2020-02-24 15:07:05.000000000","message":"Patch Set 8: Verified+1\n\nBuild Successful \n\nhttp://build.openocd.org/job/openocd-gerrit/12577/ : SUCCESS\n\nhttp://build.openocd.org/job/openocd-gerrit-build/11874/ : SUCCESS","accounts_in_message":[],"_revision_number":8},{"id":"257aa9507770731d1dd31af9a949c115db76484e","author":{"_account_id":1001753,"name":"Tim Blakely","username":"timblakely"},"real_author":{"_account_id":1001753,"name":"Tim Blakely","username":"timblakely"},"date":"2020-02-26 07:39:04.000000000","message":"Patch Set 8:\n\nApologies if I\u0027m just adding noise, but wanted to confirm that I\u0027ve been successfully using both PS7 and PS8 with a Nucleo-G474RE (contains the F7-based STLINK-V3E) on top of HEAD to erase, flash and debug using a slightly customized stm32g4x.cfg that sets the adapter speed to the V3\u0027s maximum SWD of 24000 kHz. Let me know if there\u0027s anything I can help test/debug (though from the change description I assume Andreas is already testing on the same board).","accounts_in_message":[],"_revision_number":8},{"id":"e09293e91ff57e8e0f98ef9b77b90208dbac43f5","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2020-02-26 22:29:30.000000000","message":"Patch Set 8: Code-Review+1\n\nTim, your message is not noise at all - it is a valuable feedback. Please do not hesitate to put +1 score next time.\n\nAndreas, I re-tested with Nucleo G474RE in both dual/single bank modes. I also played with Nucleo G070RB. No problems spotted.\n\nThis change is somewhat complex so we should test it on some L4 devices to ensure there is no regression.","accounts_in_message":[],"_revision_number":8},{"id":"0873e81642ff803faf0a50ae305d195645d83f19","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2020-02-27 10:24:59.000000000","message":"Patch Set 8:\n\n(1 comment)\n\nthis change is intended for G0/G4, so I suggest to not add other devices\nTomas, I will test on some L4 devices\nbut I strongly suggest to split this change into smaller ones ...","accounts_in_message":[],"_revision_number":8},{"id":"9d13e690a9290445dd39500a3c0392517f151dd9","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2020-02-27 10:55:48.000000000","message":"Patch Set 8:\n\n\u003e (1 comment)\n \u003e \n \u003e this change is intended for G0/G4, so I suggest to not add other\n \u003e devices\n\nAgreed\n\n \u003e Tomas, I will test on some L4 devices\n\nI tested with Nucleo L4R5 in double-bank mode and looks ok.\n\n \u003e but I strongly suggest to split this change into smaller ones ...\n\nSure. If you manage to convince Andreas to do so I\u0027ll be very happy ;-)\nI resigned asking Andreas for smaller patches some time ago and I\u0027m ready to accept this change as is because of the quality of his code.\nOn the other hand splitting the patch now, when it has been tested, seems me contra-productive.","accounts_in_message":[],"_revision_number":8},{"id":"24c6cac951f0b96ad441c2e36129876939ecfe87","author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"real_author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"date":"2020-02-27 11:29:54.000000000","message":"Uploaded patch set 9.","accounts_in_message":[],"_revision_number":9},{"id":"8fe80eb0e3ae9504c58f00db344301aff196a1a8","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2020-02-27 11:56:27.000000000","message":"Patch Set 9:\n\n\u003e \u003e but I strongly suggest to split this change into smaller ones ...\n \u003e \n \u003e Sure. If you manage to convince Andreas to do so I\u0027ll be very happy\n \u003e ;-)\n \u003e I resigned asking Andreas for smaller patches some time ago and I\u0027m\n \u003e ready to accept this change as is because of the quality of his\n \u003e code.\n \u003e On the other hand splitting the patch now, when it has been tested,\n \u003e seems me contra-productive.\n\nIf Andreas accepts, I can propose myself to split it (keeping him as author), and give you an execution log of some tests with some devices","accounts_in_message":[],"_revision_number":9},{"id":"1004a45803735f5dcd689b81be57c3e1246e2da4","author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"real_author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"date":"2020-02-27 12:00:35.000000000","message":"Patch Set 9: Verified+1\n\nBuild Successful \n\nhttp://build.openocd.org/job/openocd-gerrit/12589/ : SUCCESS\n\nhttp://build.openocd.org/job/openocd-gerrit-build/11886/ : SUCCESS","accounts_in_message":[],"_revision_number":9},{"id":"bd735c515e590d20ba93af66f5e9c929e614f874","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2020-02-27 12:31:08.000000000","message":"Patch Set 9: Code-Review+2\n\n\u003e If Andreas accepts, I can propose myself to split it (keeping him\n \u003e as author), and give you an execution log of some tests with some\n \u003e devices\n\nIt\u0027s a generous offer, Tarek, but in this moment I\u0027d prefer to merge the change ASAP instead of playing with it forever. Please test an L4 device (preferably other than I tested) and if there is no regression we are done.\n\nAndreas, thanks a lot for your work. Next time please do not mix functional changes with refactoring and adding new devices in one change.","accounts_in_message":[],"_revision_number":9},{"id":"6bf6554a01296dca2b05fe433fc7af97d52e41a6","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2020-03-01 19:25:50.000000000","message":"Patch Set 9:\n\n(1 comment)","accounts_in_message":[],"_revision_number":9},{"id":"f5b5ab1916664961658fb1bc7ba3da00f8aaabf2","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2020-03-01 21:04:20.000000000","message":"Patch Set 9: -Code-Review\n\nYes, Tarek","accounts_in_message":[],"_revision_number":9},{"id":"f7984d9ecba8566de976efa4e7c4037a9b069d41","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2020-03-01 21:31:05.000000000","message":"Patch Set 9:\n\n(5 comments)\n\ntested OK, just some small nitpicking","accounts_in_message":[],"_revision_number":9},{"id":"8b877230eed7f66ffeb2e1d28cfccb0bfdecf615","author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"real_author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"date":"2020-03-02 08:10:40.000000000","message":"Patch Set 9:\n\n(1 comment)\n\nThe remaining ref. to WL will be removed. Hopefully I\u0027ll get some G473RB to test the gap handling this week, then I\u0027ll post the pending changes.","accounts_in_message":[],"_revision_number":9},{"id":"f3a5a499726660b19ddb5a234a470e455b4bd9c1","author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"real_author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"date":"2020-03-08 17:31:59.000000000","message":"Uploaded patch set 10.","accounts_in_message":[],"_revision_number":10},{"id":"946ff241fd76ce9e66ff2866252c673f125b03ca","author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"real_author":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"date":"2020-03-08 17:38:39.000000000","message":"Patch Set 10:\n\nTested successfully with G473RB and fixed message re. gap.\nAll references to WL removed.","accounts_in_message":[],"_revision_number":10},{"id":"54ce326afecf5fc492d8c8e97df0d4962ea836bf","author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"real_author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"date":"2020-03-08 18:08:09.000000000","message":"Patch Set 10: Verified+1\n\nBuild Successful \n\nhttp://build.openocd.org/job/openocd-gerrit/12637/ : SUCCESS\n\nhttp://build.openocd.org/job/openocd-gerrit-build/11934/ : SUCCESS","accounts_in_message":[],"_revision_number":10},{"id":"106af19a30b1645cd9291dab2cf8f682d4e6fffe","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2020-03-09 12:24:45.000000000","message":"Patch Set 10: Code-Review+1\n\nretested using (STM32G47/G48xx - Rev: B) and (STM32G07/G08xx - Rev: B) in single bank mode.\nprogrammed the full flash: Ok","accounts_in_message":[],"_revision_number":10},{"id":"6538bdb7e7824a954ae4b8dfd4e04f0983b9ac29","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2020-03-09 14:26:41.000000000","message":"Patch Set 10: Code-Review+2","accounts_in_message":[],"_revision_number":10},{"id":"a43b9571b20f0be3d0c0df6e8253a74e89da7acf","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2020-03-16 15:25:10.000000000","message":"Change has been successfully cherry-picked as ba131f30a0798d97729f9517c136d32f58f57571 by Tomas Vanek","accounts_in_message":[],"_revision_number":11}],"current_revision":"ba131f30a0798d97729f9517c136d32f58f57571","revisions":{"830592b5dae03147316009289f4586e0df2c2b86":{"kind":"REWORK","_number":1,"created":"2018-12-16 17:52:52.000000000","uploader":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"ref":"refs/changes/07/4807/1","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/07/4807/1","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/1 \u0026\u0026 git checkout -b change-4807 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/1 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/1 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/1 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/07/4807/1","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/1 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"e295cfe9ccce530d958eea72cfb932edce612b05","subject":"TCL helpers for read-modify-write"}],"author":{"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","date":"2018-12-16 16:30:41.000000000","tz":60},"committer":{"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","date":"2018-12-16 17:51:42.000000000","tz":60},"subject":"Flash driver for STM32G0x0/G0x1","message":"Flash driver for STM32G0x0/G0x1\n\nFlash module of STM32G0 family is quite similar to the one of\nSTM32L4, so only minor changes are required, in particular\nadaption of flash loader to Cortex-M0. Tested on Nucleo-G071RB.\n\nChange-Id: I24df7c065afeb71c11c7e96de4aa9fdb91845593\nSigned-off-by: Andreas Bolsch \u003chyphen0break@gmail.com\u003e\n"}},"e52abdaa459cbbbf82b20c283cac3fd9d1552233":{"kind":"REWORK","_number":2,"created":"2019-06-29 19:27:45.000000000","uploader":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"ref":"refs/changes/07/4807/2","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/07/4807/2","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/2 \u0026\u0026 git checkout -b change-4807 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/2 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/2 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/2 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/07/4807/2","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/2 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"0df7b85822cd7c79fc089a83044d669eacce75fe","subject":"TCL helpers for read-modify-write"}],"author":{"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","date":"2018-12-16 16:30:41.000000000","tz":60},"committer":{"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","date":"2019-06-29 19:23:44.000000000","tz":120},"subject":"Flash driver for STM32G0x0/G0x1","message":"Flash driver for STM32G0x0/G0x1\n\nFlash module of STM32G0 family is quite similar to the one of\nSTM32L4, so only minor changes are required, in particular\nadaption of flash loader to Cortex-M0. Tested on Nucleo-G071RB.\n\nChange-Id: I24df7c065afeb71c11c7e96de4aa9fdb91845593\nSigned-off-by: Andreas Bolsch \u003chyphen0break@gmail.com\u003e\n"}},"434cf2f8a25a8d082f4c955c21761dcd45570516":{"kind":"REWORK","_number":3,"created":"2019-08-23 09:08:07.000000000","uploader":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"ref":"refs/changes/07/4807/3","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/07/4807/3","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/3 \u0026\u0026 git checkout -b change-4807 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/3 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/3 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/3 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/07/4807/3","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/3 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"f00115585ed72bef1518619c5a9627aee681c22c","subject":"TCL helpers for read-modify-write"}],"author":{"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","date":"2018-12-16 16:30:41.000000000","tz":60},"committer":{"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","date":"2019-08-23 08:57:49.000000000","tz":120},"subject":"Flash driver for STM32G0xx and STM32G4xx","message":"Flash driver for STM32G0xx and STM32G4xx\n\nFlash module of STM32G0/G4 family is quite similar to the one of\nSTM32L4, so only minor changes are required, in particular\nadaption of flash loader to Cortex-M0. Additionally, padding changed\nto 0xFF instead of random pattern and minor bug fixed.\nTested on Nucleo-G071RB, STM32G031C8, Nucleo-G431RB and Nucleo-G474RE.\n\nChange-Id: I24df7c065afeb71c11c7e96de4aa9fdb91845593\nSigned-off-by: Andreas Bolsch \u003chyphen0break@gmail.com\u003e\n"}},"8021aef90db0dc7b1e318ab0ca4d97b462247d51":{"kind":"REWORK","_number":4,"created":"2019-10-06 17:41:23.000000000","uploader":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"ref":"refs/changes/07/4807/4","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/07/4807/4","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/4 \u0026\u0026 git checkout -b change-4807 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/4 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/4 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/4 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/07/4807/4","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/4 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"0a13ca1a8a83119a4e1ffba13a6a8d1977591bc5","subject":"efm32: use device-specific MSC base for EFM32TG11B"}],"author":{"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","date":"2018-12-16 16:30:41.000000000","tz":60},"committer":{"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","date":"2019-10-06 17:38:08.000000000","tz":120},"subject":"Flash driver for STM32G0xx and STM32G4xx","message":"Flash driver for STM32G0xx and STM32G4xx\n\nFlash module of STM32G0/G4 family is quite similar to the one of\nSTM32L4, so only minor changes are required, in particular\nadaption of flash loader to Cortex-M0. Additionally, padding changed\nto 0xFF instead of random pattern and minor bug fixed.\nTested on Nucleo-G071RB, STM32G031C8, Nucleo-G431RB and Nucleo-G474RE.\n\nChange-Id: I24df7c065afeb71c11c7e96de4aa9fdb91845593\nSigned-off-by: Andreas Bolsch \u003chyphen0break@gmail.com\u003e\n"}},"cf8a8ecfbc39118b0c90b3ca46815198a31a85b7":{"kind":"TRIVIAL_REBASE","_number":5,"created":"2019-10-17 14:50:23.000000000","uploader":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"ref":"refs/changes/07/4807/5","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/07/4807/5","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/5 \u0026\u0026 git checkout -b change-4807 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/5 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/5 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/5 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/07/4807/5","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/5 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"3a50bb46dc084999f6f7aee8913858ccced49db4","subject":"Update FTDI C232HM cfg, and add two new cfgs from cable modem research"}],"author":{"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","date":"2018-12-16 16:30:41.000000000","tz":60},"committer":{"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","date":"2019-10-17 14:49:35.000000000","tz":120},"subject":"Flash driver for STM32G0xx and STM32G4xx","message":"Flash driver for STM32G0xx and STM32G4xx\n\nFlash module of STM32G0/G4 family is quite similar to the one of\nSTM32L4, so only minor changes are required, in particular\nadaption of flash loader to Cortex-M0. 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WB and WL not tested.\n\nChange-Id: I24df7c065afeb71c11c7e96de4aa9fdb91845593\nSigned-off-by: Andreas Bolsch \u003chyphen0break@gmail.com\u003e\n"}},"2f001781ebef1568bd27aaa9e29ad7475331ddf0":{"kind":"REWORK","_number":7,"created":"2020-01-29 21:11:42.000000000","uploader":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"ref":"refs/changes/07/4807/7","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/07/4807/7","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/7 \u0026\u0026 git checkout -b change-4807 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/7 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/7 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/7 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/07/4807/7","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/7 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"09ac9ab135ed35c846bcec4f7d468c3656852f26","subject":"jtag: Fix jtag_reset fallback"}],"author":{"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","date":"2018-12-16 16:30:41.000000000","tz":60},"committer":{"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","date":"2020-01-29 21:04:29.000000000","tz":60},"subject":"Flash driver for STM32G0xx and STM32G4xx","message":"Flash driver for STM32G0xx and STM32G4xx\n\nFlash module of STM32G0/G4 family is quite similar to the one of\nSTM32L4, so only minor changes are required, in particular\nadaption of flash loader to Cortex-M0. Register addresses\npassed to flash loader to simplify integration of L5.\nAdded re-probe after option byte load.\nAdded flash size override via cfg file.\n\nTested with Nucleo-G071RB, G030J6, Nucleo-G431RB and Nucleo-G474RE.\nGap handling in G4 Cat. 3 dual bank mode not tested on real device.\nThis handling isn\u0027t optimal as the bank size includes the\nsize of the gap. WB and WL not tested.\n\nChange-Id: I24df7c065afeb71c11c7e96de4aa9fdb91845593\nSigned-off-by: Andreas Bolsch \u003chyphen0break@gmail.com\u003e\n"}},"44e50666b4219e3df5686c296564a020a46ee6fa":{"kind":"REWORK","_number":8,"created":"2020-02-24 11:13:12.000000000","uploader":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"ref":"refs/changes/07/4807/8","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/07/4807/8","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/8 \u0026\u0026 git checkout -b change-4807 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/8 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/8 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/8 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/07/4807/8","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/8 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"3bfe4926632d458da449f0438db6949c75b7af59","subject":"coding style: doc: remove empty lines at end of text files"}],"author":{"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","date":"2018-12-16 16:30:41.000000000","tz":60},"committer":{"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","date":"2020-02-24 11:03:57.000000000","tz":60},"subject":"Flash driver for STM32G0xx and STM32G4xx","message":"Flash driver for STM32G0xx and STM32G4xx\n\nFlash module of STM32G0/G4 family is quite similar to the one of\nSTM32L4, so only minor changes are required, in particular\nadaption of flash loader to Cortex-M0. Register addresses\npassed to flash loader to simplify integration of L5.\nAdded re-probe after option byte load.\nAdded flash size override via cfg file.\nWRPxxR mask now based on max. number of pages instead of fixed 0xFF,\nas G4 devices fill up unused bits with \u00271\u0027.\nSizes in stm32l4_probe changed to multiples of 1kB.\n\nTested with Nucleo-G071RB, G030J6, Nucleo-G431RB and Nucleo-G474RE.\nGap handling in G4 Cat. 3 dual bank mode not tested on real device.\nThis handling isn\u0027t optimal as the bank size includes the\nsize of the gap. WB and WL not tested.\n\nChange-Id: I24df7c065afeb71c11c7e96de4aa9fdb91845593\nSigned-off-by: Andreas Bolsch \u003chyphen0break@gmail.com\u003e\n"}},"ee9d45713bd85aa60eab306694fc3dc536459ab9":{"kind":"REWORK","_number":9,"created":"2020-02-27 11:29:54.000000000","uploader":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"ref":"refs/changes/07/4807/9","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/07/4807/9","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/9 \u0026\u0026 git checkout -b change-4807 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/9 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/9 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/9 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/07/4807/9","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/9 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"3bfe4926632d458da449f0438db6949c75b7af59","subject":"coding style: doc: remove empty lines at end of text files"}],"author":{"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","date":"2018-12-16 16:30:41.000000000","tz":60},"committer":{"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","date":"2020-02-27 11:25:18.000000000","tz":60},"subject":"Flash driver for STM32G0xx and STM32G4xx","message":"Flash driver for STM32G0xx and STM32G4xx\n\nFlash module of STM32G0/G4 family is quite similar to the one of\nSTM32L4, so only minor changes are required, in particular\nadaption of flash loader to Cortex-M0. Register addresses\npassed to flash loader to simplify integration of L5.\nAdded re-probe after option byte load.\nAdded flash size override via cfg file.\nWRPxxR mask now based on max. number of pages instead of fixed 0xFF,\nas G4 devices fill up unused bits with \u00271\u0027.\nSizes in stm32l4_probe changed to multiples of 1kB.\n\nTested with Nucleo-G071RB, G030J6, Nucleo-G431RB and Nucleo-G474RE.\nGap handling in G4 Cat. 3 dual bank mode not tested on real device.\nThis handling isn\u0027t optimal as the bank size includes the\nsize of the gap. WB not tested.\n\nChange-Id: I24df7c065afeb71c11c7e96de4aa9fdb91845593\nSigned-off-by: Andreas Bolsch \u003chyphen0break@gmail.com\u003e\n"}},"cee9264b33e5924f0400871dd2b0ecdc35f208e4":{"kind":"REWORK","_number":10,"created":"2020-03-08 17:31:59.000000000","uploader":{"_account_id":1001036,"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","username":"abmero"},"ref":"refs/changes/07/4807/10","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/07/4807/10","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/10 \u0026\u0026 git checkout -b change-4807 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/10 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/10 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/10 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/07/4807/10","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/10 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"82a5c55dc357b042b6755b343c920baebd410874","subject":"flash/nor: update support for TI MSP432 devices"}],"author":{"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","date":"2018-12-16 16:30:41.000000000","tz":60},"committer":{"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","date":"2020-03-08 17:23:36.000000000","tz":60},"subject":"Flash driver for STM32G0xx and STM32G4xx","message":"Flash driver for STM32G0xx and STM32G4xx\n\nFlash module of STM32G0/G4 family is quite similar to the one of\nSTM32L4, so only minor changes are required, in particular\nadaption of flash loader to Cortex-M0. Register addresses\npassed to flash loader to simplify integration of L5.\nAdded re-probe after option byte load.\nAdded flash size override via cfg file.\nWRPxxR mask now based on max. number of pages instead of fixed 0xFF,\nas G4 devices fill up unused bits with \u00271\u0027.\nSizes in stm32l4_probe changed to multiples of 1kB.\n\nTested with Nucleo-G071RB, G030J6, Nucleo-G431RB and Nucleo-G474RE.\nGap handling in G4 Cat. 3 dual bank mode tested with STM32G473RB.\nThis handling isn\u0027t optimal as the bank size includes the\nsize of the gap. WB not tested.\n\nChange-Id: I24df7c065afeb71c11c7e96de4aa9fdb91845593\nSigned-off-by: Andreas Bolsch \u003chyphen0break@gmail.com\u003e\n"}},"ba131f30a0798d97729f9517c136d32f58f57571":{"kind":"REWORK","_number":11,"created":"2020-03-16 15:25:10.000000000","uploader":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"ref":"refs/changes/07/4807/11","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/07/4807/11","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/11 \u0026\u0026 git checkout -b change-4807 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/11 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/11 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/11 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/07/4807/11","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/07/4807/11 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"e03de33c412b366f3dd45c447410dcc1df3b4b82","subject":"tcl/target: Fix naming of RZ/A1 SoC"}],"author":{"name":"Andreas Bolsch","email":"hyphen0break@gmail.com","date":"2018-12-16 16:30:41.000000000","tz":60},"committer":{"name":"Tomas Vanek","email":"vanekt@fbl.cz","date":"2020-03-16 15:25:10.000000000","tz":0},"subject":"Flash driver for STM32G0xx and STM32G4xx","message":"Flash driver for STM32G0xx and STM32G4xx\n\nFlash module of STM32G0/G4 family is quite similar to the one of\nSTM32L4, so only minor changes are required, in particular\nadaption of flash loader to Cortex-M0. Register addresses\npassed to flash loader to simplify integration of L5.\nAdded re-probe after option byte load.\nAdded flash size override via cfg file.\nWRPxxR mask now based on max. number of pages instead of fixed 0xFF,\nas G4 devices fill up unused bits with \u00271\u0027.\nSizes in stm32l4_probe changed to multiples of 1kB.\n\nTested with Nucleo-G071RB, G030J6, Nucleo-G431RB and Nucleo-G474RE.\nGap handling in G4 Cat. 3 dual bank mode tested with STM32G473RB.\nThis handling isn\u0027t optimal as the bank size includes the\nsize of the gap. WB not tested.\n\nChange-Id: I24df7c065afeb71c11c7e96de4aa9fdb91845593\nSigned-off-by: Andreas Bolsch \u003chyphen0break@gmail.com\u003e\nReviewed-on: http://openocd.zylin.com/4807\nTested-by: jenkins\nReviewed-by: Tarek BOCHKATI \u003ctarek.bouchkati@gmail.com\u003e\nReviewed-by: Tomas Vanek \u003cvanekt@fbl.cz\u003e\n"}}},"requirements":[],"submit_records":[],"submit_requirements":[]}