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1.","accounts_in_message":[],"_revision_number":1},{"id":"6a158e6b6b24633ac5bae0b91d94358e7cfe65ea","author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"real_author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"date":"2019-04-23 15:16:09.000000000","message":"Patch Set 1: Verified-1\n\nBuild Failed \n\nhttp://build.openocd.org/job/openocd-gerrit/11614/ : FAILURE\n\nhttp://build.openocd.org/job/openocd-gerrit-build/10939/ : FAILURE","accounts_in_message":[],"_revision_number":1},{"id":"00ab799df1f8fa81c2920cd1fedde14730fd0068","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-04-23 15:18:03.000000000","message":"Uploaded patch set 2.","accounts_in_message":[],"_revision_number":2},{"id":"7cfcad3830fbd94c870f2fc387d5d716381a260b","author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"real_author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"date":"2019-04-23 15:37:50.000000000","message":"Patch Set 2: Verified+1\n\nBuild Successful \n\nhttp://build.openocd.org/job/openocd-gerrit/11615/ : SUCCESS\n\nhttp://build.openocd.org/job/openocd-gerrit-build/10940/ : SUCCESS","accounts_in_message":[],"_revision_number":2},{"id":"ebdf85b8d6ce67dd334a4e22f69ab6e37802a81c","author":{"_account_id":1000716,"name":"Christopher Head","email":"chead@zaber.com","username":"Hawk777"},"real_author":{"_account_id":1000716,"name":"Christopher Head","email":"chead@zaber.com","username":"Hawk777"},"date":"2019-04-23 21:02:26.000000000","message":"Patch Set 2:\n\n(2 comments)","accounts_in_message":[],"_revision_number":2},{"id":"6c1ff407305ae25427837dbaca860a79b436d391","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-04-23 21:52:10.000000000","message":"Patch Set 2:\n\n(2 comments)\n\nthanks Christophe,\n\nI\u0027m trying my best to not duplicate the config file.\nAnd I dont know if we can create targets conditionally. is it possible ?\n\nwhat do you think ?","accounts_in_message":[],"_revision_number":2},{"id":"f0dbee8648e983c512a52d7f4bfced951bab1e6f","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2019-04-24 19:54:55.000000000","message":"Patch Set 2:\n\n\u003e And I dont know if we can create targets conditionally. is it\n \u003e possible ?\n\nYes we can. But we cannot read the target memory as the condition whether to create a target or not. I would recommend a separate config\nfile for dual core variants which includes base config for CM7 cpu.","accounts_in_message":[],"_revision_number":2},{"id":"874baf0acbc5c06f2311de3a352fefa83d6d81ad","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-04-25 15:05:58.000000000","message":"Patch Set 2:\n\nwhat about using a define like _DUAL_CORE, defined by the user either in board file or in command line (using -c \"set _DUAL_CORE 1\").\nI\u0027m opting for this solution in order to not touch the stm32h7x_dual_bank.cfg, other we will be obliged to create sthg like stm32h7x_dual_core.cfg and stm32h7x_dual_bank_dual_core.cfg\n\nI will make a proposal, then discuss it.\n\nThanks, Tarek","accounts_in_message":[],"_revision_number":2},{"id":"d9b39b32439882a9e45122c79b8f17fdfe7d2374","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-04-25 16:26:15.000000000","message":"Uploaded patch set 3.","accounts_in_message":[],"_revision_number":3},{"id":"71e6f4447e85e0cae410c097db516f6775593ffe","author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"real_author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"date":"2019-04-25 16:46:21.000000000","message":"Patch Set 3: Verified+1\n\nBuild Successful \n\nhttp://build.openocd.org/job/openocd-gerrit/11627/ : SUCCESS\n\nhttp://build.openocd.org/job/openocd-gerrit-build/10952/ : SUCCESS","accounts_in_message":[],"_revision_number":3},{"id":"f25aa317d90180961b8526f6b99bacb432379e90","author":{"_account_id":1000716,"name":"Christopher Head","email":"chead@zaber.com","username":"Hawk777"},"real_author":{"_account_id":1000716,"name":"Christopher Head","email":"chead@zaber.com","username":"Hawk777"},"date":"2019-04-25 17:32:01.000000000","message":"Patch Set 3:\n\n\u003e what about using a define like _DUAL_CORE, defined by the user\n \u003e either in board file or in command line (using -c \"set _DUAL_CORE\n \u003e 1\").\n\nThat’s what I meant by “perhaps a variant selector passed in via a variable”.","accounts_in_message":[],"_revision_number":3},{"id":"7bc5f7c43b2a8d5b7a5728413d4ec66dad6c493a","author":{"_account_id":1000716,"name":"Christopher Head","email":"chead@zaber.com","username":"Hawk777"},"real_author":{"_account_id":1000716,"name":"Christopher Head","email":"chead@zaber.com","username":"Hawk777"},"date":"2019-04-25 17:43:33.000000000","message":"Patch Set 3: Code-Review-1\n\n(1 comment)","accounts_in_message":[],"_revision_number":3},{"id":"40693c4b3919bb62e00e075b1a366a767ce99cc4","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2019-04-25 18:21:16.000000000","message":"Patch Set 3:\n\n(4 comments)","accounts_in_message":[],"_revision_number":3},{"id":"5fe7e8e6ed15094df0827484f6a0240381254bd5","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-04-29 08:23:53.000000000","message":"Patch Set 3:\n\n(5 comments)","accounts_in_message":[],"_revision_number":3},{"id":"6443d81bf224c0bf25f4b1c2ab303e32e601e3af","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-04-29 16:16:26.000000000","message":"Uploaded patch set 4.","accounts_in_message":[],"_revision_number":4},{"id":"f59b487afe145e9beb9fc4185dd3884db4800fbd","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-04-29 16:29:18.000000000","message":"Patch Set 4:\n\n\u003e \u003e STM have not yet released MCU doc for the public\n \u003e the doc will be released this week.\n\nMy bad, in two weeks ...","accounts_in_message":[],"_revision_number":4},{"id":"0c59331043c506171a0a395c81f2762e7122a75a","author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"real_author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"date":"2019-04-29 16:36:12.000000000","message":"Patch Set 4: Verified+1\n\nBuild Successful \n\nhttp://build.openocd.org/job/openocd-gerrit/11634/ : SUCCESS\n\nhttp://build.openocd.org/job/openocd-gerrit-build/10959/ : SUCCESS","accounts_in_message":[],"_revision_number":4},{"id":"1588f307d95d010888e088ff10a09485dbe97d82","author":{"_account_id":1000716,"name":"Christopher Head","email":"chead@zaber.com","username":"Hawk777"},"real_author":{"_account_id":1000716,"name":"Christopher Head","email":"chead@zaber.com","username":"Hawk777"},"date":"2019-05-07 00:31:28.000000000","message":"Patch Set 4: Code-Review-1\n\n(3 comments)","accounts_in_message":[],"_revision_number":4},{"id":"72b2f313360169373c339b31d358c2469d4d5374","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-05-07 15:18:45.000000000","message":"Uploaded patch set 5.","accounts_in_message":[],"_revision_number":5},{"id":"ba02baf1e216896e3a46429d301ff83eb645a46d","author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"real_author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"date":"2019-05-07 15:38:58.000000000","message":"Patch Set 5: Verified+1\n\nBuild Successful \n\nhttp://build.openocd.org/job/openocd-gerrit/11683/ : SUCCESS\n\nhttp://build.openocd.org/job/openocd-gerrit-build/10999/ : SUCCESS","accounts_in_message":[],"_revision_number":5},{"id":"b9e4c6dfb9b0db160b1c8584c7a79fc2a245e045","author":{"_account_id":1000716,"name":"Christopher Head","email":"chead@zaber.com","username":"Hawk777"},"real_author":{"_account_id":1000716,"name":"Christopher Head","email":"chead@zaber.com","username":"Hawk777"},"date":"2019-05-07 19:41:49.000000000","message":"Patch Set 5: Code-Review-1\n\n(1 comment)","accounts_in_message":[],"_revision_number":5},{"id":"0194d64dab0c3abbe5035efaba41adf866df2c53","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-05-07 20:52:48.000000000","message":"Patch Set 5:\n\n(3 comments)\n\nIn fact I have read your comments after me committing the PS5.\nAnd I haven\u0027t arrived to find a quick solution yet.\nWill check carefully tomorrow and propose a cleaner solution.\nThank you Christopher 😊","accounts_in_message":[],"_revision_number":5},{"id":"208f19a892628f28b8c08a35ea8be861c20a8641","author":{"_account_id":1000716,"name":"Christopher Head","email":"chead@zaber.com","username":"Hawk777"},"real_author":{"_account_id":1000716,"name":"Christopher Head","email":"chead@zaber.com","username":"Hawk777"},"date":"2019-05-07 21:01:43.000000000","message":"Patch Set 4:\n\n(3 comments)\n\nOK, no problem. I didn’t realize PS5 had been prepared prior to my comments.","accounts_in_message":[],"_revision_number":4},{"id":"cf73696690d3ef78c51d500787e1b9e57365af06","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-05-07 21:26:50.000000000","message":"Patch Set 5:\n\n(3 comments)\n\n\u003e Patch Set 4:\n \u003e \n \u003e (3 comments)\n \u003e \n \u003e OK, no problem. I didn’t realize PS5 had been prepared prior to my comments.\n\nThe PS5 was mainly to add CTI handling to halt both cores together\n\nAnd you comments already applies to the additional CTI code.\nWill prepare sthg and send it tomorrow.\n\nThank you again.","accounts_in_message":[],"_revision_number":5},{"id":"a6a4a922d479b952386a5cbe9a6d2ee52f52dca7","author":{"_account_id":1000716,"name":"Christopher Head","email":"chead@zaber.com","username":"Hawk777"},"real_author":{"_account_id":1000716,"name":"Christopher Head","email":"chead@zaber.com","username":"Hawk777"},"date":"2019-05-07 21:29:13.000000000","message":"Patch Set 4:\n\n(1 comment)","accounts_in_message":[],"_revision_number":4},{"id":"a5e991dde0143da0156b276fc627c72c5d5d9251","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-05-08 14:24:46.000000000","message":"Uploaded patch set 6.","accounts_in_message":[],"_revision_number":6},{"id":"8e7cad2c61b60cc4dcaa38d8d7f8e883ee27fcb4","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-05-08 14:36:13.000000000","message":"Patch Set 6:\n\n(7 comments)\n\nCould you please check the PS6\nThank you !","accounts_in_message":[],"_revision_number":6},{"id":"9d85e77d0e0773d584c000692cce2fcd8b2ddf5d","author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"real_author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"date":"2019-05-08 14:44:30.000000000","message":"Patch Set 6: Verified+1\n\nBuild Successful \n\nhttp://build.openocd.org/job/openocd-gerrit/11688/ : SUCCESS\n\nhttp://build.openocd.org/job/openocd-gerrit-build/11004/ : SUCCESS","accounts_in_message":[],"_revision_number":6},{"id":"4723ff6328302675a941ec6c8a8e79d9c2bd0ccf","author":{"_account_id":1000716,"name":"Christopher Head","email":"chead@zaber.com","username":"Hawk777"},"real_author":{"_account_id":1000716,"name":"Christopher Head","email":"chead@zaber.com","username":"Hawk777"},"date":"2019-05-08 17:26:28.000000000","message":"Patch Set 6: Code-Review-1\n\n(5 comments)","accounts_in_message":[],"_revision_number":6},{"id":"b105ae8c44ba3c174de6560dfe13fd3504670675","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-05-09 15:12:50.000000000","message":"Uploaded patch set 7.","accounts_in_message":[],"_revision_number":7},{"id":"16ddba0c7fdb476400f6c55287e4d8e95b4e697d","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-05-09 15:15:10.000000000","message":"Patch Set 7:\n\n(6 comments)\n\nPS7 fixes all the mentioned points, except this one :\n\u003e The stm32h7x_is_cpu1_alive proc does lots of things that probably aren’t possible while SRST is asserted (e.g. accessing RCC, FLASH, and SYSCFG). I would like, eventually, to introduce code that accesses DBGMCU via AP2 instead of AP0 if using a non-HLA, so that you can use connect_assert_srst, which is more reliable. However, I believe RCC, FLASH, and SYSCFG are not accessible via AP2, so calling stm32h7x_is_cpu1_alive at that point would fail. Would it be possible to do this block at reset-deassert-post instead of examine-end?","accounts_in_message":[],"_revision_number":7},{"id":"d01c52081eda2533992d101ee360461284fe4a23","author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"real_author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"date":"2019-05-09 15:32:52.000000000","message":"Patch Set 7: Verified+1\n\nBuild Successful \n\nhttp://build.openocd.org/job/openocd-gerrit/11691/ : SUCCESS\n\nhttp://build.openocd.org/job/openocd-gerrit-build/11007/ : SUCCESS","accounts_in_message":[],"_revision_number":7},{"id":"eb1c6ceb9936a56e497ddbaeb38a8895f9aabc08","author":{"_account_id":1000716,"name":"Christopher Head","email":"chead@zaber.com","username":"Hawk777"},"real_author":{"_account_id":1000716,"name":"Christopher Head","email":"chead@zaber.com","username":"Hawk777"},"date":"2019-05-09 17:11:45.000000000","message":"Patch Set 7:\n\n(1 comment)","accounts_in_message":[],"_revision_number":7},{"id":"9b9322637eb82efc4a7cba8d568c929d1c5dab6f","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-05-17 10:33:59.000000000","message":"Patch Set 6:\n\n(1 comment)","accounts_in_message":[],"_revision_number":6},{"id":"414d46b2a5966bb985153a0547ea2e1c75247360","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2019-05-17 11:02:47.000000000","message":"Patch Set 6:\n\n(1 comment)","accounts_in_message":[],"_revision_number":6},{"id":"a113fa71870653cadb6d5d9e083f2c72cdba08d3","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-05-17 13:20:22.000000000","message":"Patch Set 6:\n\n(1 comment)","accounts_in_message":[],"_revision_number":6},{"id":"190568a8436488189a696801f31b1e6ad991ac6e","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-05-27 14:11:30.000000000","message":"Uploaded patch set 8.","accounts_in_message":[],"_revision_number":8},{"id":"e85970f6330d19fb7553e7c544f0057a71e7ef5c","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-05-27 14:12:23.000000000","message":"Patch Set 8: Code-Review-1\n\nneed to rebase it on top of #4742","accounts_in_message":[],"_revision_number":8},{"id":"be8888598224765d760ffebfdf3fac3dd7778ce1","author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"real_author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"date":"2019-05-27 14:31:35.000000000","message":"Patch Set 8: Verified+1\n\nBuild Successful \n\nhttp://build.openocd.org/job/openocd-gerrit/11778/ : SUCCESS\n\nhttp://build.openocd.org/job/openocd-gerrit-build/11093/ : SUCCESS","accounts_in_message":[],"_revision_number":8},{"id":"eabf363912286f0be96ecc88f5c8607d944a4c5e","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-05-27 16:08:59.000000000","message":"Uploaded patch set 9.","accounts_in_message":[],"_revision_number":9},{"id":"dfa5fda432737d8c28b25a36c96c09214128eeb9","author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"real_author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"date":"2019-05-27 16:28:55.000000000","message":"Patch Set 9: Verified+1\n\nBuild Successful \n\nhttp://build.openocd.org/job/openocd-gerrit/11780/ : SUCCESS\n\nhttp://build.openocd.org/job/openocd-gerrit-build/11095/ : SUCCESS","accounts_in_message":[],"_revision_number":9},{"id":"0f57d2437fdbd43d6bdee3b964a95068b4191ce6","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-07-15 15:11:20.000000000","message":"Patch Set 9: Code-Review+1","accounts_in_message":[],"_revision_number":9},{"id":"c7d43897a5147fed15a904ec6800ad8ce3cc6be6","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2019-11-20 23:09:07.000000000","message":"Patch Set 9:\n\nI tested the change on a nucleo stm32h755. Works nice.\n\nThe only problem I discovered is running target algos with enabled CTI.\nIf you run e.g. flash erase_check, it works for the first time but after that keeps failing. It happens because in case of target algo the event \u0027debug-halted\u0027 is emitted instead of \u0027halted\u0027. Configuring \u0027debug-halted\u0027 in the same way as \u0027halted\u0027 event fixes the problem.","accounts_in_message":[],"_revision_number":9},{"id":"12f792ca3e4735cf70b755f047b6ac4bb09d4bbc","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-11-27 18:16:08.000000000","message":"Uploaded patch set 10.","accounts_in_message":[],"_revision_number":10},{"id":"b41135cfc97248900ca0b7a675d4dce8dd4dd0ad","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-11-27 18:16:37.000000000","message":"Patch Set 10: Code-Review+1\n\n\u003e I tested the change on a nucleo stm32h755. Works nice.\n \u003e \n \u003e The only problem I discovered is running target algos with enabled\n \u003e CTI.\n \u003e If you run e.g. flash erase_check, it works for the first time but\n \u003e after that keeps failing. It happens because in case of target algo\n \u003e the event \u0027debug-halted\u0027 is emitted instead of \u0027halted\u0027.\n \u003e Configuring \u0027debug-halted\u0027 in the same way as \u0027halted\u0027 event fixes\n \u003e the problem.\n\nWell spotted ! I will updated the change accordingly :)\nBTW, since soft_reset_halt is fixed by Antonio in #4987, I think it is better to use it in\ngdb-flash-erase-start and gdb-flash-write-end, since the normal reset will reset both cores.\nWhat do you think ?","accounts_in_message":[],"_revision_number":10},{"id":"7b670044c644dfca24425690dd6f22351b0959c8","author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"real_author":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]},"date":"2019-11-27 18:42:17.000000000","message":"Patch Set 10: Verified+1\n\nBuild Successful \n\nhttp://build.openocd.org/job/openocd-gerrit/12215/ : SUCCESS\n\nhttp://build.openocd.org/job/openocd-gerrit-build/11523/ : SUCCESS","accounts_in_message":[],"_revision_number":10},{"id":"13bf2734456ff37d41f9ecd33448277ad0cdc12c","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2019-11-27 21:17:38.000000000","message":"Patch Set 10:\n\n\u003e BTW, since soft_reset_halt is fixed by Antonio in #4987, I think it\n \u003e is better to use it in\n \u003e gdb-flash-erase-start and gdb-flash-write-end, since the normal\n \u003e reset will reset both cores.\n \u003e What do you think ?\n\nIt seems me very dangerous. If CTI is not enabled one could use gdb load on one core while the other core keeps running. And if the loaded image is for both cores then we asking for troubles...","accounts_in_message":[],"_revision_number":10},{"id":"311c99a165fa0fbcc5b9ed789161b57167bc1dbb","author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"real_author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"date":"2019-11-30 11:19:41.000000000","message":"Patch Set 10:\n\nThen let\u0027s keep it this way.\nI\u0027m quite satisfied with this change for STM32H7 dual and single core support.","accounts_in_message":[],"_revision_number":10},{"id":"ef42730572f727883375d9b675ad1c89a74dcf9e","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2019-11-30 17:51:26.000000000","message":"Patch Set 10: Code-Review+2","accounts_in_message":[],"_revision_number":10},{"id":"7608ce05a6ef8234527aa3613bc5a80f34f825ac","author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"real_author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"date":"2019-12-07 13:07:00.000000000","message":"Change has been successfully cherry-picked as 678fb4f60b685ed79d35272bc515891fa53b527e by Tomas Vanek","accounts_in_message":[],"_revision_number":11}],"current_revision":"678fb4f60b685ed79d35272bc515891fa53b527e","revisions":{"678fb4f60b685ed79d35272bc515891fa53b527e":{"kind":"REWORK","_number":11,"created":"2019-12-07 13:07:00.000000000","uploader":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"ref":"refs/changes/30/5130/11","fetch":{"anonymous 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\u003ctarek.bouchkati@gmail.com\u003e\nReviewed-on: http://openocd.zylin.com/5130\nTested-by: jenkins\nReviewed-by: Tomas Vanek \u003cvanekt@fbl.cz\u003e\n"}},"266ea4ce84773cdd2c51ede9ec2a3991053c3d0e":{"kind":"REWORK","_number":10,"created":"2019-11-27 18:16:08.000000000","uploader":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"ref":"refs/changes/30/5130/10","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/30/5130/10","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/10 \u0026\u0026 git checkout -b change-5130 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/10 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/10 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd 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used\n\nA second check for the second core existence is done in cpu1 examine-end\nOnce the second core is detected it gets examined.\n\nFurthermore, the script provides a configurable CTI usage in order to halt\nthe cores simultaneously.\n\nTested on Rev X and V devices.\n\nPS: the indentation was a mix of spaces and tabs, all changed to tabs.\n\nChange-Id: Iad9c30826965ddb9be5dee628bc2e63f953bbcb8\nSigned-off-by: Tarek BOCHKATI \u003ctarek.bouchkati@gmail.com\u003e\n"}},"c2d8d66259c60678bfd91b7df8c4f4d4e04b7a0a":{"kind":"REWORK","_number":9,"created":"2019-05-27 16:08:59.000000000","uploader":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"ref":"refs/changes/30/5130/9","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/30/5130/9","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/9 \u0026\u0026 git checkout -b change-5130 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15:55:12.000000000","tz":120},"subject":"target/stm32h7x: add support of dual core variant of STM32H7","message":"target/stm32h7x: add support of dual core variant of STM32H7\n\nSTM32H7x7 and STM32H7x5 devices contains two cores : CM7 + CM4\nThe second core creation is only done when\n  * DUAL_CORE variable is set to true\n  * non HLA interface is used\n\nA second check for the second core existence is done in cpu1 examine-end\nOnce the second core is detected it gets examined.\n\nFurthermore, the script provides a configurable CTI usage in order to halt\nthe cores simultaneously.\n\nTested on Rev X and V devices.\n\nPS: the indentation was a mix of spaces and tabs, all changed to tabs.\n\nChange-Id: Iad9c30826965ddb9be5dee628bc2e63f953bbcb8\nSigned-off-by: Tarek BOCHKATI \u003ctarek.bouchkati@gmail.com\u003e\n"}},"13e8a58b7817ea0b36b35263f5ec781e54c9d838":{"kind":"REWORK","_number":8,"created":"2019-05-27 14:11:30.000000000","uploader":{"_account_id":1000863,"name":"Tarek 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FETCH_HEAD"}}},"commit":{"parents":[{"commit":"2288394b4568d978ac63c66dc4dc163f7117e5c5","subject":"arm_adi_v5: Split CSW bits into AHB/APB/AXI"}],"author":{"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","date":"2019-05-27 13:45:47.000000000","tz":120},"committer":{"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","date":"2019-05-27 13:45:47.000000000","tz":120},"subject":"target/stm32h7x: add support of dual core variant of STM32H7","message":"target/stm32h7x: add support of dual core variant of STM32H7\n\nSTM32H7x7 and STM32H7x5 devices contains two cores : CM7 + CM4\nThe second core creation is only done when\n  * DUAL_CORE variable is set to true\n  * non HLA interface is used\n\nA second check for the second core existence is done in cpu1 examine-end\nOnce the second core is detected it gets examined.\n\nFurthermore, the script provides a configurable CTI usage in order to halt\nthe cores simultaneously.\n\nTested on Rev X and V devices.\n\nPS: the indentation was a mix of spaces and tabs, all changed to tabs.\n\nChange-Id: Iad9c30826965ddb9be5dee628bc2e63f953bbcb8\nSigned-off-by: Tarek BOCHKATI \u003ctarek.bouchkati@gmail.com\u003e\n"}},"f4bf3550744a92738672be2360d9ed6564cc03f2":{"kind":"REWORK","_number":3,"created":"2019-04-25 16:26:15.000000000","uploader":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"ref":"refs/changes/30/5130/3","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/30/5130/3","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/3 \u0026\u0026 git checkout -b change-5130 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/3 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/3 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch 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interface is used\n\nA second check for the second core existence is done in cpu1 examine-end\nOnce the second core is detected it gets examined.\n\n\nChange-Id: Iad9c30826965ddb9be5dee628bc2e63f953bbcb8\nSigned-off-by: Tarek BOCHKATI \u003ctarek.bouchkati@gmail.com\u003e\n"}},"3d43aabf69757bce61b0f6faaaf06c9f70e883f5":{"kind":"REWORK","_number":2,"created":"2019-04-23 15:18:03.000000000","uploader":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"ref":"refs/changes/30/5130/2","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/30/5130/2","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/2 \u0026\u0026 git checkout -b change-5130 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/2 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/2 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CM4\n\nOnce the second core is detected it gets examined.\n\nNote: since HLA adapters does not support multi access port,\n      then when hla is used only Cortex-M7 target is created\n\n\nChange-Id: Iad9c30826965ddb9be5dee628bc2e63f953bbcb8\nSigned-off-by: Tarek BOCHKATI \u003ctarek.bouchkati@gmail.com\u003e\n"}},"4930f455223014e2c2b2efec148cbec48064cfb5":{"kind":"REWORK","_number":1,"created":"2019-04-23 15:15:42.000000000","uploader":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"ref":"refs/changes/30/5130/1","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/30/5130/1","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/1 \u0026\u0026 git checkout -b change-5130 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/1 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch 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and STM32H7x5 devices contains two cores : CM7 + CM4\n\nOnce the second core is detected it gets examined.\n\nNote: since HLA adapters does not support multi access port,\n      then when hla is used only Cortex-M7 target is created\n\n\nChange-Id: Iad9c30826965ddb9be5dee628bc2e63f953bbcb8\nSigned-off-by: Tarek BOCHKATI \u003ctarek.bouchkati@gmail.com\u003e\n"}},"500bd5842dcacd7c12ae7e1076f1813e03b97714":{"kind":"REWORK","_number":7,"created":"2019-05-09 15:12:50.000000000","uploader":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"ref":"refs/changes/30/5130/7","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/30/5130/7","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/7 \u0026\u0026 git checkout -b change-5130 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/7 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/7 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/7 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/30/5130/7","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/7 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"250185c096bab341f99fb984aebda671d55e1ab0","subject":"stm32h7x: fix incorrect indentation"}],"author":{"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","date":"2019-05-09 15:08:47.000000000","tz":120},"committer":{"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","date":"2019-05-09 15:08:47.000000000","tz":120},"subject":"tcl/target/stm32h7x: add support of dual core variant of STM32H7","message":"tcl/target/stm32h7x: add support of dual core variant of STM32H7\n\nSTM32H7x7 and STM32H7x5 devices contains two cores : CM7 + CM4\nThe second core creation is only done when\n  * DUAL_CORE variable is set to true\n  * non HLA interface is used\n\nA second check for the second core existence is done in cpu1 examine-end\nOnce the second core is detected it gets examined.\n\nFurthermore, the script provides a configurable CTI usage in order to halt\nthe cores simultaneously.\n\nTested on Rev X and V devices.\n\nPS: the indentation was a mix of spaces and tabs, all changed to tabs.\n\nChange-Id: Iad9c30826965ddb9be5dee628bc2e63f953bbcb8\nSigned-off-by: Tarek BOCHKATI \u003ctarek.bouchkati@gmail.com\u003e\n"}},"50518487500c5fd00e7ec4bf1ebe6de0b38a7633":{"kind":"REWORK","_number":6,"created":"2019-05-08 14:24:46.000000000","uploader":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"ref":"refs/changes/30/5130/6","fetch":{"anonymous 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BOCHKATI","email":"tarek.bouchkati@gmail.com","date":"2019-05-08 14:23:15.000000000","tz":120},"committer":{"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","date":"2019-05-08 14:23:15.000000000","tz":120},"subject":"tcl/target/stm32h7x: add support of dual core variant of STM32H7","message":"tcl/target/stm32h7x: add support of dual core variant of STM32H7\n\nSTM32H7x7 and STM32H7x5 devices contains two cores : CM7 + CM4\nThe second core creation is only done when\n  * DUAL_CORE variable is set to true\n  * non HLA interface is used\n\nA second check for the second core existence is done in cpu1 examine-end\nOnce the second core is detected it gets examined.\n\nFurthermore, the script provides a configurable CTI usage in order to halt\nthe cores simultaneously.\n\nTested on Rev X and V devices.\n\nChange-Id: Iad9c30826965ddb9be5dee628bc2e63f953bbcb8\nSigned-off-by: Tarek BOCHKATI \u003ctarek.bouchkati@gmail.com\u003e\n"}},"04c74c1d7aaae5dfe77782d17b954cb2b2096194":{"kind":"REWORK","_number":5,"created":"2019-05-07 15:18:45.000000000","uploader":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"ref":"refs/changes/30/5130/5","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/30/5130/5","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/5 \u0026\u0026 git checkout -b change-5130 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/5 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/5 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/5 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/30/5130/5","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/5 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"250185c096bab341f99fb984aebda671d55e1ab0","subject":"stm32h7x: fix incorrect indentation"}],"author":{"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","date":"2019-05-07 15:07:12.000000000","tz":120},"committer":{"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","date":"2019-05-07 15:07:12.000000000","tz":120},"subject":"tcl/target/stm32h7x: add support of dual core variant of STM32H7","message":"tcl/target/stm32h7x: add support of dual core variant of STM32H7\n\nSTM32H7x7 and STM32H7x5 devices contains two cores : CM7 + CM4\nThe second core creation is only done when\n  * DUAL_CORE variable is set to true\n  * non HLA interface is used\n\nA second check for the second core existence is done in cpu1 examine-end\nOnce the second core is detected it gets examined.\n\nFurthermore, the script provides a configurable CTI usage in order to halt\nthe cores simultaneously.\n\n\nChange-Id: Iad9c30826965ddb9be5dee628bc2e63f953bbcb8\nSigned-off-by: Tarek BOCHKATI \u003ctarek.bouchkati@gmail.com\u003e\n"}},"165b661e6f454e1c774db36c95b66438530d13ee":{"kind":"REWORK","_number":4,"created":"2019-04-29 16:16:26.000000000","uploader":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"ref":"refs/changes/30/5130/4","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/30/5130/4","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/4 \u0026\u0026 git checkout -b change-5130 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/4 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/4 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/4 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/30/5130/4","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/30/5130/4 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"bbdb820c82d65cd11abdc329eaa91d410690436e","subject":"flash/fespi: Use COMMAND_PARSE_ADDRESS"}],"author":{"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","date":"2019-04-29 16:13:07.000000000","tz":120},"committer":{"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","date":"2019-04-29 16:13:07.000000000","tz":120},"subject":"tcl/target/stm32h7x: add support of dual core variant of STM32H7","message":"tcl/target/stm32h7x: add support of dual core variant of STM32H7\n\nSTM32H7x7 and STM32H7x5 devices contains two cores : CM7 + CM4\nThe second core creation is only done when\n  * DUAL_CORE variable is set to true\n  * non HLA interface is used\n\nA second check for the second core existence is done in cpu1 examine-end\nOnce the second core is detected it gets examined.\n\n\nChange-Id: Iad9c30826965ddb9be5dee628bc2e63f953bbcb8\nSigned-off-by: Tarek BOCHKATI \u003ctarek.bouchkati@gmail.com\u003e\n"}}},"requirements":[],"submit_records":[],"submit_requirements":[]}