)]}'
{"/PATCHSET_LEVEL":[{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"062132ee1b345f2c53242063e33468a580943d43","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"8718a2be_a85d53af","updated":"2023-09-07 11:49:54.000000000","message":"I agree with the comment from Matthias.\nPlease check https://review.openocd.org/7887/ as replacement of this patch.","commit_id":"3953061d9b1229579228e5af7f85c67bb0a26088"}],"src/target/armv8.c":[{"author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"change_message_id":"405e356a31a80ac648951c393ff3d5f601060580","unresolved":false,"context_lines":[{"line_number":401,"context_line":"\tcase ARMV8_ESR_EL3: /* FIXME: no equivalent in aarch32? */"},{"line_number":402,"context_line":"\t\t/* avoid false errors in state polling which may lead to reexamine the"},{"line_number":403,"context_line":"\t\t * target and re-execute examine-state and examine-end event handlers */"},{"line_number":404,"context_line":"\t\tLOG_WARNING(\"Unsupported read from ESR_EL3 in AArch32 state\");"},{"line_number":405,"context_line":"\t\tretval \u003d ERROR_OK;"},{"line_number":406,"context_line":"\t\tbreak;"},{"line_number":407,"context_line":"\tcase ARMV8_SPSR_EL1: /* mapped to SPSR_svc */"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"2e76d7c5_1f7de617","line":404,"range":{"start_line":404,"start_character":2,"end_line":404,"end_character":64},"updated":"2020-03-13 14:00:28.000000000","message":"maybe it\u0027s too noisy to throw this warning for each access.\npossibly we can print it once and ignore further accesses","commit_id":"829ecc72dc656b7494d370e61be1098f52e0d5ff"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"b41c3a449b6d7ac964787778655d4fed972278fc","unresolved":false,"context_lines":[{"line_number":401,"context_line":"\tcase ARMV8_ESR_EL3: /* FIXME: no equivalent in aarch32? */"},{"line_number":402,"context_line":"\t\t/* avoid false errors in state polling which may lead to reexamine the"},{"line_number":403,"context_line":"\t\t * target and re-execute examine-state and examine-end event handlers */"},{"line_number":404,"context_line":"\t\tLOG_WARNING(\"Unsupported read from ESR_EL3 in AArch32 state\");"},{"line_number":405,"context_line":"\t\tretval \u003d ERROR_OK;"},{"line_number":406,"context_line":"\t\tbreak;"},{"line_number":407,"context_line":"\tcase ARMV8_SPSR_EL1: /* mapped to SPSR_svc */"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"2e76d7c5_7fb2dae5","line":404,"range":{"start_line":404,"start_character":2,"end_line":404,"end_character":64},"in_reply_to":"2e76d7c5_1f7de617","updated":"2020-03-13 16:48:38.000000000","message":"I would wait the reply from ARM or some aarch64 expert. If the register does not exist, then there should be no need to log a warning and this should be ignored or fixed somewhere else.","commit_id":"829ecc72dc656b7494d370e61be1098f52e0d5ff"},{"author":{"_account_id":1001765,"name":"Kevin Yang","email":"kangyang@google.com","username":"kangyang_google"},"change_message_id":"593c1b6df7a42812a42d21ab03adcf8fbfeb7a62","unresolved":false,"context_lines":[{"line_number":401,"context_line":"\tcase ARMV8_ESR_EL3: /* FIXME: no equivalent in aarch32? */"},{"line_number":402,"context_line":"\t\t/* avoid false errors in state polling which may lead to reexamine the"},{"line_number":403,"context_line":"\t\t * target and re-execute examine-state and examine-end event handlers */"},{"line_number":404,"context_line":"\t\tLOG_WARNING(\"Unsupported read from ESR_EL3 in AArch32 state\");"},{"line_number":405,"context_line":"\t\tretval \u003d ERROR_OK;"},{"line_number":406,"context_line":"\t\tbreak;"},{"line_number":407,"context_line":"\tcase ARMV8_SPSR_EL1: /* mapped to SPSR_svc */"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"ceda9b01_f0962097","line":404,"range":{"start_line":404,"start_character":2,"end_line":404,"end_character":64},"in_reply_to":"2e76d7c5_7fb2dae5","updated":"2020-10-15 23:15:51.000000000","message":"I think we can remove the warning.\n\nFor aarch32,\n\"If a Data Abort exception is taken to Abort mode at EL1 or EL3 and the exception is taken from\nAArch32 state and using the Short-descriptor translation table format, the DFSR reports the exception\nusing the Short-descriptor format fault encoding. For exceptions other than Data Abort exceptions\ntaken to Abort mode, DFSR is not updated.\"\n\nI have check armv8-A/R/M profile, none of them mention ESR_EL3 equivalent","commit_id":"829ecc72dc656b7494d370e61be1098f52e0d5ff"},{"author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"change_message_id":"405e356a31a80ac648951c393ff3d5f601060580","unresolved":false,"context_lines":[{"line_number":538,"context_line":"\tcase ARMV8_ESR_EL3: /* FIXME: no equivalent in aarch32? */"},{"line_number":539,"context_line":"\t\t/* avoid false errors in state polling which may lead to reexamine the"},{"line_number":540,"context_line":"\t\t * target and re-execute examine-state and examine-end event handlers */"},{"line_number":541,"context_line":"\t\tLOG_WARNING(\"Unsupported write to ESR_EL3 in AArch32 state\");"},{"line_number":542,"context_line":"\t\tretval \u003d ERROR_OK;"},{"line_number":543,"context_line":"\t\tbreak;"},{"line_number":544,"context_line":"\tcase ARMV8_SPSR_EL1: /* mapped to SPSR_svc */"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"2e76d7c5_ff7fca0f","line":541,"range":{"start_line":541,"start_character":2,"end_line":541,"end_character":63},"updated":"2020-03-13 14:00:28.000000000","message":"same","commit_id":"829ecc72dc656b7494d370e61be1098f52e0d5ff"}]}