)]}'
{"src/flash/nor/stm32l4x.c":[{"author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"change_message_id":"ed03bcf18fa5641a027e0a85f9a82ec1d148be0f","unresolved":false,"context_lines":[{"line_number":1580,"context_line":"\t\tuint32_t uid64_ids;"},{"line_number":1581,"context_line":""},{"line_number":1582,"context_line":"\t\tretval \u003d target_read_u32(bank-\u003etarget, UID64_IDS, \u0026uid64_ids);"},{"line_number":1583,"context_line":"\t\tif (retval !\u003d ERROR_OK)"},{"line_number":1584,"context_line":"\t\t\treturn retval;"},{"line_number":1585,"context_line":""},{"line_number":1586,"context_line":"\t\tif (uid64_ids \u003d\u003d UID64_IDS_STM32WL) {"},{"line_number":1587,"context_line":"\t\t\t/* force the DEV_ID to 0x497 and the REV_ID to unknown */"}],"source_content_type":"text/x-csrc","patch_set":12,"id":"2ecb373e_2ea0c73d","line":1584,"range":{"start_line":1583,"start_character":0,"end_line":1584,"end_character":17},"updated":"2021-08-16 19:55:15.000000000","message":"reading again this code, we should not return here, in order to keep the same error message \"can\u0027t get the device id\"","commit_id":"92bc04103fd9746e4e7176e2ceded1ab0927c644"},{"author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"change_message_id":"27a0917e5d7325dcb51f1129bcc1f0ea5d49b563","unresolved":false,"context_lines":[{"line_number":1570,"context_line":"\t\t\treturn ERROR_OK;"},{"line_number":1571,"context_line":"\t}"},{"line_number":1572,"context_line":""},{"line_number":1573,"context_line":"\t/* Workaround for STM32WL5x devices:"},{"line_number":1574,"context_line":"\t * DBGMCU_IDCODE cannot be read using CPU1 (Cortex-M0+) at AP1,"},{"line_number":1575,"context_line":"\t * to solve this read the UID64 (IEEE 64-bit unique device ID register) */"},{"line_number":1576,"context_line":""},{"line_number":1577,"context_line":"\tstruct cortex_m_common *cortex_m \u003d target_to_cm(bank-\u003etarget);"},{"line_number":1578,"context_line":""},{"line_number":1579,"context_line":"\tif (cortex_m-\u003ecore_info-\u003epartno \u003d\u003d CORTEX_M0P_PARTNO \u0026\u0026 cortex_m-\u003earmv7m.debug_ap-\u003eap_num \u003d\u003d 1) {"},{"line_number":1580,"context_line":"\t\tuint32_t uid64_ids;"},{"line_number":1581,"context_line":""},{"line_number":1582,"context_line":"\t\tretval \u003d target_read_u32(bank-\u003etarget, UID64_IDS, \u0026uid64_ids);"},{"line_number":1583,"context_line":"\t\tif (retval !\u003d ERROR_OK)"},{"line_number":1584,"context_line":"\t\t\treturn retval;"},{"line_number":1585,"context_line":""},{"line_number":1586,"context_line":"\t\tif (uid64_ids \u003d\u003d UID64_IDS_STM32WL) {"},{"line_number":1587,"context_line":"\t\t\t/* force the DEV_ID to 0x497 and the REV_ID to unknown */"},{"line_number":1588,"context_line":"\t\t\t*id \u003d 0x00000497;"},{"line_number":1589,"context_line":"\t\t\treturn ERROR_OK;"},{"line_number":1590,"context_line":"\t\t}"},{"line_number":1591,"context_line":"\t}"},{"line_number":1592,"context_line":""},{"line_number":1593,"context_line":"\tLOG_ERROR(\"can\u0027t get the device id\");"},{"line_number":1594,"context_line":"\treturn (retval \u003d\u003d ERROR_OK) ? ERROR_FAIL : retval;"}],"source_content_type":"text/x-csrc","patch_set":12,"id":"2ecb373e_0e5e2b7c","line":1591,"range":{"start_line":1573,"start_character":0,"end_line":1591,"end_character":2},"updated":"2021-08-16 16:22:07.000000000","message":"here we check for the UID64 as a workaround","commit_id":"92bc04103fd9746e4e7176e2ceded1ab0927c644"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"1d4e0a742ead8471513ad58dc9ba1a341c7aeece","unresolved":true,"context_lines":[{"line_number":1579,"context_line":"\tif (cortex_m-\u003ecore_info-\u003epartno \u003d\u003d CORTEX_M0P_PARTNO \u0026\u0026 cortex_m-\u003earmv7m.debug_ap-\u003eap_num \u003d\u003d 1) {"},{"line_number":1580,"context_line":"\t\tuint32_t uid64_ids;"},{"line_number":1581,"context_line":""},{"line_number":1582,"context_line":"\t\tretval \u003d target_read_u32(bank-\u003etarget, UID64_IDS, \u0026uid64_ids);"},{"line_number":1583,"context_line":"\t\tif (retval \u003d\u003d ERROR_OK \u0026\u0026 uid64_ids \u003d\u003d UID64_IDS_STM32WL) {"},{"line_number":1584,"context_line":"\t\t\t/* force the DEV_ID to 0x497 and the REV_ID to unknown */"},{"line_number":1585,"context_line":"\t\t\t*id \u003d 0x00000497;"}],"source_content_type":"text/x-csrc","patch_set":14,"id":"1d689578_76587577","line":1582,"updated":"2021-08-26 06:50:33.000000000","message":"It would be better to add comment here, why you read only 32bit of the 64bit ID.","commit_id":"00b9d3049337e2aa06f10f37073ef3e831e1b542"},{"author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"change_message_id":"1a68c910a7996027f82a5e9e4d2099dae68e2943","unresolved":false,"context_lines":[{"line_number":1579,"context_line":"\tif (cortex_m-\u003ecore_info-\u003epartno \u003d\u003d CORTEX_M0P_PARTNO \u0026\u0026 cortex_m-\u003earmv7m.debug_ap-\u003eap_num \u003d\u003d 1) {"},{"line_number":1580,"context_line":"\t\tuint32_t uid64_ids;"},{"line_number":1581,"context_line":""},{"line_number":1582,"context_line":"\t\tretval \u003d target_read_u32(bank-\u003etarget, UID64_IDS, \u0026uid64_ids);"},{"line_number":1583,"context_line":"\t\tif (retval \u003d\u003d ERROR_OK \u0026\u0026 uid64_ids \u003d\u003d UID64_IDS_STM32WL) {"},{"line_number":1584,"context_line":"\t\t\t/* force the DEV_ID to 0x497 and the REV_ID to unknown */"},{"line_number":1585,"context_line":"\t\t\t*id \u003d 0x00000497;"}],"source_content_type":"text/x-csrc","patch_set":14,"id":"984de315_84c92225","line":1582,"in_reply_to":"1d689578_76587577","updated":"2021-08-26 12:52:01.000000000","message":"Done","commit_id":"00b9d3049337e2aa06f10f37073ef3e831e1b542"}],"tcl/target/stm32wlx.cfg":[{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"4fcded1850d7fe815007f36c07402959bb039a0c","unresolved":false,"context_lines":[{"line_number":166,"context_line":"# like mmw, but with target selection"},{"line_number":167,"context_line":"proc stm32wlx_mmw {used_target reg setbits clearbits} {"},{"line_number":168,"context_line":"\tset old [stm32wlx_mrw $used_target $reg]"},{"line_number":169,"context_line":"\tset new [expr ($old \u0026 ~$clearbits) | $setbits]"},{"line_number":170,"context_line":"\t$used_target mww $reg $new"},{"line_number":171,"context_line":"}"},{"line_number":172,"context_line":""}],"source_content_type":"text/x-ttcn-cfg","patch_set":11,"id":"2ecb373e_0e95cb35","line":169,"updated":"2021-08-16 09:53:12.000000000","message":"Again expr syntax issue with jimtcl 0.81","commit_id":"168d49298df8221978be4bbfd21740c9f881c7b8"},{"author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"change_message_id":"27a0917e5d7325dcb51f1129bcc1f0ea5d49b563","unresolved":false,"context_lines":[{"line_number":166,"context_line":"# like mmw, but with target selection"},{"line_number":167,"context_line":"proc stm32wlx_mmw {used_target reg setbits clearbits} {"},{"line_number":168,"context_line":"\tset old [stm32wlx_mrw $used_target $reg]"},{"line_number":169,"context_line":"\tset new [expr ($old \u0026 ~$clearbits) | $setbits]"},{"line_number":170,"context_line":"\t$used_target mww $reg $new"},{"line_number":171,"context_line":"}"},{"line_number":172,"context_line":""}],"source_content_type":"text/x-ttcn-cfg","patch_set":11,"id":"2ecb373e_6e69ef1c","line":169,"in_reply_to":"2ecb373e_0e95cb35","updated":"2021-08-16 16:22:07.000000000","message":"Done","commit_id":"168d49298df8221978be4bbfd21740c9f881c7b8"}]}