)]}'
{"/PATCHSET_LEVEL":[{"author":{"_account_id":1001928,"name":"Jeremy Garff","email":"jeremy.garff@wdc.com","username":"jerwd"},"change_message_id":"dfb12f2823cfc40631051f54937128e355aaa218","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":6,"id":"308ce03a_ffac3252","updated":"2021-09-24 16:49:49.000000000","message":"Thanks for taking the time to review this.  Replying to comments.","commit_id":"f0cd08c87edf41bf9eb57f88e72e8d0ebfb45484"},{"author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"change_message_id":"59bbc508daa893caad4ede4c38e84d71d9062193","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":6,"id":"66ce00f9_0af06592","updated":"2021-09-24 07:54:22.000000000","message":"just some minor comments","commit_id":"f0cd08c87edf41bf9eb57f88e72e8d0ebfb45484"},{"author":{"_account_id":1001928,"name":"Jeremy Garff","email":"jeremy.garff@wdc.com","username":"jerwd"},"change_message_id":"7dae7530fdce06f36522e8705df12f02d9d5f46e","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":7,"id":"bc758f62_1275b395","updated":"2021-09-27 15:13:53.000000000","message":"Address review comments.","commit_id":"fdf369d898dde1bf01f3721184bec628d15adda7"}],"src/jtag/drivers/xlnx-axi-xvc.c":[{"author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"change_message_id":"59bbc508daa893caad4ede4c38e84d71d9062193","unresolved":true,"context_lines":[{"line_number":1,"context_line":"/***************************************************************************"},{"line_number":2,"context_line":" *\t Copyright (C) 2019 Google, LLC.\t\t\t\t\t\t\t\t\t   *"},{"line_number":3,"context_line":" *\t Moritz Fischer \u003cmoritzf@google.com\u003e\t\t\t\t\t\t\t\t   *"},{"line_number":4,"context_line":" *\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t   *"},{"line_number":5,"context_line":" *\t Copyright (C) 2021 Western Digital Corporation or its affiliates\t   *"},{"line_number":6,"context_line":" *\t Jeremy Garff \u003cjeremy.garff@wdc.com\u003e\t\t\t\t\t\t\t\t   *"},{"line_number":7,"context_line":" *\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t   *"},{"line_number":8,"context_line":" *\t This program is free software; you can redistribute it and/or modify  *"},{"line_number":9,"context_line":" *\t it under the terms of the GNU General Public License as published by  *"},{"line_number":10,"context_line":" *\t the Free Software Foundation; either version 2 of the License, or\t   *"},{"line_number":11,"context_line":" *\t (at your option) any later version.\t\t\t\t\t\t\t\t   *"},{"line_number":12,"context_line":" *\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t   *"},{"line_number":13,"context_line":" *\t This program is distributed in the hope that it will be useful,\t   *"},{"line_number":14,"context_line":" *\t but WITHOUT ANY WARRANTY; without even the implied warranty of\t\t   *"},{"line_number":15,"context_line":" *\t MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\t\t   *"},{"line_number":16,"context_line":" *\t GNU General Public License for more details.\t\t\t\t\t\t   *"},{"line_number":17,"context_line":" *\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t   *"},{"line_number":18,"context_line":" *\t You should have received a copy of the GNU General Public License\t   *"},{"line_number":19,"context_line":" *\t along with this program.  If not, see \u003chttp://www.gnu.org/licenses/\u003e. *"},{"line_number":20,"context_line":"***************************************************************************/"},{"line_number":21,"context_line":""},{"line_number":22,"context_line":"/*"},{"line_number":23,"context_line":" * This implementation was derived from the PCIe Xilinx Debug Bridge driver"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"0617ffa3_9ea436a4","line":20,"range":{"start_line":1,"start_character":0,"end_line":20,"end_character":76},"updated":"2021-09-24 07:54:22.000000000","message":"Please use SPDX","commit_id":"f0cd08c87edf41bf9eb57f88e72e8d0ebfb45484"},{"author":{"_account_id":1001928,"name":"Jeremy Garff","email":"jeremy.garff@wdc.com","username":"jerwd"},"change_message_id":"dfb12f2823cfc40631051f54937128e355aaa218","unresolved":true,"context_lines":[{"line_number":1,"context_line":"/***************************************************************************"},{"line_number":2,"context_line":" *\t Copyright (C) 2019 Google, LLC.\t\t\t\t\t\t\t\t\t   *"},{"line_number":3,"context_line":" *\t Moritz Fischer \u003cmoritzf@google.com\u003e\t\t\t\t\t\t\t\t   *"},{"line_number":4,"context_line":" *\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t   *"},{"line_number":5,"context_line":" *\t Copyright (C) 2021 Western Digital Corporation or its affiliates\t   *"},{"line_number":6,"context_line":" *\t Jeremy Garff \u003cjeremy.garff@wdc.com\u003e\t\t\t\t\t\t\t\t   *"},{"line_number":7,"context_line":" *\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t   *"},{"line_number":8,"context_line":" *\t This program is free software; you can redistribute it and/or modify  *"},{"line_number":9,"context_line":" *\t it under the terms of the GNU General Public License as published by  *"},{"line_number":10,"context_line":" *\t the Free Software Foundation; either version 2 of the License, or\t   *"},{"line_number":11,"context_line":" *\t (at your option) any later version.\t\t\t\t\t\t\t\t   *"},{"line_number":12,"context_line":" *\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t   *"},{"line_number":13,"context_line":" *\t This program is distributed in the hope that it will be useful,\t   *"},{"line_number":14,"context_line":" *\t but WITHOUT ANY WARRANTY; without even the implied warranty of\t\t   *"},{"line_number":15,"context_line":" *\t MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\t\t   *"},{"line_number":16,"context_line":" *\t GNU General Public License for more details.\t\t\t\t\t\t   *"},{"line_number":17,"context_line":" *\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t   *"},{"line_number":18,"context_line":" *\t You should have received a copy of the GNU General Public License\t   *"},{"line_number":19,"context_line":" *\t along with this program.  If not, see \u003chttp://www.gnu.org/licenses/\u003e. *"},{"line_number":20,"context_line":"***************************************************************************/"},{"line_number":21,"context_line":""},{"line_number":22,"context_line":"/*"},{"line_number":23,"context_line":" * This implementation was derived from the PCIe Xilinx Debug Bridge driver"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"345d2616_7ca82f62","line":20,"range":{"start_line":1,"start_character":0,"end_line":20,"end_character":76},"in_reply_to":"0617ffa3_9ea436a4","updated":"2021-09-24 16:49:49.000000000","message":"Will do.  Thanks.","commit_id":"f0cd08c87edf41bf9eb57f88e72e8d0ebfb45484"},{"author":{"_account_id":1001928,"name":"Jeremy Garff","email":"jeremy.garff@wdc.com","username":"jerwd"},"change_message_id":"7dae7530fdce06f36522e8705df12f02d9d5f46e","unresolved":false,"context_lines":[{"line_number":1,"context_line":"/***************************************************************************"},{"line_number":2,"context_line":" *\t Copyright (C) 2019 Google, LLC.\t\t\t\t\t\t\t\t\t   *"},{"line_number":3,"context_line":" *\t Moritz Fischer \u003cmoritzf@google.com\u003e\t\t\t\t\t\t\t\t   *"},{"line_number":4,"context_line":" *\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t   *"},{"line_number":5,"context_line":" *\t Copyright (C) 2021 Western Digital Corporation or its affiliates\t   *"},{"line_number":6,"context_line":" *\t Jeremy Garff \u003cjeremy.garff@wdc.com\u003e\t\t\t\t\t\t\t\t   *"},{"line_number":7,"context_line":" *\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t   *"},{"line_number":8,"context_line":" *\t This program is free software; you can redistribute it and/or modify  *"},{"line_number":9,"context_line":" *\t it under the terms of the GNU General Public License as published by  *"},{"line_number":10,"context_line":" *\t the Free Software Foundation; either version 2 of the License, or\t   *"},{"line_number":11,"context_line":" *\t (at your option) any later version.\t\t\t\t\t\t\t\t   *"},{"line_number":12,"context_line":" *\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t   *"},{"line_number":13,"context_line":" *\t This program is distributed in the hope that it will be useful,\t   *"},{"line_number":14,"context_line":" *\t but WITHOUT ANY WARRANTY; without even the implied warranty of\t\t   *"},{"line_number":15,"context_line":" *\t MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\t\t   *"},{"line_number":16,"context_line":" *\t GNU General Public License for more details.\t\t\t\t\t\t   *"},{"line_number":17,"context_line":" *\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t   *"},{"line_number":18,"context_line":" *\t You should have received a copy of the GNU General Public License\t   *"},{"line_number":19,"context_line":" *\t along with this program.  If not, see \u003chttp://www.gnu.org/licenses/\u003e. *"},{"line_number":20,"context_line":"***************************************************************************/"},{"line_number":21,"context_line":""},{"line_number":22,"context_line":"/*"},{"line_number":23,"context_line":" * This implementation was derived from the PCIe Xilinx Debug Bridge driver"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"25cd9889_8bdfab5f","line":20,"range":{"start_line":1,"start_character":0,"end_line":20,"end_character":76},"in_reply_to":"345d2616_7ca82f62","updated":"2021-09-27 15:13:53.000000000","message":"Done","commit_id":"f0cd08c87edf41bf9eb57f88e72e8d0ebfb45484"},{"author":{"_account_id":1000863,"name":"Tarek BOCHKATI","email":"tarek.bouchkati@gmail.com","username":"BouchkatiTarek"},"change_message_id":"59bbc508daa893caad4ede4c38e84d71d9062193","unresolved":true,"context_lines":[{"line_number":21,"context_line":""},{"line_number":22,"context_line":"/*"},{"line_number":23,"context_line":" * This implementation was derived from the PCIe Xilinx Debug Bridge driver"},{"line_number":24,"context_line":" * found in xlnx-pcie-xvc.c.  Instead of using PCIe, this driver is used"},{"line_number":25,"context_line":" * for direct AXI connections.\tThis is useful where OpenOCD is running in"},{"line_number":26,"context_line":" * a Zynq or on a MicroBlaze with direct access to the register interface."},{"line_number":27,"context_line":" * of the debug bridge."}],"source_content_type":"text/x-csrc","patch_set":6,"id":"d8e7f05c_e88fb9d2","line":24,"range":{"start_line":24,"start_character":12,"end_line":24,"end_character":27},"updated":"2021-09-24 07:54:22.000000000","message":"first looking at this I have compared both files, I see a huge chunck of common code.\n\nSo I\u0027m wondering if it is possible to merge these two drivers into one. and then the user can select the backend (PCIE or AXI) like in CMSIS-DAP (HID or BULK) and ST-LINK (USB or TCP) drivers, in order to reduce the maintenance effort.","commit_id":"f0cd08c87edf41bf9eb57f88e72e8d0ebfb45484"},{"author":{"_account_id":1001700,"name":"Moritz Fischer","email":"moritzf@google.com","username":"moritzf"},"change_message_id":"5f9885387dd220d510d61a46cf3e7c1bf66371f5","unresolved":true,"context_lines":[{"line_number":21,"context_line":""},{"line_number":22,"context_line":"/*"},{"line_number":23,"context_line":" * This implementation was derived from the PCIe Xilinx Debug Bridge driver"},{"line_number":24,"context_line":" * found in xlnx-pcie-xvc.c.  Instead of using PCIe, this driver is used"},{"line_number":25,"context_line":" * for direct AXI connections.\tThis is useful where OpenOCD is running in"},{"line_number":26,"context_line":" * a Zynq or on a MicroBlaze with direct access to the register interface."},{"line_number":27,"context_line":" * of the debug bridge."}],"source_content_type":"text/x-csrc","patch_set":6,"id":"04c93a1b_cc16fd00","line":24,"range":{"start_line":24,"start_character":12,"end_line":24,"end_character":27},"in_reply_to":"246dbaa8_0acbc5c6","updated":"2021-10-06 16:52:09.000000000","message":"Sorry I missed this till now. Yes. Please integrate it into the xlnx-pcie-xvc.c (Maybe rename it to xlnx-xvc.c) then, that has always been my intention, just never got around to it.\n\nIn terms of mechanisms, I\u0027d strongly discourage you to *not* use /dev/mem but rather make it a character device that exports mmap.\n\nThat way you can enable use-cases where people actually properly export this as part of a MFD driver binding to their device (or using a kernel driver) that gates access.\n\nHappy to review changes (email me if I miss the gerrit notifications)","commit_id":"f0cd08c87edf41bf9eb57f88e72e8d0ebfb45484"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"0402e5bbc524ab3714acacf8309e8c88cbb1295d","unresolved":true,"context_lines":[{"line_number":21,"context_line":""},{"line_number":22,"context_line":"/*"},{"line_number":23,"context_line":" * This implementation was derived from the PCIe Xilinx Debug Bridge driver"},{"line_number":24,"context_line":" * found in xlnx-pcie-xvc.c.  Instead of using PCIe, this driver is used"},{"line_number":25,"context_line":" * for direct AXI connections.\tThis is useful where OpenOCD is running in"},{"line_number":26,"context_line":" * a Zynq or on a MicroBlaze with direct access to the register interface."},{"line_number":27,"context_line":" * of the debug bridge."}],"source_content_type":"text/x-csrc","patch_set":6,"id":"246dbaa8_0acbc5c6","line":24,"range":{"start_line":24,"start_character":12,"end_line":24,"end_character":27},"in_reply_to":"44dd7037_1ad0387a","updated":"2021-10-02 10:02:01.000000000","message":"This patch is here in gerrit, so people interest in it can already cheery-pick it.\nMaintainers are volunteers and also have limited amount of time. I would prefer reviewing directly the final addition to xlnx-pcie-xvc instead of reviewing this and the merge later.\nPlus we can involve Moritz Fischer to verify the AXI addition doesn\u0027t break the PCIe part.","commit_id":"f0cd08c87edf41bf9eb57f88e72e8d0ebfb45484"},{"author":{"_account_id":1001928,"name":"Jeremy Garff","email":"jeremy.garff@wdc.com","username":"jerwd"},"change_message_id":"425f5cc5dc1e2255bdcc34ffb3858e6b7cfbcfcc","unresolved":true,"context_lines":[{"line_number":21,"context_line":""},{"line_number":22,"context_line":"/*"},{"line_number":23,"context_line":" * This implementation was derived from the PCIe Xilinx Debug Bridge driver"},{"line_number":24,"context_line":" * found in xlnx-pcie-xvc.c.  Instead of using PCIe, this driver is used"},{"line_number":25,"context_line":" * for direct AXI connections.\tThis is useful where OpenOCD is running in"},{"line_number":26,"context_line":" * a Zynq or on a MicroBlaze with direct access to the register interface."},{"line_number":27,"context_line":" * of the debug bridge."}],"source_content_type":"text/x-csrc","patch_set":6,"id":"6a8b218d_825aea95","line":24,"range":{"start_line":24,"start_character":12,"end_line":24,"end_character":27},"in_reply_to":"45b0991a_544b3868","updated":"2021-09-24 16:58:25.000000000","message":"Additionally, I should mention that I don\u0027t have the needed hardware to test over PCIe.  Because of this, I wouldn\u0027t be able to verify that I didn\u0027t break anything on the PCIe implementation.","commit_id":"f0cd08c87edf41bf9eb57f88e72e8d0ebfb45484"},{"author":{"_account_id":1001928,"name":"Jeremy Garff","email":"jeremy.garff@wdc.com","username":"jerwd"},"change_message_id":"7dae7530fdce06f36522e8705df12f02d9d5f46e","unresolved":false,"context_lines":[{"line_number":21,"context_line":""},{"line_number":22,"context_line":"/*"},{"line_number":23,"context_line":" * This implementation was derived from the PCIe Xilinx Debug Bridge driver"},{"line_number":24,"context_line":" * found in xlnx-pcie-xvc.c.  Instead of using PCIe, this driver is used"},{"line_number":25,"context_line":" * for direct AXI connections.\tThis is useful where OpenOCD is running in"},{"line_number":26,"context_line":" * a Zynq or on a MicroBlaze with direct access to the register interface."},{"line_number":27,"context_line":" * of the debug bridge."}],"source_content_type":"text/x-csrc","patch_set":6,"id":"44dd7037_1ad0387a","line":24,"range":{"start_line":24,"start_character":12,"end_line":24,"end_character":27},"in_reply_to":"6a8b218d_825aea95","updated":"2021-09-27 15:13:53.000000000","message":"Ack","commit_id":"f0cd08c87edf41bf9eb57f88e72e8d0ebfb45484"},{"author":{"_account_id":1001928,"name":"Jeremy Garff","email":"jeremy.garff@wdc.com","username":"jerwd"},"change_message_id":"dfb12f2823cfc40631051f54937128e355aaa218","unresolved":true,"context_lines":[{"line_number":21,"context_line":""},{"line_number":22,"context_line":"/*"},{"line_number":23,"context_line":" * This implementation was derived from the PCIe Xilinx Debug Bridge driver"},{"line_number":24,"context_line":" * found in xlnx-pcie-xvc.c.  Instead of using PCIe, this driver is used"},{"line_number":25,"context_line":" * for direct AXI connections.\tThis is useful where OpenOCD is running in"},{"line_number":26,"context_line":" * a Zynq or on a MicroBlaze with direct access to the register interface."},{"line_number":27,"context_line":" * of the debug bridge."}],"source_content_type":"text/x-csrc","patch_set":6,"id":"45b0991a_544b3868","line":24,"range":{"start_line":24,"start_character":12,"end_line":24,"end_character":27},"in_reply_to":"b5751fae_cfdb2a0a","updated":"2021-09-24 16:49:49.000000000","message":"I completely agree.  You\u0027ll notice that I have a comment further down to that effect.  That is quite a bit of work and testing, and I was hoping to get this in for others to use, and leave that as a future enhancement.  Does that make sense?","commit_id":"f0cd08c87edf41bf9eb57f88e72e8d0ebfb45484"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"18e330120193766cbccfaf8d709e462aa3353be0","unresolved":true,"context_lines":[{"line_number":21,"context_line":""},{"line_number":22,"context_line":"/*"},{"line_number":23,"context_line":" * This implementation was derived from the PCIe Xilinx Debug Bridge driver"},{"line_number":24,"context_line":" * found in xlnx-pcie-xvc.c.  Instead of using PCIe, this driver is used"},{"line_number":25,"context_line":" * for direct AXI connections.\tThis is useful where OpenOCD is running in"},{"line_number":26,"context_line":" * a Zynq or on a MicroBlaze with direct access to the register interface."},{"line_number":27,"context_line":" * of the debug bridge."}],"source_content_type":"text/x-csrc","patch_set":6,"id":"b5751fae_cfdb2a0a","line":24,"range":{"start_line":24,"start_character":12,"end_line":24,"end_character":27},"in_reply_to":"d8e7f05c_e88fb9d2","updated":"2021-09-24 11:06:37.000000000","message":"agree with Tarek, if possible please merge the two. Also consider that you can specify a backend, or even add a second driver in the same file, I mean having two struct adapter_driver in the same file.","commit_id":"f0cd08c87edf41bf9eb57f88e72e8d0ebfb45484"}]}