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Support\nfor those is included in this interface however via libgpio.\n\nSigned-off-by: Jeremy Garff \u003cjeremy.garff@wdc.com\u003e\nChange-Id: I11264b591cbf315a1bc7c9fb1ffe470b449da423\n"},"description":"Edit commit message"},"217d931895f1a87f1c76e47ba131167d7851b643":{"kind":"REWORK","_number":5,"created":"2021-09-23 20:19:35.000000000","uploader":{"_account_id":1001928,"name":"Jeremy Garff","email":"jeremy.garff@wdc.com","username":"jerwd"},"ref":"refs/changes/94/6594/5","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/94/6594/5","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/94/6594/5 \u0026\u0026 git checkout -b change-6594 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/94/6594/5 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/94/6594/5 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/94/6594/5 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/94/6594/5","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/94/6594/5 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"a0bd3c9924870c3b8f428648410181040dabc33c","subject":"Partially Revert \"flash/stm32l4x: introduce flash programming without loader\""}],"author":{"name":"Jeremy Garff","email":"jeremy.garff@wdc.com","date":"2021-09-21 17:45:45.000000000","tz":-360},"committer":{"name":"Jeremy Garff","email":"jeremy.garff@wdc.com","date":"2021-09-23 20:18:29.000000000","tz":-360},"subject":"jtag: drivers: xlnx-axi-xvc: Add support for Xilinx XVC over direct bus interface (AXI)","message":"jtag: drivers: xlnx-axi-xvc: Add support for Xilinx XVC over direct bus interface (AXI)\n\nThis change was derived from the PCIe implementation but is intended to\nbe used with a direct bus connection to the debug bridge instead of going\nacross PCIe.\n\nThis is useful when using on a Zynq/ZynqMP/uBlaze host with direct\naccess to the debug bridge over AXI.  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You can then use the debug bridge\nXilinx IP (AXIXVC) to debug a remote device.\n\nSigned-off-by: Jeremy Garff \u003cjeremy.garff@wdc.com\u003e\nChange-Id: I11264b591cbf315a1bc7c9fb1ffe470b449da423\n"}},"298ad1e38fdb068286d4b9dd4c8b48cd7a325c7a":{"kind":"NO_CODE_CHANGE","_number":3,"created":"2021-09-23 19:50:25.000000000","uploader":{"_account_id":1001928,"name":"Jeremy Garff","email":"jeremy.garff@wdc.com","username":"jerwd"},"ref":"refs/changes/94/6594/3","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/94/6594/3","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/94/6594/3 \u0026\u0026 git checkout -b change-6594 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/94/6594/3 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/94/6594/3 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/94/6594/3 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/94/6594/3","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/94/6594/3 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"a0bd3c9924870c3b8f428648410181040dabc33c","subject":"Partially Revert \"flash/stm32l4x: introduce flash programming without loader\""}],"author":{"name":"Jeremy Garff","email":"jeremy.garff@wdc.com","date":"2021-09-21 17:45:45.000000000","tz":-360},"committer":{"name":"Jeremy Garff","email":"jeremy.garff@wdc.com","date":"2021-09-23 19:50:25.000000000","tz":0},"subject":"jtag: drivers: xlnx-axi-xvc: Add support for Xilinx XVC over direct bus interface (AXI)","message":"jtag: drivers: xlnx-axi-xvc: Add support for Xilinx XVC over direct bus interface (AXI)\n\nThis change was derived from the PCIe implementation but is intended to\nbe used with a direct bus connection to the debug bridge instead of going\nacross PCIe.\n\nThis is useful when using on a Zynq/ZynqMP/uBlaze host with direct\naccess to the debug bridge over AXI.  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