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The power cycle causes the SWJ-DP to restart\nin JTAG mode. If the debugger is using SWD, the mismatch triggers\nan error after the reset command.\nIgnore the error detected by \u0027dap init\u0027 and proceed executing the\nhandler. The error in \u0027dap init\u0027 will force a reconnect during the\nfollowing \u0027dap apid\u0027, restoring the SWD functionality.\n\nChange-Id: I04fcda6a5b8a1b080ab4e8890ecd0754d5ed12d9\nSigned-off-by: Antonio Borneo \u003cborneo.antonio@gmail.com\u003e\n"}},"f4612e06c61f6c46cff936d2c6b48d6f2627ff61":{"kind":"REWORK","_number":2,"created":"2021-10-25 16:11:22.000000000","uploader":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"ref":"refs/changes/99/6599/2","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/99/6599/2","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/99/6599/2 \u0026\u0026 git checkout -b change-6599 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/99/6599/2 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/99/6599/2 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/99/6599/2 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/99/6599/2","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/99/6599/2 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"8a522d96c79aed654fc7273c7c5c3f680c91c333","subject":"flash/nor/psoc6: fix doxygen comment"}],"author":{"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","date":"2021-04-07 17:21:27.000000000","tz":120},"committer":{"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","date":"2021-10-25 16:11:22.000000000","tz":0},"subject":"tcl/stm32mp15x: freeze watchdog, recover SWD after power cycle","message":"tcl/stm32mp15x: freeze watchdog, recover SWD after power cycle\n\nFreeze the IWDG watchdog when cores are halted to prevent a reset\nwhile debugging.\n\nThe PMIC present on some board senses the nsrst and forces a power\ncycle to the target. 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