)]}'
{"/PATCHSET_LEVEL":[{"author":{"_account_id":1001902,"name":"Julien Massot","email":"julien.massot@iot.bzh","username":"julien-massot"},"change_message_id":"d7e3fd1677b9f7542b41d04945ab70d432ccb63e","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":1,"id":"2e5afccb_1036ab82","updated":"2022-01-12 09:27:38.000000000","message":"Hi Marex,\nThank you so much for the support of Renesas Gen4 in OpenOCD.\nTo be able to debug the Cortex-r52 we should target \"aarch64\"\neven if it might be non intuitive. With this patch I\u0027m able\nto probe the Cortex-R52 and display registers.","commit_id":"47447fdf4dda90490926eaa1601967a616eb71c4"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"fe74e49a4542c4e9b4012515669201c71108b9ad","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"83e2e01b_5620bab1","updated":"2022-01-21 17:53:37.000000000","message":"Nice surprise that R52 can be handled by the code as-is. R52 has no MMU!\nLooking in src/target/cortex_a.c, there are differences between struct cortexa_target and cortexr4_target wrt MMU.\nDo we need similar split in aarch64.c introducing, e.g., \"aarch64r\" target type?","commit_id":"aab200e12de0ccd9a91f83ef29b883cb95b97dc5"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"e1ba34f3a24ac3b16978f45e6c417eac44757399","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"04d57f6c_409b5c23","in_reply_to":"17e07d72_eb7a0d18","updated":"2022-01-24 22:20:02.000000000","message":"Fully agree that target cortex-r4 does not apply to Cortex-R52.\nBut still not proved that target aarch64 works, so I would prefer waiting some further info from your bring-up.\nI have added a comment below. No reason to change the patch immediately, let\u0027s wait a little to see how it goes.","commit_id":"aab200e12de0ccd9a91f83ef29b883cb95b97dc5"},{"author":{"_account_id":1001902,"name":"Julien Massot","email":"julien.massot@iot.bzh","username":"julien-massot"},"change_message_id":"1ccca3d325a4a8a4299fcd6270592d22a31d46c2","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"17e07d72_eb7a0d18","in_reply_to":"83e2e01b_5620bab1","updated":"2022-01-24 06:27:20.000000000","message":"Indeed we will need something similar than in cortex_a.c.\nThe reason why it works for me, is because I didn\u0027t enable the MPU yet\non my platform.\n\nSo saying that Cortex-R52 is nicely supported with aarch64 target is a bit\ntoo much :).\n\nI\u0027m still in early bring up of this platform, we will send patches to support\nARMv8-R + MPU later.\n\nHowever I think this patch is correct anyway, the Cortex-r52 should be handled\nby aarch64 target and not cortex-r4.","commit_id":"aab200e12de0ccd9a91f83ef29b883cb95b97dc5"}],"tcl/target/renesas_rcar_gen3.cfg":[{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"e1ba34f3a24ac3b16978f45e6c417eac44757399","unresolved":true,"context_lines":[{"line_number":162,"context_line":"\t\tset _CTINAME $_TARGETNAME.cti"},{"line_number":163,"context_line":"\t\tcti create $_CTINAME -dap $_DAPNAME -ap-num 1 -baseaddr $ctibase"},{"line_number":164,"context_line":"\t\tif { $core_name \u003d\u003d \"r52\" } {"},{"line_number":165,"context_line":"\t\t\tset _command \"target create $_TARGETNAME aarch64 -dap $_DAPNAME \\"},{"line_number":166,"context_line":"\t\t\t\t-ap-num 1 -dbgbase $dbgbase -cti $_CTINAME\""},{"line_number":167,"context_line":"\t\t} else {"},{"line_number":168,"context_line":"\t\t\tset _command \"target create $_TARGETNAME cortex_r4 -dap $_DAPNAME \\"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"9f192619_2d34ae5e","line":165,"updated":"2022-01-24 22:20:02.000000000","message":"Would you mind adding a comment before the target create, something like:\n# TODO: Cortex-R52 is armv8-r. aarch64 allows examining it","commit_id":"aab200e12de0ccd9a91f83ef29b883cb95b97dc5"},{"author":{"_account_id":1001902,"name":"Julien Massot","email":"julien.massot@iot.bzh","username":"julien-massot"},"change_message_id":"2ea9db81d64d0ea07502f05815386eb358db977f","unresolved":true,"context_lines":[{"line_number":162,"context_line":"\t\tset _CTINAME $_TARGETNAME.cti"},{"line_number":163,"context_line":"\t\tcti create $_CTINAME -dap $_DAPNAME -ap-num 1 -baseaddr $ctibase"},{"line_number":164,"context_line":"\t\tif { $core_name \u003d\u003d \"r52\" } {"},{"line_number":165,"context_line":"\t\t\tset _command \"target create $_TARGETNAME aarch64 -dap $_DAPNAME \\"},{"line_number":166,"context_line":"\t\t\t\t-ap-num 1 -dbgbase $dbgbase -cti $_CTINAME\""},{"line_number":167,"context_line":"\t\t} else {"},{"line_number":168,"context_line":"\t\t\tset _command \"target create $_TARGETNAME cortex_r4 -dap $_DAPNAME \\"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"a45fd9b3_e8c34d7f","line":165,"in_reply_to":"9f192619_2d34ae5e","updated":"2022-02-04 09:22:02.000000000","message":"Finally setup MPU on R52 and, made a new target in aarch64. So we now use armv8r target here.","commit_id":"aab200e12de0ccd9a91f83ef29b883cb95b97dc5"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"63b177e2eb223585a29e5fd4cde9bbadd04f35d6","unresolved":false,"context_lines":[{"line_number":162,"context_line":"\t\tset _CTINAME $_TARGETNAME.cti"},{"line_number":163,"context_line":"\t\tcti create $_CTINAME -dap $_DAPNAME -ap-num 1 -baseaddr $ctibase"},{"line_number":164,"context_line":"\t\tif { $core_name \u003d\u003d \"r52\" } {"},{"line_number":165,"context_line":"\t\t\tset _command \"target create $_TARGETNAME aarch64 -dap $_DAPNAME \\"},{"line_number":166,"context_line":"\t\t\t\t-ap-num 1 -dbgbase $dbgbase -cti $_CTINAME\""},{"line_number":167,"context_line":"\t\t} else {"},{"line_number":168,"context_line":"\t\t\tset _command \"target create $_TARGETNAME cortex_r4 -dap $_DAPNAME \\"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"2bdc7465_3ce6e35a","line":165,"in_reply_to":"a45fd9b3_e8c34d7f","updated":"2023-04-11 15:58:00.000000000","message":"Done","commit_id":"aab200e12de0ccd9a91f83ef29b883cb95b97dc5"}]}