)]}'
{"/PATCHSET_LEVEL":[{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"3b4b5d1f69d831c6b2f12617f1b33fc2a4563f87","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":4,"id":"1e0c1d24_ac4aad29","updated":"2022-01-21 15:30:22.000000000","message":"thanks!","commit_id":"3d8bbcc49d107e3dc49f4e9109a0818675209432"}],"tcl/board/evb-lan9255.cfg":[{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"460ff9515561058851a1603bd0b90c14c784c577","unresolved":true,"context_lines":[{"line_number":1,"context_line":"#"},{"line_number":2,"context_line":"# Microchip LAN9255 evaluation board with an Atmel-ICE"},{"line_number":3,"context_line":"# https://www.microchip.com/en-us/development-tool/EV25Y25A"},{"line_number":4,"context_line":"#"}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"a7f786c9_d83b371c","line":1,"updated":"2022-01-21 13:51:09.000000000","message":"Please add as first line:\n# SPDX-License-Identifier: GPL-2.0-or-later","commit_id":"b0f52787a0074a1f5d71f9b59a425d284447ca78"},{"author":{"_account_id":1001955,"name":"Hans-Erik Floryd","email":"hans-erik.floryd@rt-labs.com","username":"hefloryd"},"change_message_id":"71bd1599c326e266ba7668c99c9d3b0474226799","unresolved":false,"context_lines":[{"line_number":1,"context_line":"#"},{"line_number":2,"context_line":"# Microchip LAN9255 evaluation board with an Atmel-ICE"},{"line_number":3,"context_line":"# https://www.microchip.com/en-us/development-tool/EV25Y25A"},{"line_number":4,"context_line":"#"}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"b0678d90_2ebc97e7","line":1,"in_reply_to":"a7f786c9_d83b371c","updated":"2022-01-21 14:39:07.000000000","message":"Done","commit_id":"b0f52787a0074a1f5d71f9b59a425d284447ca78"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"460ff9515561058851a1603bd0b90c14c784c577","unresolved":true,"context_lines":[{"line_number":3,"context_line":"# https://www.microchip.com/en-us/development-tool/EV25Y25A"},{"line_number":4,"context_line":"#"},{"line_number":5,"context_line":""},{"line_number":6,"context_line":"source [find interface/cmsis-dap.cfg]"},{"line_number":7,"context_line":""},{"line_number":8,"context_line":"set CHIPNAME same53"},{"line_number":9,"context_line":""}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"32375f5d_313237f5","line":6,"updated":"2022-01-21 13:51:09.000000000","message":"The board in the link above does not integrate any cmsis-dap interface.\nThis line should be removed to let users connect the interface they want.","commit_id":"b0f52787a0074a1f5d71f9b59a425d284447ca78"},{"author":{"_account_id":1001955,"name":"Hans-Erik Floryd","email":"hans-erik.floryd@rt-labs.com","username":"hefloryd"},"change_message_id":"71bd1599c326e266ba7668c99c9d3b0474226799","unresolved":false,"context_lines":[{"line_number":3,"context_line":"# https://www.microchip.com/en-us/development-tool/EV25Y25A"},{"line_number":4,"context_line":"#"},{"line_number":5,"context_line":""},{"line_number":6,"context_line":"source [find interface/cmsis-dap.cfg]"},{"line_number":7,"context_line":""},{"line_number":8,"context_line":"set CHIPNAME same53"},{"line_number":9,"context_line":""}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"711ce8e2_b5ef41ad","line":6,"in_reply_to":"32375f5d_313237f5","updated":"2022-01-21 14:39:07.000000000","message":"Done","commit_id":"b0f52787a0074a1f5d71f9b59a425d284447ca78"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"460ff9515561058851a1603bd0b90c14c784c577","unresolved":true,"context_lines":[{"line_number":10,"context_line":"source [find target/atsame5x.cfg]"},{"line_number":11,"context_line":""},{"line_number":12,"context_line":"# srst_only results in target running for a while after"},{"line_number":13,"context_line":"# reset. trst_only leaves CPU at reset vector."},{"line_number":14,"context_line":"reset_config trst_only"}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"d8afe0f9_6b8ef13c","line":13,"updated":"2022-01-21 13:51:09.000000000","message":"I\u0027m surprised by this comment.\nThe command \"reset\", that drives SRST pin, must left the target running.\nIt\u0027s the command \"reset halt\" that is supposed to halt the target in reset vector.\nThe pin TRST should have no impact on any target but should only reset the JTAG port. Plus this board doesn\u0027t expose any TRST pin! Is this odd behavior caused by a bug in OpenOCD?\nWhich connector are you using on the board? J5 (PICkit 4), J10 (Atmel ICE) or J12 (JTAG)?","commit_id":"b0f52787a0074a1f5d71f9b59a425d284447ca78"},{"author":{"_account_id":1001955,"name":"Hans-Erik Floryd","email":"hans-erik.floryd@rt-labs.com","username":"hefloryd"},"change_message_id":"fbe70a5c0b072ba0ed04af4978d5cb8247904e39","unresolved":false,"context_lines":[{"line_number":10,"context_line":"source [find target/atsame5x.cfg]"},{"line_number":11,"context_line":""},{"line_number":12,"context_line":"# srst_only results in target running for a while after"},{"line_number":13,"context_line":"# reset. trst_only leaves CPU at reset vector."},{"line_number":14,"context_line":"reset_config trst_only"}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"e1da24a0_ce88a3f6","line":13,"in_reply_to":"c55b2e17_269ad8bf","updated":"2022-01-21 15:21:05.000000000","message":"Ah, that explains it. BTW, I pushed a new version removing mention of the Atmel-ICE from this file.","commit_id":"b0f52787a0074a1f5d71f9b59a425d284447ca78"},{"author":{"_account_id":1001955,"name":"Hans-Erik Floryd","email":"hans-erik.floryd@rt-labs.com","username":"hefloryd"},"change_message_id":"71bd1599c326e266ba7668c99c9d3b0474226799","unresolved":true,"context_lines":[{"line_number":10,"context_line":"source [find target/atsame5x.cfg]"},{"line_number":11,"context_line":""},{"line_number":12,"context_line":"# srst_only results in target running for a while after"},{"line_number":13,"context_line":"# reset. trst_only leaves CPU at reset vector."},{"line_number":14,"context_line":"reset_config trst_only"}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"fcfb38f1_d77b9f9e","line":13,"in_reply_to":"d8afe0f9_6b8ef13c","updated":"2022-01-21 14:39:07.000000000","message":"I am using J10 (Atmel ICE).\n\nHowever, I seem to have made a mistake while trying out reset strategies. srst_only and reset halt works fine. trst_only does also work which is perhaps surprising?","commit_id":"b0f52787a0074a1f5d71f9b59a425d284447ca78"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"e3917c79565c6d82f86eba9fa24457b4307b1d24","unresolved":false,"context_lines":[{"line_number":10,"context_line":"source [find target/atsame5x.cfg]"},{"line_number":11,"context_line":""},{"line_number":12,"context_line":"# srst_only results in target running for a while after"},{"line_number":13,"context_line":"# reset. trst_only leaves CPU at reset vector."},{"line_number":14,"context_line":"reset_config trst_only"}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"c55b2e17_269ad8bf","line":13,"in_reply_to":"fcfb38f1_d77b9f9e","updated":"2022-01-21 15:08:19.000000000","message":"Checked on STM32F4 with cmsis-dap.\nThe flag \"trst_only\" gives the same behavior of flag \"none\". It forces OpenOCD to reset the target through SYSRESETREQ. So \"reset halt\" works fine.\nSetting \"srst_only\" forces the interface/adapter to use the NRST line.","commit_id":"b0f52787a0074a1f5d71f9b59a425d284447ca78"}]}