)]}'
{"/PATCHSET_LEVEL":[{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"50370881327622032909fe73058a1826f8f39c75","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":6,"id":"dfa45ded_dc5c0ce5","updated":"2022-04-24 08:25:49.000000000","message":"Thank you for your helpful comments. Changes as requested to follow ASAP.","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"6ac06119d9e2ef94a0e01a22982a451bb9a834f9","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":6,"id":"e341db7e_661d6f70","updated":"2022-04-23 17:25:42.000000000","message":"Thanks for the driver!\nFew comments below","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"186d77a949778f6b266f5af714c20d9d82de6d54","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":6,"id":"f769fc42_3aa3c11d","updated":"2022-04-23 17:30:04.000000000","message":"few more minor comments","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"303be538fc67b8834b5067c82f65464b00f6380f","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":7,"id":"2b52e26d_b16ec11e","updated":"2022-04-24 09:10:01.000000000","message":"Sorry, I accidentally pushed the changes with wip flag set. Ready for review now.","commit_id":"f8dbf3ccde4d49e2c2aab2ad3b7a0e543032d73b"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"c53d50c6c5452378ba89a259a7170cbd59ebdb86","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":8,"id":"37bd580a_702ee652","updated":"2022-04-24 18:13:55.000000000","message":"Apologies for including an additional unrequested change but I realised that the driver did not support open-drain TRST and SRST connections. This has been fixed in am335xgpio_reset(), with a change in am335xgpio_init(). Tested by measuring logic-level (not actual drive), and by observing reported GPIO mode in the debug output.","commit_id":"dc2317905ea1d677fcac27f9ccf208c384c26094"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"efa32e02944d9e70d878bbc17c6ecbf133a0a640","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":9,"id":"ad80df0f_0154ace3","updated":"2022-04-24 22:07:59.000000000","message":"Thanks for your comments. Changes made as requested.","commit_id":"93cc2903ca09dc7d5e57167a1a3aea4959e7c319"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"6e1e929c8c71c5f54247210a7e9d3989d4723468","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":11,"id":"bafc325e_be626673","updated":"2022-05-01 15:00:44.000000000","message":"Thanks!","commit_id":"86e838026c5342986d399219eb8d2b719464042e"}],"doc/openocd.texi":[{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"6ac06119d9e2ef94a0e01a22982a451bb9a834f9","unresolved":true,"context_lines":[{"line_number":3322,"context_line":""},{"line_number":3323,"context_line":"For maximum performance the driver accesses memory-mapped GPIO peripheral"},{"line_number":3324,"context_line":"registers directly. The memory mapping requires read and write permission to"},{"line_number":3325,"context_line":"kernel mmeory; if /dev/gpiomem exists it will be used, otherwise /dev/mem will"},{"line_number":3326,"context_line":"be used. The driver restores the GPIO state on exit."},{"line_number":3327,"context_line":""},{"line_number":3328,"context_line":"All four GPIO ports are available. GPIOs numbered 0 to 31 are mapped to GPIO port"}],"source_content_type":"text/x-texinfo","patch_set":6,"id":"1296c58d_98a1329a","line":3325,"updated":"2022-04-23 17:25:42.000000000","message":"typo: s/mmeory/memory/","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"50370881327622032909fe73058a1826f8f39c75","unresolved":false,"context_lines":[{"line_number":3322,"context_line":""},{"line_number":3323,"context_line":"For maximum performance the driver accesses memory-mapped GPIO peripheral"},{"line_number":3324,"context_line":"registers directly. The memory mapping requires read and write permission to"},{"line_number":3325,"context_line":"kernel mmeory; if /dev/gpiomem exists it will be used, otherwise /dev/mem will"},{"line_number":3326,"context_line":"be used. The driver restores the GPIO state on exit."},{"line_number":3327,"context_line":""},{"line_number":3328,"context_line":"All four GPIO ports are available. GPIOs numbered 0 to 31 are mapped to GPIO port"}],"source_content_type":"text/x-texinfo","patch_set":6,"id":"a32754df_eca16829","line":3325,"in_reply_to":"1296c58d_98a1329a","updated":"2022-04-24 08:25:49.000000000","message":"Done","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"440ba25059976358b647c2c051899c3b99e716aa","unresolved":true,"context_lines":[{"line_number":3328,"context_line":"All four GPIO ports are available. GPIOs numbered 0 to 31 are mapped to GPIO port"},{"line_number":3329,"context_line":"0, GPIO numbers 32 to 63 are mapped to GPIO port 1 and so on."},{"line_number":3330,"context_line":""},{"line_number":3331,"context_line":"See @file{interface/beaglebone-native.cfg} for a sample configuration file."},{"line_number":3332,"context_line":""},{"line_number":3333,"context_line":"@deffn {Config Command} {am335xgpio jtag_nums} @var{tck} @var{tms} @var{tdi} @var{tdo}"},{"line_number":3334,"context_line":"Set JTAG transport GPIO numbers for TCK, TMS, TDI, and TDO (in that order)."}],"source_content_type":"text/x-texinfo","patch_set":9,"id":"583038f8_7630ed71","line":3331,"updated":"2022-04-24 21:39:24.000000000","message":"Ooops, this file does not exist! There are two versions with jtag and swd in the name; use one of them","commit_id":"93cc2903ca09dc7d5e57167a1a3aea4959e7c319"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"efa32e02944d9e70d878bbc17c6ecbf133a0a640","unresolved":false,"context_lines":[{"line_number":3328,"context_line":"All four GPIO ports are available. GPIOs numbered 0 to 31 are mapped to GPIO port"},{"line_number":3329,"context_line":"0, GPIO numbers 32 to 63 are mapped to GPIO port 1 and so on."},{"line_number":3330,"context_line":""},{"line_number":3331,"context_line":"See @file{interface/beaglebone-native.cfg} for a sample configuration file."},{"line_number":3332,"context_line":""},{"line_number":3333,"context_line":"@deffn {Config Command} {am335xgpio jtag_nums} @var{tck} @var{tms} @var{tdi} @var{tdo}"},{"line_number":3334,"context_line":"Set JTAG transport GPIO numbers for TCK, TMS, TDI, and TDO (in that order)."}],"source_content_type":"text/x-texinfo","patch_set":9,"id":"731d0614_e6ad2ded","line":3331,"in_reply_to":"583038f8_7630ed71","updated":"2022-04-24 22:07:59.000000000","message":"Done","commit_id":"93cc2903ca09dc7d5e57167a1a3aea4959e7c319"}],"src/jtag/drivers/am335xgpio.c":[{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"6ac06119d9e2ef94a0e01a22982a451bb9a834f9","unresolved":true,"context_lines":[{"line_number":53,"context_line":" */"},{"line_number":54,"context_line":"#define AM335XGPIO_PORT_NUM(gpio_num) ((gpio_num) / 32)"},{"line_number":55,"context_line":"#define AM335XGPIO_BIT_NUM(gpio_num) ((gpio_num) % 32)"},{"line_number":56,"context_line":"#define AM335XGPIO_BIT_MASK(gpio_num) (1 \u003c\u003c AM335XGPIO_BIT_NUM(gpio_num))"},{"line_number":57,"context_line":""},{"line_number":58,"context_line":"enum amx335gpio_gpio_mode {"},{"line_number":59,"context_line":"\tAM335XGPIO_GPIO_MODE_INPUT,"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"f91d3f2a_35b3d670","line":56,"updated":"2022-04-23 17:25:42.000000000","message":"Use\n #define AM335XGPIO_BIT_MASK(gpio_num) BIT(AM335XGPIO_BIT_NUM(gpio_num))","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"50370881327622032909fe73058a1826f8f39c75","unresolved":false,"context_lines":[{"line_number":53,"context_line":" */"},{"line_number":54,"context_line":"#define AM335XGPIO_PORT_NUM(gpio_num) ((gpio_num) / 32)"},{"line_number":55,"context_line":"#define AM335XGPIO_BIT_NUM(gpio_num) ((gpio_num) % 32)"},{"line_number":56,"context_line":"#define AM335XGPIO_BIT_MASK(gpio_num) (1 \u003c\u003c AM335XGPIO_BIT_NUM(gpio_num))"},{"line_number":57,"context_line":""},{"line_number":58,"context_line":"enum amx335gpio_gpio_mode {"},{"line_number":59,"context_line":"\tAM335XGPIO_GPIO_MODE_INPUT,"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"5c4029a5_1f735aff","line":56,"in_reply_to":"f91d3f2a_35b3d670","updated":"2022-04-24 08:25:49.000000000","message":"Done","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"6ac06119d9e2ef94a0e01a22982a451bb9a834f9","unresolved":true,"context_lines":[{"line_number":70,"context_line":"};"},{"line_number":71,"context_line":""},{"line_number":72,"context_line":"/* Memory-mapped address pointers */"},{"line_number":73,"context_line":"static uint32_t *am335xgpio_gpio_port_mmap_addr[AM335XGPIO_NUM_GPIO_PORTS];"},{"line_number":74,"context_line":""},{"line_number":75,"context_line":"static int dev_mem_fd;"},{"line_number":76,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":6,"id":"b2f93fec_101fcc4c","line":73,"updated":"2022-04-23 17:25:42.000000000","message":"are you sure it works without the \u0027volatile\u0027 keyword?","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"50370881327622032909fe73058a1826f8f39c75","unresolved":false,"context_lines":[{"line_number":70,"context_line":"};"},{"line_number":71,"context_line":""},{"line_number":72,"context_line":"/* Memory-mapped address pointers */"},{"line_number":73,"context_line":"static uint32_t *am335xgpio_gpio_port_mmap_addr[AM335XGPIO_NUM_GPIO_PORTS];"},{"line_number":74,"context_line":""},{"line_number":75,"context_line":"static int dev_mem_fd;"},{"line_number":76,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":6,"id":"522a1084_1685e17c","line":73,"in_reply_to":"b2f93fec_101fcc4c","updated":"2022-04-24 08:25:49.000000000","message":"Ooops! That *should* have been been marked volatile. It does work without - I\u0027ve been testing with programming an nRF52832 via SWD. Also checked JTAG with STM32F407.\n\nI\u0027ll add the volatile keyword to be correct.","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"6ac06119d9e2ef94a0e01a22982a451bb9a834f9","unresolved":true,"context_lines":[{"line_number":74,"context_line":""},{"line_number":75,"context_line":"static int dev_mem_fd;"},{"line_number":76,"context_line":""},{"line_number":77,"context_line":"static bb_value_t am335xgpio_read(void);"},{"line_number":78,"context_line":"static int am335xgpio_write(int tck, int tms, int tdi);"},{"line_number":79,"context_line":""},{"line_number":80,"context_line":"static int am335xgpio_swdio_read(void);"},{"line_number":81,"context_line":"static void am335xgpio_swdio_drive(bool is_output);"},{"line_number":82,"context_line":"static int am335xgpio_swd_write(int swclk, int swdio);"},{"line_number":83,"context_line":"static int am335xgpio_blink(int on);"},{"line_number":84,"context_line":""},{"line_number":85,"context_line":"static int am335xgpio_init(void);"},{"line_number":86,"context_line":"static int am335xgpio_quit(void);"},{"line_number":87,"context_line":""},{"line_number":88,"context_line":"static struct bitbang_interface am335xgpio_bitbang \u003d {"},{"line_number":89,"context_line":"\t.read \u003d am335xgpio_read,"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"ffac948d_0a5d3fc6","line":86,"range":{"start_line":77,"start_character":0,"end_line":86,"end_character":33},"updated":"2022-04-23 17:25:42.000000000","message":"I think you can reorganize the order of functions to avoid these forward-declarations","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"50370881327622032909fe73058a1826f8f39c75","unresolved":false,"context_lines":[{"line_number":74,"context_line":""},{"line_number":75,"context_line":"static int dev_mem_fd;"},{"line_number":76,"context_line":""},{"line_number":77,"context_line":"static bb_value_t am335xgpio_read(void);"},{"line_number":78,"context_line":"static int am335xgpio_write(int tck, int tms, int tdi);"},{"line_number":79,"context_line":""},{"line_number":80,"context_line":"static int am335xgpio_swdio_read(void);"},{"line_number":81,"context_line":"static void am335xgpio_swdio_drive(bool is_output);"},{"line_number":82,"context_line":"static int am335xgpio_swd_write(int swclk, int swdio);"},{"line_number":83,"context_line":"static int am335xgpio_blink(int on);"},{"line_number":84,"context_line":""},{"line_number":85,"context_line":"static int am335xgpio_init(void);"},{"line_number":86,"context_line":"static int am335xgpio_quit(void);"},{"line_number":87,"context_line":""},{"line_number":88,"context_line":"static struct bitbang_interface am335xgpio_bitbang \u003d {"},{"line_number":89,"context_line":"\t.read \u003d am335xgpio_read,"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"010072c7_842c7704","line":86,"range":{"start_line":77,"start_character":0,"end_line":86,"end_character":33},"in_reply_to":"ffac948d_0a5d3fc6","updated":"2022-04-24 08:25:49.000000000","message":"Done","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"6ac06119d9e2ef94a0e01a22982a451bb9a834f9","unresolved":true,"context_lines":[{"line_number":133,"context_line":"{"},{"line_number":134,"context_line":"\treturn (*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)]"},{"line_number":135,"context_line":"\t\t+ AM335XGPIO_GPIO_DATAIN_OFFSET) \u0026 AM335XGPIO_BIT_MASK(gpio_num))"},{"line_number":136,"context_line":"\t\t\u003e\u003e AM335XGPIO_BIT_NUM(gpio_num);"},{"line_number":137,"context_line":"}"},{"line_number":138,"context_line":""},{"line_number":139,"context_line":"static void set_gpio_value(int gpio_num, int value)"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"0c4e167e_4b75fb69","line":136,"updated":"2022-04-23 17:25:42.000000000","message":"this is unreadable!\nwhat about defining:\n static uint32_t read_reg(int gpio_num, unsigned int offset)\n {\n   return *(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] +\n            offset);\n }\n static void write_reg(int gpio_num, unsigned int offset, uint32_t value)\n {\n   *(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + offset) \u003d\n     value;\n }\n\nthen here simply:\n unsigned shift \u003d AM335XGPIO_BIT_NUM(gpio_num);\n return (read_reg(gpio_num, AM335XGPIO_GPIO_DATAIN_OFFSET) \u003e\u003e shift) \u0026 1;\n\nOf course, something similar below","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"50370881327622032909fe73058a1826f8f39c75","unresolved":false,"context_lines":[{"line_number":133,"context_line":"{"},{"line_number":134,"context_line":"\treturn (*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)]"},{"line_number":135,"context_line":"\t\t+ AM335XGPIO_GPIO_DATAIN_OFFSET) \u0026 AM335XGPIO_BIT_MASK(gpio_num))"},{"line_number":136,"context_line":"\t\t\u003e\u003e AM335XGPIO_BIT_NUM(gpio_num);"},{"line_number":137,"context_line":"}"},{"line_number":138,"context_line":""},{"line_number":139,"context_line":"static void set_gpio_value(int gpio_num, int value)"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"257d581f_295c0a32","line":136,"in_reply_to":"0c4e167e_4b75fb69","updated":"2022-04-24 08:25:49.000000000","message":"These functions are critical for performance (high programming clock speed) and I have no control of whether the compiler will inline them. I was already concerned about that when I used a function for get_gpio_value()/set_gpio_value() as the bcm2835gpio driver uses macros. Performance is the reason for preferring a native GPIO driver over the generic linuxgpiod driver so with that in mind I\u0027d prefer to use macros for read_reg()/write_reg() to avoid the possibility of additional function call overheads. As with other macros I\u0027ll prefix with \"AM335XGPIO_\".\n\nIf you think my concerns are unfounded then please state and I\u0027ll switch to using functions instead.\n\nThere are various places (see comment below) where I think code can be simplified by using read_reg/write_reg so I\u0027ll fix those up too.\n\nSome background info. With linuxgpiod I was seeing ~ 183 kHZ SWCLK signal. The first draft of a native AM335x driver improved that to 485 kHz SWCLK. By replacing \u0026\u003d and |\u003d operations on DATAOUT to write-only operations on SETDATAOUT/CLEARDATAOUT registers I now see \u003e 1 MHz SWCLK signals. I think there is a 10:1 ratio on CPU clock to IO peripheral internal clock.","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"440ba25059976358b647c2c051899c3b99e716aa","unresolved":false,"context_lines":[{"line_number":133,"context_line":"{"},{"line_number":134,"context_line":"\treturn (*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)]"},{"line_number":135,"context_line":"\t\t+ AM335XGPIO_GPIO_DATAIN_OFFSET) \u0026 AM335XGPIO_BIT_MASK(gpio_num))"},{"line_number":136,"context_line":"\t\t\u003e\u003e AM335XGPIO_BIT_NUM(gpio_num);"},{"line_number":137,"context_line":"}"},{"line_number":138,"context_line":""},{"line_number":139,"context_line":"static void set_gpio_value(int gpio_num, int value)"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"43db4a62_8fcd7133","line":136,"in_reply_to":"257d581f_295c0a32","updated":"2022-04-24 21:39:24.000000000","message":"Agree on your concerns about performance.\nAnyway the GCC compiler should inline function declared as \u0027inline\u0027, except with flags -O0 and -fno-inline-functions.\nYour decision to use macros is good enough for readability.","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"6ac06119d9e2ef94a0e01a22982a451bb9a834f9","unresolved":true,"context_lines":[{"line_number":147,"context_line":"\t}"},{"line_number":148,"context_line":"}"},{"line_number":149,"context_line":""},{"line_number":150,"context_line":"static int get_gpio_mode(int gpio_num)"},{"line_number":151,"context_line":"{"},{"line_number":152,"context_line":"\tif ((*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)]"},{"line_number":153,"context_line":"\t\t+ AM335XGPIO_GPIO_OE_OFFSET) \u0026 AM335XGPIO_BIT_MASK(gpio_num))"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"efa8ccfd_5b908bd1","line":150,"updated":"2022-04-23 17:25:42.000000000","message":"the return type is \u0027enum amx335gpio_gpio_mode\u0027","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"50370881327622032909fe73058a1826f8f39c75","unresolved":false,"context_lines":[{"line_number":147,"context_line":"\t}"},{"line_number":148,"context_line":"}"},{"line_number":149,"context_line":""},{"line_number":150,"context_line":"static int get_gpio_mode(int gpio_num)"},{"line_number":151,"context_line":"{"},{"line_number":152,"context_line":"\tif ((*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)]"},{"line_number":153,"context_line":"\t\t+ AM335XGPIO_GPIO_OE_OFFSET) \u0026 AM335XGPIO_BIT_MASK(gpio_num))"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"6c35dba1_0dc8e09f","line":150,"in_reply_to":"efa8ccfd_5b908bd1","updated":"2022-04-24 08:25:49.000000000","message":"Done","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"6ac06119d9e2ef94a0e01a22982a451bb9a834f9","unresolved":true,"context_lines":[{"line_number":151,"context_line":"{"},{"line_number":152,"context_line":"\tif ((*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)]"},{"line_number":153,"context_line":"\t\t+ AM335XGPIO_GPIO_OE_OFFSET) \u0026 AM335XGPIO_BIT_MASK(gpio_num))"},{"line_number":154,"context_line":"\t\t\u003e\u003e AM335XGPIO_BIT_NUM(gpio_num)) {"},{"line_number":155,"context_line":"\t\t\treturn AM335XGPIO_GPIO_MODE_INPUT;"},{"line_number":156,"context_line":"\t} else {"},{"line_number":157,"context_line":"\t\t/* Return output level too so that pin mode can be fully restored */"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"ff49f969_59fcd45c","line":154,"updated":"2022-04-23 17:25:42.000000000","message":"you don\u0027t need the shift \"\u003e\u003e AM335XGPIO_BIT_NUM(gpio_num)\"\nThe result of the \u0027\u0026\u0027 operator is enough","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"50370881327622032909fe73058a1826f8f39c75","unresolved":false,"context_lines":[{"line_number":151,"context_line":"{"},{"line_number":152,"context_line":"\tif ((*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)]"},{"line_number":153,"context_line":"\t\t+ AM335XGPIO_GPIO_OE_OFFSET) \u0026 AM335XGPIO_BIT_MASK(gpio_num))"},{"line_number":154,"context_line":"\t\t\u003e\u003e AM335XGPIO_BIT_NUM(gpio_num)) {"},{"line_number":155,"context_line":"\t\t\treturn AM335XGPIO_GPIO_MODE_INPUT;"},{"line_number":156,"context_line":"\t} else {"},{"line_number":157,"context_line":"\t\t/* Return output level too so that pin mode can be fully restored */"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"68a96470_a70dc7de","line":154,"in_reply_to":"ff49f969_59fcd45c","updated":"2022-04-24 08:25:49.000000000","message":"Yes. Also worth simplifying with the read_reg macro too I think. I\u0027ll do both changes.","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"6ac06119d9e2ef94a0e01a22982a451bb9a834f9","unresolved":true,"context_lines":[{"line_number":157,"context_line":"\t\t/* Return output level too so that pin mode can be fully restored */"},{"line_number":158,"context_line":"\t\tif ((*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)]"},{"line_number":159,"context_line":"\t\t\t+ AM335XGPIO_GPIO_DATAOUT_OFFSET) \u0026 AM335XGPIO_BIT_MASK(gpio_num))"},{"line_number":160,"context_line":"\t\t\t\u003e\u003e AM335XGPIO_BIT_NUM(gpio_num)) {"},{"line_number":161,"context_line":"\t\t\treturn AM335XGPIO_GPIO_MODE_OUTPUT_HIGH;"},{"line_number":162,"context_line":"\t\t} else {"},{"line_number":163,"context_line":"\t\t\treturn AM335XGPIO_GPIO_MODE_OUTPUT_LOW;"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"475af32c_b812ceb2","line":160,"updated":"2022-04-23 17:25:42.000000000","message":"same here, no need for shift","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"50370881327622032909fe73058a1826f8f39c75","unresolved":false,"context_lines":[{"line_number":157,"context_line":"\t\t/* Return output level too so that pin mode can be fully restored */"},{"line_number":158,"context_line":"\t\tif ((*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)]"},{"line_number":159,"context_line":"\t\t\t+ AM335XGPIO_GPIO_DATAOUT_OFFSET) \u0026 AM335XGPIO_BIT_MASK(gpio_num))"},{"line_number":160,"context_line":"\t\t\t\u003e\u003e AM335XGPIO_BIT_NUM(gpio_num)) {"},{"line_number":161,"context_line":"\t\t\treturn AM335XGPIO_GPIO_MODE_OUTPUT_HIGH;"},{"line_number":162,"context_line":"\t\t} else {"},{"line_number":163,"context_line":"\t\t\treturn AM335XGPIO_GPIO_MODE_OUTPUT_LOW;"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"af092b49_59aa2b03","line":160,"in_reply_to":"475af32c_b812ceb2","updated":"2022-04-24 08:25:49.000000000","message":"Yes. Will simplify here too.","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"6ac06119d9e2ef94a0e01a22982a451bb9a834f9","unresolved":true,"context_lines":[{"line_number":165,"context_line":"\t}"},{"line_number":166,"context_line":"}"},{"line_number":167,"context_line":""},{"line_number":168,"context_line":"static void set_gpio_mode(int gpio_num, int gpio_mode)"},{"line_number":169,"context_line":"{"},{"line_number":170,"context_line":"\tif (gpio_mode \u003d\u003d AM335XGPIO_GPIO_MODE_INPUT) {"},{"line_number":171,"context_line":"\t\t(*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + AM335XGPIO_GPIO_OE_OFFSET))"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"06055e6c_a6704ead","line":168,"updated":"2022-04-23 17:25:42.000000000","message":"gpio_mode is not \u0027int\u0027!","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"50370881327622032909fe73058a1826f8f39c75","unresolved":false,"context_lines":[{"line_number":165,"context_line":"\t}"},{"line_number":166,"context_line":"}"},{"line_number":167,"context_line":""},{"line_number":168,"context_line":"static void set_gpio_mode(int gpio_num, int gpio_mode)"},{"line_number":169,"context_line":"{"},{"line_number":170,"context_line":"\tif (gpio_mode \u003d\u003d AM335XGPIO_GPIO_MODE_INPUT) {"},{"line_number":171,"context_line":"\t\t(*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + AM335XGPIO_GPIO_OE_OFFSET))"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"6a44b4c2_d490ca7b","line":168,"in_reply_to":"06055e6c_a6704ead","updated":"2022-04-24 08:25:49.000000000","message":"Done","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"6ac06119d9e2ef94a0e01a22982a451bb9a834f9","unresolved":true,"context_lines":[{"line_number":169,"context_line":"{"},{"line_number":170,"context_line":"\tif (gpio_mode \u003d\u003d AM335XGPIO_GPIO_MODE_INPUT) {"},{"line_number":171,"context_line":"\t\t(*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + AM335XGPIO_GPIO_OE_OFFSET))"},{"line_number":172,"context_line":"\t\t\t|\u003d AM335XGPIO_BIT_MASK(gpio_num);"},{"line_number":173,"context_line":"\t\treturn;"},{"line_number":174,"context_line":"\t}"},{"line_number":175,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":6,"id":"01f5f56e_600062e8","line":172,"updated":"2022-04-23 17:25:42.000000000","message":"yes, beside read_reg/write_reg you also need set_bit_reg/clear_bit_reg","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"50370881327622032909fe73058a1826f8f39c75","unresolved":false,"context_lines":[{"line_number":169,"context_line":"{"},{"line_number":170,"context_line":"\tif (gpio_mode \u003d\u003d AM335XGPIO_GPIO_MODE_INPUT) {"},{"line_number":171,"context_line":"\t\t(*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + AM335XGPIO_GPIO_OE_OFFSET))"},{"line_number":172,"context_line":"\t\t\t|\u003d AM335XGPIO_BIT_MASK(gpio_num);"},{"line_number":173,"context_line":"\t\treturn;"},{"line_number":174,"context_line":"\t}"},{"line_number":175,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":6,"id":"e877c021_f73446fb","line":172,"in_reply_to":"01f5f56e_600062e8","updated":"2022-04-24 08:25:49.000000000","message":"Done","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"6ac06119d9e2ef94a0e01a22982a451bb9a834f9","unresolved":true,"context_lines":[{"line_number":186,"context_line":"\t}"},{"line_number":187,"context_line":"}"},{"line_number":188,"context_line":""},{"line_number":189,"context_line":"static const char *get_gpio_mode_name(int gpio_mode)"},{"line_number":190,"context_line":"{"},{"line_number":191,"context_line":"\tswitch (gpio_mode) {"},{"line_number":192,"context_line":"\tcase AM335XGPIO_GPIO_MODE_INPUT:"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"5f9146c9_ffb9d899","line":189,"updated":"2022-04-23 17:25:42.000000000","message":"gpio_mode is not \u0027int\u0027!","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"50370881327622032909fe73058a1826f8f39c75","unresolved":false,"context_lines":[{"line_number":186,"context_line":"\t}"},{"line_number":187,"context_line":"}"},{"line_number":188,"context_line":""},{"line_number":189,"context_line":"static const char *get_gpio_mode_name(int gpio_mode)"},{"line_number":190,"context_line":"{"},{"line_number":191,"context_line":"\tswitch (gpio_mode) {"},{"line_number":192,"context_line":"\tcase AM335XGPIO_GPIO_MODE_INPUT:"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"b49a06f9_71e8e701","line":189,"in_reply_to":"5f9146c9_ffb9d899","updated":"2022-04-24 08:25:49.000000000","message":"Done","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"186d77a949778f6b266f5af714c20d9d82de6d54","unresolved":true,"context_lines":[{"line_number":272,"context_line":"\t\tLOG_DEBUG(\"RCLK not supported\");"},{"line_number":273,"context_line":"\t\treturn ERROR_FAIL;"},{"line_number":274,"context_line":"\t}"},{"line_number":275,"context_line":"\t*jtag_speed \u003d speed_coeff/khz - speed_offset;"},{"line_number":276,"context_line":"\tif (*jtag_speed \u003c 0)"},{"line_number":277,"context_line":"\t\t*jtag_speed \u003d 0;"},{"line_number":278,"context_line":"\treturn ERROR_OK;"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"35b10a10_2632b125","line":275,"updated":"2022-04-23 17:30:04.000000000","message":"add space around \u0027/\u0027","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"50370881327622032909fe73058a1826f8f39c75","unresolved":false,"context_lines":[{"line_number":272,"context_line":"\t\tLOG_DEBUG(\"RCLK not supported\");"},{"line_number":273,"context_line":"\t\treturn ERROR_FAIL;"},{"line_number":274,"context_line":"\t}"},{"line_number":275,"context_line":"\t*jtag_speed \u003d speed_coeff/khz - speed_offset;"},{"line_number":276,"context_line":"\tif (*jtag_speed \u003c 0)"},{"line_number":277,"context_line":"\t\t*jtag_speed \u003d 0;"},{"line_number":278,"context_line":"\treturn ERROR_OK;"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"37a021cf_2292b087","line":275,"in_reply_to":"35b10a10_2632b125","updated":"2022-04-24 08:25:49.000000000","message":"Done","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"186d77a949778f6b266f5af714c20d9d82de6d54","unresolved":true,"context_lines":[{"line_number":280,"context_line":""},{"line_number":281,"context_line":"static int am335xgpio_speed_div(int speed, int *khz)"},{"line_number":282,"context_line":"{"},{"line_number":283,"context_line":"\t*khz \u003d speed_coeff/(speed + speed_offset);"},{"line_number":284,"context_line":"\treturn ERROR_OK;"},{"line_number":285,"context_line":"}"},{"line_number":286,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":6,"id":"a5c1ae49_8a0ae4d3","line":283,"updated":"2022-04-23 17:30:04.000000000","message":"add space around \u0027/\u0027","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"50370881327622032909fe73058a1826f8f39c75","unresolved":false,"context_lines":[{"line_number":280,"context_line":""},{"line_number":281,"context_line":"static int am335xgpio_speed_div(int speed, int *khz)"},{"line_number":282,"context_line":"{"},{"line_number":283,"context_line":"\t*khz \u003d speed_coeff/(speed + speed_offset);"},{"line_number":284,"context_line":"\treturn ERROR_OK;"},{"line_number":285,"context_line":"}"},{"line_number":286,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":6,"id":"a4918431_353ed5ad","line":283,"in_reply_to":"a5c1ae49_8a0ae4d3","updated":"2022-04-24 08:25:49.000000000","message":"Done","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"186d77a949778f6b266f5af714c20d9d82de6d54","unresolved":true,"context_lines":[{"line_number":680,"context_line":"\t\t\t\t\tswdio_dir_gpio, get_gpio_mode_name(swdio_dir_gpio_mode));"},{"line_number":681,"context_line":"\t\t\tset_gpio_mode(swdio_dir_gpio,"},{"line_number":682,"context_line":"\t\t\t\t\tswdio_dir_is_active_high ? AM335XGPIO_GPIO_MODE_OUTPUT_HIGH : AM335XGPIO_GPIO_MODE_OUTPUT_LOW);"},{"line_number":683,"context_line":""},{"line_number":684,"context_line":"\t\t}"},{"line_number":685,"context_line":""},{"line_number":686,"context_line":"\t\tset_gpio_mode(swdio_gpio, AM335XGPIO_GPIO_MODE_OUTPUT_LOW);"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"9b087b5b_fcadedf7","line":683,"updated":"2022-04-23 17:30:04.000000000","message":"remove this empty line","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"50370881327622032909fe73058a1826f8f39c75","unresolved":false,"context_lines":[{"line_number":680,"context_line":"\t\t\t\t\tswdio_dir_gpio, get_gpio_mode_name(swdio_dir_gpio_mode));"},{"line_number":681,"context_line":"\t\t\tset_gpio_mode(swdio_dir_gpio,"},{"line_number":682,"context_line":"\t\t\t\t\tswdio_dir_is_active_high ? AM335XGPIO_GPIO_MODE_OUTPUT_HIGH : AM335XGPIO_GPIO_MODE_OUTPUT_LOW);"},{"line_number":683,"context_line":""},{"line_number":684,"context_line":"\t\t}"},{"line_number":685,"context_line":""},{"line_number":686,"context_line":"\t\tset_gpio_mode(swdio_gpio, AM335XGPIO_GPIO_MODE_OUTPUT_LOW);"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"a68eb839_c16acabb","line":683,"in_reply_to":"9b087b5b_fcadedf7","updated":"2022-04-24 08:25:49.000000000","message":"Done","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"440ba25059976358b647c2c051899c3b99e716aa","unresolved":true,"context_lines":[{"line_number":55,"context_line":"#define AM335XGPIO_BIT_NUM(gpio_num) ((gpio_num) % 32)"},{"line_number":56,"context_line":"#define AM335XGPIO_BIT_MASK(gpio_num) BIT(AM335XGPIO_BIT_NUM(gpio_num))"},{"line_number":57,"context_line":""},{"line_number":58,"context_line":"#define AM335XGPIO_READ_REG(gpio_num, offset) \\"},{"line_number":59,"context_line":"\t(*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + offset))"},{"line_number":60,"context_line":""},{"line_number":61,"context_line":"#define AM335XGPIO_WRITE_REG(gpio_num, offset, value) \\"},{"line_number":62,"context_line":"\t(*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + offset) \u003d value)"},{"line_number":63,"context_line":""},{"line_number":64,"context_line":"#define AM335XGPIO_SET_REG_BITS(gpio_num, offset, bit_mask) \\"},{"line_number":65,"context_line":"\t(*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + offset) |\u003d bit_mask)"},{"line_number":66,"context_line":""},{"line_number":67,"context_line":"#define AM335XGPIO_CLEAR_REG_BITS(gpio_num, offset, bit_mask) \\"},{"line_number":68,"context_line":"\t(*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + offset) \u0026\u003d ~bit_mask)"},{"line_number":69,"context_line":""},{"line_number":70,"context_line":"enum amx335gpio_gpio_mode {"},{"line_number":71,"context_line":"\tAM335XGPIO_GPIO_MODE_INPUT,"}],"source_content_type":"text/x-csrc","patch_set":9,"id":"57c65bdc_3eaefd9d","line":68,"range":{"start_line":58,"start_character":1,"end_line":68,"end_character":89},"updated":"2022-04-24 21:39:24.000000000","message":"these are macros and parameters are expanded.\nTo avoid side effects, put every use of the parameters within (): (offset), (value), (bit_mask)","commit_id":"93cc2903ca09dc7d5e57167a1a3aea4959e7c319"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"efa32e02944d9e70d878bbc17c6ecbf133a0a640","unresolved":false,"context_lines":[{"line_number":55,"context_line":"#define AM335XGPIO_BIT_NUM(gpio_num) ((gpio_num) % 32)"},{"line_number":56,"context_line":"#define AM335XGPIO_BIT_MASK(gpio_num) BIT(AM335XGPIO_BIT_NUM(gpio_num))"},{"line_number":57,"context_line":""},{"line_number":58,"context_line":"#define AM335XGPIO_READ_REG(gpio_num, offset) \\"},{"line_number":59,"context_line":"\t(*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + offset))"},{"line_number":60,"context_line":""},{"line_number":61,"context_line":"#define AM335XGPIO_WRITE_REG(gpio_num, offset, value) \\"},{"line_number":62,"context_line":"\t(*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + offset) \u003d value)"},{"line_number":63,"context_line":""},{"line_number":64,"context_line":"#define AM335XGPIO_SET_REG_BITS(gpio_num, offset, bit_mask) \\"},{"line_number":65,"context_line":"\t(*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + offset) |\u003d bit_mask)"},{"line_number":66,"context_line":""},{"line_number":67,"context_line":"#define AM335XGPIO_CLEAR_REG_BITS(gpio_num, offset, bit_mask) \\"},{"line_number":68,"context_line":"\t(*(am335xgpio_gpio_port_mmap_addr[AM335XGPIO_PORT_NUM(gpio_num)] + offset) \u0026\u003d ~bit_mask)"},{"line_number":69,"context_line":""},{"line_number":70,"context_line":"enum amx335gpio_gpio_mode {"},{"line_number":71,"context_line":"\tAM335XGPIO_GPIO_MODE_INPUT,"}],"source_content_type":"text/x-csrc","patch_set":9,"id":"58fd3f2c_736023fb","line":68,"range":{"start_line":58,"start_character":1,"end_line":68,"end_character":89},"in_reply_to":"57c65bdc_3eaefd9d","updated":"2022-04-24 22:07:59.000000000","message":"Done","commit_id":"93cc2903ca09dc7d5e57167a1a3aea4959e7c319"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"440ba25059976358b647c2c051899c3b99e716aa","unresolved":true,"context_lines":[{"line_number":562,"context_line":"\t.execute_queue \u003d bitbang_execute_queue,"},{"line_number":563,"context_line":"};"},{"line_number":564,"context_line":""},{"line_number":565,"context_line":"static struct bitbang_interface am335xgpio_bitbang \u003d {"},{"line_number":566,"context_line":"\t.read \u003d am335xgpio_read,"},{"line_number":567,"context_line":"\t.write \u003d am335xgpio_write,"},{"line_number":568,"context_line":"\t.swdio_read \u003d am335xgpio_swdio_read,"}],"source_content_type":"text/x-csrc","patch_set":9,"id":"6e67e6c3_67f3c9bc","line":565,"updated":"2022-04-24 21:39:24.000000000","message":"It would make sense moving this struct at line 263, right after the definition of am335xgpio_blink()","commit_id":"93cc2903ca09dc7d5e57167a1a3aea4959e7c319"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"efa32e02944d9e70d878bbc17c6ecbf133a0a640","unresolved":false,"context_lines":[{"line_number":562,"context_line":"\t.execute_queue \u003d bitbang_execute_queue,"},{"line_number":563,"context_line":"};"},{"line_number":564,"context_line":""},{"line_number":565,"context_line":"static struct bitbang_interface am335xgpio_bitbang \u003d {"},{"line_number":566,"context_line":"\t.read \u003d am335xgpio_read,"},{"line_number":567,"context_line":"\t.write \u003d am335xgpio_write,"},{"line_number":568,"context_line":"\t.swdio_read \u003d am335xgpio_swdio_read,"}],"source_content_type":"text/x-csrc","patch_set":9,"id":"76cb5a98_046949aa","line":565,"in_reply_to":"6e67e6c3_67f3c9bc","updated":"2022-04-24 22:07:59.000000000","message":"Done","commit_id":"93cc2903ca09dc7d5e57167a1a3aea4959e7c319"}],"tcl/interface/beaglebone-jtag-native.cfg":[{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"6ac06119d9e2ef94a0e01a22982a451bb9a834f9","unresolved":true,"context_lines":[{"line_number":1,"context_line":"# BeagleBone native GPIO interface for JTAG"},{"line_number":2,"context_line":"#"},{"line_number":3,"context_line":"# This is best used with a fast buffer but it is also suitable for a direct"},{"line_number":4,"context_line":"# connection if the target voltage matches the host\u0027s IO voltage (typically"}],"source_content_type":"text/x-ttcn-cfg","patch_set":6,"id":"655300cf_ea7d666c","line":1,"updated":"2022-04-23 17:25:42.000000000","message":"please add as first line:\n# SPDX-License-Identifier: GPL-2.0-or-later","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"50370881327622032909fe73058a1826f8f39c75","unresolved":false,"context_lines":[{"line_number":1,"context_line":"# BeagleBone native GPIO interface for JTAG"},{"line_number":2,"context_line":"#"},{"line_number":3,"context_line":"# This is best used with a fast buffer but it is also suitable for a direct"},{"line_number":4,"context_line":"# connection if the target voltage matches the host\u0027s IO voltage (typically"}],"source_content_type":"text/x-ttcn-cfg","patch_set":6,"id":"e809e85f_077ef71f","line":1,"in_reply_to":"655300cf_ea7d666c","updated":"2022-04-24 08:25:49.000000000","message":"Done","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"}],"tcl/interface/beaglebone-swd-native.cfg":[{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"6ac06119d9e2ef94a0e01a22982a451bb9a834f9","unresolved":true,"context_lines":[{"line_number":1,"context_line":"# BeagleBone native GPIO interface for SWD"},{"line_number":2,"context_line":"#"},{"line_number":3,"context_line":"# This is best used with a fast buffer but it is also suitable for a direct"},{"line_number":4,"context_line":"# connection if the target voltage matches the host\u0027s IO voltage (typically"}],"source_content_type":"text/x-ttcn-cfg","patch_set":6,"id":"bab71b16_070dde89","line":1,"updated":"2022-04-23 17:25:42.000000000","message":"please add as first line:\n# SPDX-License-Identifier: GPL-2.0-or-later","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"50370881327622032909fe73058a1826f8f39c75","unresolved":false,"context_lines":[{"line_number":1,"context_line":"# BeagleBone native GPIO interface for SWD"},{"line_number":2,"context_line":"#"},{"line_number":3,"context_line":"# This is best used with a fast buffer but it is also suitable for a direct"},{"line_number":4,"context_line":"# connection if the target voltage matches the host\u0027s IO voltage (typically"}],"source_content_type":"text/x-ttcn-cfg","patch_set":6,"id":"2f80ec8f_970e2775","line":1,"in_reply_to":"bab71b16_070dde89","updated":"2022-04-24 08:25:49.000000000","message":"Done","commit_id":"3cab8ac142dc7c8e6eefd4a7403f0f7762c18e07"}]}