)]}'
{"/COMMIT_MSG":[{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"0abc55659e5cebddab3472f8974ad0c9000d8f31","unresolved":true,"context_lines":[{"line_number":4,"context_line":"Commit:     iysheng \u003ciyysheng@gmail.com\u003e"},{"line_number":5,"context_line":"CommitDate: 2022-08-20 08:33:18 +0800"},{"line_number":6,"context_line":""},{"line_number":7,"context_line":"target/arm: Add support with identify START-MC1"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"Tested with an PLUS-F5270 board which uses the MM32F5277E9PV."},{"line_number":10,"context_line":""}],"source_content_type":"text/x-gerrit-commit-message","patch_set":1,"id":"01f72c57_c57aea9b","line":7,"updated":"2022-08-20 16:23:17.000000000","message":"isn\u0027t it named STAR-MC1 ?\nhttps://www.mindmotion.com.cn/support/development_tools/evaluation_boards/eminiboard/mm32f3277e9pv\nhttps://www.zeanoit.com/news/Arm-China-STAR-MC1-processor-IP-has-7-project-tapes.html\nhttps://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg285382.html","commit_id":"dd343cc9aa75b12efda6fc0c74e6114e033978dc"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"0965524bae9e0de76ee853fc4c509f29fb389dc6","unresolved":false,"context_lines":[{"line_number":4,"context_line":"Commit:     iysheng \u003ciyysheng@gmail.com\u003e"},{"line_number":5,"context_line":"CommitDate: 2022-08-20 08:33:18 +0800"},{"line_number":6,"context_line":""},{"line_number":7,"context_line":"target/arm: Add support with identify START-MC1"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"Tested with an PLUS-F5270 board which uses the MM32F5277E9PV."},{"line_number":10,"context_line":""}],"source_content_type":"text/x-gerrit-commit-message","patch_set":1,"id":"353b186e_002a4e55","line":7,"in_reply_to":"01f72c57_c57aea9b","updated":"2022-08-21 22:38:45.000000000","message":"Done","commit_id":"dd343cc9aa75b12efda6fc0c74e6114e033978dc"}],"/PATCHSET_LEVEL":[{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"0abc55659e5cebddab3472f8974ad0c9000d8f31","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":1,"id":"f298b182_ff09a981","updated":"2022-08-20 16:23:17.000000000","message":"thanks for your patch!","commit_id":"dd343cc9aa75b12efda6fc0c74e6114e033978dc"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"0965524bae9e0de76ee853fc4c509f29fb389dc6","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":3,"id":"5cf0088d_01fcf2bb","updated":"2022-08-21 22:38:45.000000000","message":"Thanks, it\u0027s ok for me. I will wait ~2 weeks before merging it, in case someone want to add further comments.\nBy the way, do you know of any public document from ARM China that reports the value 0x132 for STAR-MC1?","commit_id":"b3a3b89c21166629687ed8eff3fa6cdb109cae67"},{"author":{"_account_id":1000859,"name":"Karl Palsson","email":"karlp@tweak.au","username":"karlp"},"change_message_id":"c1653215b8161dddebeb88a2e12374ef402c0b3a","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":4,"id":"4df2384b_0da3d976","updated":"2023-08-02 21:00:13.000000000","message":"Hi, Would it be possible to get a read of the CPUID register on this device?\n```(gdb) x 0xE000ED00```\nor similar methods.  We\u0027re finding more parts with overlapping part ids, and we would like to get the complete cpuid register, so that we can check the implementor id bits as well, to make sure this part detection is preserved","commit_id":"7dc4be3157d666ef05905151b7b4d0f05778b08a"}],"src/target/cortex_m.c":[{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"0abc55659e5cebddab3472f8974ad0c9000d8f31","unresolved":true,"context_lines":[{"line_number":96,"context_line":"\t\t.name \u003d \"START-MC1\","},{"line_number":97,"context_line":"\t\t.arch \u003d ARM_ARCH_V8M,"},{"line_number":98,"context_line":"\t\t.flags \u003d CORTEX_M_F_HAS_FPV5,"},{"line_number":99,"context_line":"\t},"},{"line_number":100,"context_line":"\t{"},{"line_number":101,"context_line":"\t\t.partno \u003d CORTEX_M35P_PARTNO,"},{"line_number":102,"context_line":"\t\t.name \u003d \"Cortex-M35P\","}],"source_content_type":"text/x-csrc","patch_set":1,"id":"8520ebc3_5c3d7d36","line":99,"updated":"2022-08-20 16:23:17.000000000","message":"here, instead, they are in order by .arch then ... by .name? or by .partno?\nAnyway I think this should be added as the last one of the array.","commit_id":"dd343cc9aa75b12efda6fc0c74e6114e033978dc"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"0965524bae9e0de76ee853fc4c509f29fb389dc6","unresolved":false,"context_lines":[{"line_number":96,"context_line":"\t\t.name \u003d \"START-MC1\","},{"line_number":97,"context_line":"\t\t.arch \u003d ARM_ARCH_V8M,"},{"line_number":98,"context_line":"\t\t.flags \u003d CORTEX_M_F_HAS_FPV5,"},{"line_number":99,"context_line":"\t},"},{"line_number":100,"context_line":"\t{"},{"line_number":101,"context_line":"\t\t.partno \u003d CORTEX_M35P_PARTNO,"},{"line_number":102,"context_line":"\t\t.name \u003d \"Cortex-M35P\","}],"source_content_type":"text/x-csrc","patch_set":1,"id":"1054863e_22253d07","line":99,"in_reply_to":"8520ebc3_5c3d7d36","updated":"2022-08-21 22:38:45.000000000","message":"Done","commit_id":"dd343cc9aa75b12efda6fc0c74e6114e033978dc"}],"src/target/cortex_m.h":[{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"0abc55659e5cebddab3472f8974ad0c9000d8f31","unresolved":true,"context_lines":[{"line_number":44,"context_line":"\tCORTEX_M0P_PARTNO  \u003d 0xC60,"},{"line_number":45,"context_line":"\tCORTEX_M23_PARTNO  \u003d 0xD20,"},{"line_number":46,"context_line":"\tCORTEX_M33_PARTNO  \u003d 0xD21,"},{"line_number":47,"context_line":"\tSTART_MC1_PARTNO   \u003d 0x132,"},{"line_number":48,"context_line":"\tCORTEX_M35P_PARTNO \u003d 0xD31,"},{"line_number":49,"context_line":"\tCORTEX_M55_PARTNO  \u003d 0xD22,"},{"line_number":50,"context_line":"};"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"13c3b535_7eb29e48","line":47,"updated":"2022-08-20 16:23:17.000000000","message":"please keep the list in order by value, that is adding this new part/no right after CORTEX_M_PARTNO_INVALID","commit_id":"dd343cc9aa75b12efda6fc0c74e6114e033978dc"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"0965524bae9e0de76ee853fc4c509f29fb389dc6","unresolved":false,"context_lines":[{"line_number":44,"context_line":"\tCORTEX_M0P_PARTNO  \u003d 0xC60,"},{"line_number":45,"context_line":"\tCORTEX_M23_PARTNO  \u003d 0xD20,"},{"line_number":46,"context_line":"\tCORTEX_M33_PARTNO  \u003d 0xD21,"},{"line_number":47,"context_line":"\tSTART_MC1_PARTNO   \u003d 0x132,"},{"line_number":48,"context_line":"\tCORTEX_M35P_PARTNO \u003d 0xD31,"},{"line_number":49,"context_line":"\tCORTEX_M55_PARTNO  \u003d 0xD22,"},{"line_number":50,"context_line":"};"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"bfda6a9e_838e413a","line":47,"in_reply_to":"13c3b535_7eb29e48","updated":"2022-08-21 22:38:45.000000000","message":"Done","commit_id":"dd343cc9aa75b12efda6fc0c74e6114e033978dc"}]}