)]}'
{"/PATCHSET_LEVEL":[{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"1c9c82397f75fdfa5669ed8e612d503b8b21ec6a","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":1,"id":"80c0b9df_a385e82b","updated":"2022-10-13 11:00:34.000000000","message":"Tested on RPi4,\n/sys/devices/system/cpu/cpu0/cpufreq/scaling_governor set to performance\n $ cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq\n 1800000\n $ taskset -c 0 openocd\n\nWithout the change the initialization of the first CPU fails.\nWith the change SWD multidrop stress test runs without problems\n Info : BCM2835 GPIO JTAG/SWD bitbang driver\n Info : clock speed 3936 kHz\n Info : SWD DPIDR 0x6ba02477, DLPIDR 0x00000001\n Info : SWD DPIDR 0x6ba02477, DLPIDR 0x00000001\n Info : SWD DPIDR 0x0bc12477, DLPIDR 0x00000001\n Info : SWD DPIDR 0x0bc12477, DLPIDR 0x10000001\n Info : [stm32h745.cpu0] Cortex-M7 r1p1 processor detected\n Info : [stm32h745.cpu0] target has 8 breakpoints, 4 watchpoints\n Info : [stm32h745.cpu1] Cortex-M4 r0p1 processor detected\n Info : [stm32h745.cpu1] target has 6 breakpoints, 4 watchpoints\n Info : [stm32h7a3.cpu0] Cortex-M7 r1p1 processor detected\n Info : [stm32h7a3.cpu0] target has 8 breakpoints, 4 watchpoints\n Info : [rp2040.core0] Cortex-M0+ r0p1 processor detected\n Info : [rp2040.core0] target has 4 breakpoints, 2 watchpoints\n Info : [rp2040.core1] Cortex-M0+ r0p1 processor detected\n Info : [rp2040.core1] target has 4 breakpoints, 2 watchpoints\n\nWe would need to re-calibrate the speed coefficients.\nAs the speed with this change cannot be higher than before,\nwe can fine tune coefs later.\n","commit_id":"becbb510914191ef8a8dc6aaeed3b1d5f35b4f16"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"42c83ec30be8471ce15ec0d6f6cebba94eef1501","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":1,"id":"f33a55f6_fa44646b","updated":"2022-10-13 10:31:17.000000000","message":"Thanks Jonathan!\nThe code is nice and clean (in opposite of\nhttps://github.com/raspberrypi/openocd/commit/b0f34c7726a4fea6cd53d11574eef5ffe8c3553a\n). I\u0027d like to merge it ASAP, we might catch rc2.","commit_id":"becbb510914191ef8a8dc6aaeed3b1d5f35b4f16"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"dd00a469d1935761248fdcb5670804da874e767c","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"77ded005_5c0f8a30","updated":"2022-10-13 19:38:12.000000000","message":"Antonio, I recommend to merge this fix to rc2","commit_id":"b4410fd4caf9c3d7bda33a207d299f1a2cf88781"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"47c98e74c7971548530099486ead02d2b90b5611","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"0eaffe2d_b98bce83","updated":"2022-10-13 20:52:47.000000000","message":"Good, I remember we already had some complain that this driver doesn\u0027t work well on some platform.\nI think this is going to fix it.\nI have some concern about the impact on performance, but this is a functional fix and should be merged now, performance can be addressed later.\nTwo comments below, one relative with performance, the other to add memory barrier after the initialization.","commit_id":"b4410fd4caf9c3d7bda33a207d299f1a2cf88781"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"474f817d779ab450e6fd9aed4db75eb63d296654","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"698dc7cd_ce8acb3b","updated":"2022-10-13 21:10:53.000000000","message":"Thanks. With the changes suggested by Tomas and Antonio this is looking good. I have one minor query.","commit_id":"b4410fd4caf9c3d7bda33a207d299f1a2cf88781"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"e7a7b2d0d009af55bcdbcc7e1b915aa79485b8b6","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"252d34cd_9ac5338f","in_reply_to":"0eaffe2d_b98bce83","updated":"2022-10-13 21:38:46.000000000","message":"\u003e I have some concern about the impact on performance, but this is a functional fix and should be merged now, performance can be addressed later.\n\nFYI measured maximal adapter speed is around 6200 kHz @ RPi4, CPU clk 1.8 GHz.","commit_id":"b4410fd4caf9c3d7bda33a207d299f1a2cf88781"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"7e4e522dc115fc123921528e36a6e05009aeaa13","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"7306c2f2_e8f35e66","in_reply_to":"252d34cd_9ac5338f","updated":"2022-10-13 21:57:44.000000000","message":"On new platform there should be no problem, plus they really need this patch,.\nI\u0027m afraid of performance on old platforms that already work fine without this patch.","commit_id":"b4410fd4caf9c3d7bda33a207d299f1a2cf88781"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"a3bc2565a5b644f0da4926a0c8b67250218a2dbd","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":3,"id":"ff042a5f_c105f2a4","updated":"2022-10-14 15:52:53.000000000","message":"I think this version is good enough. Thanks","commit_id":"8ded71d4a75801e0c16d98d5d60c7e55d8cb16c4"}],"src/jtag/drivers/bcm2835gpio.c":[{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"42c83ec30be8471ce15ec0d6f6cebba94eef1501","unresolved":true,"context_lines":[{"line_number":246,"context_line":"\t\tif (is_gpio_config_valid(ADAPTER_GPIO_IDX_SWDIO_DIR))"},{"line_number":247,"context_line":"\t\t\tset_gpio_value(\u0026adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO_DIR], 0);"},{"line_number":248,"context_line":"\t}"},{"line_number":249,"context_line":"}"},{"line_number":250,"context_line":""},{"line_number":251,"context_line":"static int bcm2835_swdio_read(void)"},{"line_number":252,"context_line":"{"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"8f70f565_f38f82b9","line":249,"updated":"2022-10-13 10:31:17.000000000","message":"Shouldn\u0027t we synchronize here as well?","commit_id":"becbb510914191ef8a8dc6aaeed3b1d5f35b4f16"},{"author":{"_account_id":1002041,"name":"Jonathan Bell","email":"jonathan@raspberrypi.com","username":"jonathan.bell"},"change_message_id":"c5b7c828f41a320fb3dec22e504b4dbd481d380b","unresolved":false,"context_lines":[{"line_number":246,"context_line":"\t\tif (is_gpio_config_valid(ADAPTER_GPIO_IDX_SWDIO_DIR))"},{"line_number":247,"context_line":"\t\t\tset_gpio_value(\u0026adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO_DIR], 0);"},{"line_number":248,"context_line":"\t}"},{"line_number":249,"context_line":"}"},{"line_number":250,"context_line":""},{"line_number":251,"context_line":"static int bcm2835_swdio_read(void)"},{"line_number":252,"context_line":"{"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"d786c6b7_82c20644","line":249,"in_reply_to":"8f70f565_f38f82b9","updated":"2022-10-13 12:33:34.000000000","message":"There\u0027s an argument to be made for making sure the pin direction is sync\u0027d before changing the pin value, as NORMAL_NC memory is also reorderable.","commit_id":"becbb510914191ef8a8dc6aaeed3b1d5f35b4f16"},{"author":{"_account_id":1001975,"name":"Steve Marple","email":"stevemarple@googlemail.com","username":"stevemarple"},"change_message_id":"474f817d779ab450e6fd9aed4db75eb63d296654","unresolved":true,"context_lines":[{"line_number":118,"context_line":"\t\t\telse"},{"line_number":119,"context_line":"\t\t\t\tGPIO_CLR \u003d 1 \u003c\u003c adapter_gpio_config[idx].gpio_num;"},{"line_number":120,"context_line":"\t\t}"},{"line_number":121,"context_line":"\t}"},{"line_number":122,"context_line":"}"},{"line_number":123,"context_line":""},{"line_number":124,"context_line":"static void initialize_gpio(enum adapter_gpio_config_index idx)"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"fa7e2da7_e04072c6","line":121,"updated":"2022-10-13 21:10:53.000000000","message":"Does this need bcm2835_gpio_synchronize() here too?","commit_id":"b4410fd4caf9c3d7bda33a207d299f1a2cf88781"},{"author":{"_account_id":1002041,"name":"Jonathan Bell","email":"jonathan@raspberrypi.com","username":"jonathan.bell"},"change_message_id":"9263b6054f2a46d7c82d6f977aa5be08ebbf048b","unresolved":false,"context_lines":[{"line_number":118,"context_line":"\t\t\telse"},{"line_number":119,"context_line":"\t\t\t\tGPIO_CLR \u003d 1 \u003c\u003c adapter_gpio_config[idx].gpio_num;"},{"line_number":120,"context_line":"\t\t}"},{"line_number":121,"context_line":"\t}"},{"line_number":122,"context_line":"}"},{"line_number":123,"context_line":""},{"line_number":124,"context_line":"static void initialize_gpio(enum adapter_gpio_config_index idx)"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"a6a00b14_9e7a1b4d","line":121,"in_reply_to":"6745d011_88af33ea","updated":"2022-10-14 16:42:29.000000000","message":"Done","commit_id":"b4410fd4caf9c3d7bda33a207d299f1a2cf88781"},{"author":{"_account_id":1002041,"name":"Jonathan Bell","email":"jonathan@raspberrypi.com","username":"jonathan.bell"},"change_message_id":"b664881ca48a3c453699481b44f91d8fd272a4f5","unresolved":true,"context_lines":[{"line_number":118,"context_line":"\t\t\telse"},{"line_number":119,"context_line":"\t\t\t\tGPIO_CLR \u003d 1 \u003c\u003c adapter_gpio_config[idx].gpio_num;"},{"line_number":120,"context_line":"\t\t}"},{"line_number":121,"context_line":"\t}"},{"line_number":122,"context_line":"}"},{"line_number":123,"context_line":""},{"line_number":124,"context_line":"static void initialize_gpio(enum adapter_gpio_config_index idx)"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"6745d011_88af33ea","line":121,"in_reply_to":"c990ce08_5e8f4d25","updated":"2022-10-14 10:48:38.000000000","message":"restore_gpio is called in quick succession during exit, so even though it\u0027s not in a hot path for bitbash the writes will end up close together.","commit_id":"b4410fd4caf9c3d7bda33a207d299f1a2cf88781"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"e7a7b2d0d009af55bcdbcc7e1b915aa79485b8b6","unresolved":true,"context_lines":[{"line_number":118,"context_line":"\t\t\telse"},{"line_number":119,"context_line":"\t\t\t\tGPIO_CLR \u003d 1 \u003c\u003c adapter_gpio_config[idx].gpio_num;"},{"line_number":120,"context_line":"\t\t}"},{"line_number":121,"context_line":"\t}"},{"line_number":122,"context_line":"}"},{"line_number":123,"context_line":""},{"line_number":124,"context_line":"static void initialize_gpio(enum adapter_gpio_config_index idx)"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"c990ce08_5e8f4d25","line":121,"in_reply_to":"f4c2452c_a8e613f0","updated":"2022-10-13 21:38:46.000000000","message":"IMO useless. There is no other write and plenty of time to flush the pipe.","commit_id":"b4410fd4caf9c3d7bda33a207d299f1a2cf88781"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"5a9f779dbf9cb54a4b9ace4f76989665b1511b6c","unresolved":true,"context_lines":[{"line_number":118,"context_line":"\t\t\telse"},{"line_number":119,"context_line":"\t\t\t\tGPIO_CLR \u003d 1 \u003c\u003c adapter_gpio_config[idx].gpio_num;"},{"line_number":120,"context_line":"\t\t}"},{"line_number":121,"context_line":"\t}"},{"line_number":122,"context_line":"}"},{"line_number":123,"context_line":""},{"line_number":124,"context_line":"static void initialize_gpio(enum adapter_gpio_config_index idx)"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"f4c2452c_a8e613f0","line":121,"in_reply_to":"fa7e2da7_e04072c6","updated":"2022-10-13 21:29:58.000000000","message":"This function is only called during bcm2835gpio_quit(), so probably no need to bother of.\nOr, adding it at the end of bcm2835gpio_quit()?","commit_id":"b4410fd4caf9c3d7bda33a207d299f1a2cf88781"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"47c98e74c7971548530099486ead02d2b90b5611","unresolved":true,"context_lines":[{"line_number":153,"context_line":"\t/* Direction for non push-pull is already set by set_gpio_value() */"},{"line_number":154,"context_line":"\tif (adapter_gpio_config[idx].drive \u003d\u003d ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL)"},{"line_number":155,"context_line":"\t\tOUT_GPIO(adapter_gpio_config[idx].gpio_num);"},{"line_number":156,"context_line":"}"},{"line_number":157,"context_line":""},{"line_number":158,"context_line":"static bb_value_t bcm2835gpio_read(void)"},{"line_number":159,"context_line":"{"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"6e18bd9e_b2402629","line":156,"updated":"2022-10-13 20:52:47.000000000","message":"probably we need bcm2835_gpio_synchronize() also here\nIt should be needed inside the last \"if\" only, but since this function is not time critical, it\u0027s could be added as very last statement of this function","commit_id":"b4410fd4caf9c3d7bda33a207d299f1a2cf88781"},{"author":{"_account_id":1002041,"name":"Jonathan Bell","email":"jonathan@raspberrypi.com","username":"jonathan.bell"},"change_message_id":"9263b6054f2a46d7c82d6f977aa5be08ebbf048b","unresolved":false,"context_lines":[{"line_number":153,"context_line":"\t/* Direction for non push-pull is already set by set_gpio_value() */"},{"line_number":154,"context_line":"\tif (adapter_gpio_config[idx].drive \u003d\u003d ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL)"},{"line_number":155,"context_line":"\t\tOUT_GPIO(adapter_gpio_config[idx].gpio_num);"},{"line_number":156,"context_line":"}"},{"line_number":157,"context_line":""},{"line_number":158,"context_line":"static bb_value_t bcm2835gpio_read(void)"},{"line_number":159,"context_line":"{"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"62380759_65523fd0","line":156,"in_reply_to":"431c7d0d_e65e75ff","updated":"2022-10-14 16:42:29.000000000","message":"Done","commit_id":"b4410fd4caf9c3d7bda33a207d299f1a2cf88781"},{"author":{"_account_id":1002041,"name":"Jonathan Bell","email":"jonathan@raspberrypi.com","username":"jonathan.bell"},"change_message_id":"b664881ca48a3c453699481b44f91d8fd272a4f5","unresolved":true,"context_lines":[{"line_number":153,"context_line":"\t/* Direction for non push-pull is already set by set_gpio_value() */"},{"line_number":154,"context_line":"\tif (adapter_gpio_config[idx].drive \u003d\u003d ADAPTER_GPIO_DRIVE_MODE_PUSH_PULL)"},{"line_number":155,"context_line":"\t\tOUT_GPIO(adapter_gpio_config[idx].gpio_num);"},{"line_number":156,"context_line":"}"},{"line_number":157,"context_line":""},{"line_number":158,"context_line":"static bb_value_t bcm2835gpio_read(void)"},{"line_number":159,"context_line":"{"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"431c7d0d_e65e75ff","line":156,"in_reply_to":"6e18bd9e_b2402629","updated":"2022-10-14 10:48:38.000000000","message":"Same argument applies here as with restore_gpio above","commit_id":"b4410fd4caf9c3d7bda33a207d299f1a2cf88781"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"47c98e74c7971548530099486ead02d2b90b5611","unresolved":true,"context_lines":[{"line_number":240,"context_line":"\tif (is_output) {"},{"line_number":241,"context_line":"\t\tif (is_gpio_config_valid(ADAPTER_GPIO_IDX_SWDIO_DIR))"},{"line_number":242,"context_line":"\t\t\tset_gpio_value(\u0026adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO_DIR], 1);"},{"line_number":243,"context_line":"\t\tOUT_GPIO(adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].gpio_num);"},{"line_number":244,"context_line":"\t} else {"},{"line_number":245,"context_line":"\t\tINP_GPIO(adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].gpio_num);"},{"line_number":246,"context_line":"\t\tif (is_gpio_config_valid(ADAPTER_GPIO_IDX_SWDIO_DIR))"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"73c5b0dd_9ad2b1a8","line":243,"updated":"2022-10-13 20:52:47.000000000","message":"the bcm2835_gpio_synchronize() should go only here.\nThe \"else\" branch is not affected","commit_id":"b4410fd4caf9c3d7bda33a207d299f1a2cf88781"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"e7a7b2d0d009af55bcdbcc7e1b915aa79485b8b6","unresolved":true,"context_lines":[{"line_number":240,"context_line":"\tif (is_output) {"},{"line_number":241,"context_line":"\t\tif (is_gpio_config_valid(ADAPTER_GPIO_IDX_SWDIO_DIR))"},{"line_number":242,"context_line":"\t\t\tset_gpio_value(\u0026adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO_DIR], 1);"},{"line_number":243,"context_line":"\t\tOUT_GPIO(adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].gpio_num);"},{"line_number":244,"context_line":"\t} else {"},{"line_number":245,"context_line":"\t\tINP_GPIO(adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].gpio_num);"},{"line_number":246,"context_line":"\t\tif (is_gpio_config_valid(ADAPTER_GPIO_IDX_SWDIO_DIR))"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"adfc036a_944ef7c7","line":243,"in_reply_to":"73c5b0dd_9ad2b1a8","updated":"2022-10-13 21:38:46.000000000","message":"Actually bcm2835_swdio_drive() is always followed by bcm2835gpio_swd_write_fast/generic() and it calls synchronize.\nHypothetically if the write to the direction control register from INP_GPIO()\ngets reordered with a write to GPIO_SET or CLR in following bcm2835gpio_swd_write_xx(), we get a glitch on SWDIO - probably harmless - certainly not as bad as a missing SWCLK pulse.","commit_id":"b4410fd4caf9c3d7bda33a207d299f1a2cf88781"},{"author":{"_account_id":1002041,"name":"Jonathan Bell","email":"jonathan@raspberrypi.com","username":"jonathan.bell"},"change_message_id":"9263b6054f2a46d7c82d6f977aa5be08ebbf048b","unresolved":false,"context_lines":[{"line_number":240,"context_line":"\tif (is_output) {"},{"line_number":241,"context_line":"\t\tif (is_gpio_config_valid(ADAPTER_GPIO_IDX_SWDIO_DIR))"},{"line_number":242,"context_line":"\t\t\tset_gpio_value(\u0026adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO_DIR], 1);"},{"line_number":243,"context_line":"\t\tOUT_GPIO(adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].gpio_num);"},{"line_number":244,"context_line":"\t} else {"},{"line_number":245,"context_line":"\t\tINP_GPIO(adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].gpio_num);"},{"line_number":246,"context_line":"\t\tif (is_gpio_config_valid(ADAPTER_GPIO_IDX_SWDIO_DIR))"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"9fc48b94_aebefd0b","line":243,"in_reply_to":"821ac358_1c25d371","updated":"2022-10-14 16:42:29.000000000","message":"Done","commit_id":"b4410fd4caf9c3d7bda33a207d299f1a2cf88781"},{"author":{"_account_id":1002041,"name":"Jonathan Bell","email":"jonathan@raspberrypi.com","username":"jonathan.bell"},"change_message_id":"b664881ca48a3c453699481b44f91d8fd272a4f5","unresolved":true,"context_lines":[{"line_number":240,"context_line":"\tif (is_output) {"},{"line_number":241,"context_line":"\t\tif (is_gpio_config_valid(ADAPTER_GPIO_IDX_SWDIO_DIR))"},{"line_number":242,"context_line":"\t\t\tset_gpio_value(\u0026adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO_DIR], 1);"},{"line_number":243,"context_line":"\t\tOUT_GPIO(adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].gpio_num);"},{"line_number":244,"context_line":"\t} else {"},{"line_number":245,"context_line":"\t\tINP_GPIO(adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO].gpio_num);"},{"line_number":246,"context_line":"\t\tif (is_gpio_config_valid(ADAPTER_GPIO_IDX_SWDIO_DIR))"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"821ac358_1c25d371","line":243,"in_reply_to":"adfc036a_944ef7c7","updated":"2022-10-14 10:48:38.000000000","message":"The barrier needs to be applied after any pin direction change. Tomas is correct in asserting that writes here could be reordered with respect to writes to the gpio set/clear registers, although it\u0027s unlikely to happen in a typical SWD sequence.","commit_id":"b4410fd4caf9c3d7bda33a207d299f1a2cf88781"}]}