)]}'
{"id":"openocd~master~Ib00e68b32378b1ad6e4398ffbf5d0d3a57987ecf","project":"openocd","branch":"master","hashtags":[],"change_id":"Ib00e68b32378b1ad6e4398ffbf5d0d3a57987ecf","subject":"Adds arm\u0027s cortex-m3/4 MPU registers","status":"ABANDONED","created":"2023-02-15 16:52:36.000000000","updated":"2023-02-15 17:06:36.000000000","total_comment_count":0,"unresolved_comment_count":0,"has_review_started":true,"meta_rev_id":"aaacdc3617867c3ced24e06070ce4ae567462a41","_number":7475,"owner":{"_account_id":1002118,"name":"Mateus Campaner Hercules","display_name":"Mateus","email":"mchercules@gmail.com","username":"mcampx"},"actions":{},"labels":{"Verified":{"values":{"-1":"Fails"," 0":"No score","+1":"Verified"},"description":"","default_value":0},"Code-Review":{"values":{"-2":"This shall not be merged","-1":"I would prefer this is not merged as is"," 0":"No score","+1":"Looks good to me, but someone else must approve","+2":"Looks good to me, approved"},"description":"","default_value":0}},"removable_reviewers":[],"reviewers":{},"pending_reviewers":{},"reviewer_updates":[],"messages":[{"id":"604292a77f931b1a7294422976bf4ccac77fc594","tag":"autogenerated:gerrit:newPatchSet","author":{"_account_id":1002118,"name":"Mateus Campaner Hercules","display_name":"Mateus","email":"mchercules@gmail.com","username":"mcampx"},"real_author":{"_account_id":1002118,"name":"Mateus Campaner Hercules","display_name":"Mateus","email":"mchercules@gmail.com","username":"mcampx"},"date":"2023-02-15 16:52:36.000000000","message":"Uploaded patch set 1.","accounts_in_message":[],"_revision_number":1},{"id":"aaacdc3617867c3ced24e06070ce4ae567462a41","tag":"autogenerated:gerrit:abandon","author":{"_account_id":1002118,"name":"Mateus Campaner Hercules","display_name":"Mateus","email":"mchercules@gmail.com","username":"mcampx"},"real_author":{"_account_id":1002118,"name":"Mateus Campaner Hercules","display_name":"Mateus","email":"mchercules@gmail.com","username":"mcampx"},"date":"2023-02-15 17:06:36.000000000","message":"Abandoned\n\nsingle patch was split over commits","accounts_in_message":[],"_revision_number":1}],"current_revision":"54698f878aa891a6d9b65daed2a0a51efd9c1986","revisions":{"54698f878aa891a6d9b65daed2a0a51efd9c1986":{"kind":"REWORK","_number":1,"created":"2023-02-15 16:52:36.000000000","uploader":{"_account_id":1002118,"name":"Mateus Campaner Hercules","display_name":"Mateus","email":"mchercules@gmail.com","username":"mcampx"},"ref":"refs/changes/75/7475/1","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/75/7475/1","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/75/7475/1 \u0026\u0026 git checkout -b change-7475 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/75/7475/1 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/75/7475/1 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/75/7475/1 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/75/7475/1","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/75/7475/1 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"85ae73de03ebcc723842b7978a6c94b73166f027","subject":"new SPI memory devices, continuation code for manufacturer id"}],"author":{"name":"Mateus Campaner Hercules","email":"mchercules@gmail.com","date":"2023-02-15 14:56:28.000000000","tz":-180},"committer":{"name":"Mateus Campaner Hercules","email":"mchercules@gmail.com","date":"2023-02-15 16:49:13.000000000","tz":-180},"subject":"Adds arm\u0027s cortex-m3/4 MPU registers","message":"Adds arm\u0027s cortex-m3/4 MPU registers\n\nTo be able to determine if a target is running a FreeRTOS rtos\nwith MPU port is necessary to access some of the MPU registers\nto check:\n\n- If it exists on target: by parsing MPU_TYPE\u0027s DREGION bits as\nthis register is marked as always implemented\n\n- If the MPU is enabled: by parsing the MPU_CTRL\u0027s ENABLED bit\n\nSigned-off-by: Mateus Campaner Hercules \u003cmchercules@gmail.com\u003e\nChange-Id: Ib00e68b32378b1ad6e4398ffbf5d0d3a57987ecf\n"}}},"requirements":[],"submit_records":[],"submit_requirements":[]}