)]}'
{"/PATCHSET_LEVEL":[{"author":{"_account_id":1001964,"name":"Erhan Kurubas","display_name":"Erhan Kurubas","email":"erhan.kurubas@espressif.com","username":"erhankur"},"change_message_id":"de91bccb968c1b408a35579cd16184bc4161ee8d","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"85625d04_9e6d1652","updated":"2023-07-10 22:57:03.000000000","message":"Ian, I will address your comments from PS 7760. You don\u0027t need to re-comment here.","commit_id":"d840edee64738a1b9b7e2c6221c469cda2428f28"},{"author":{"_account_id":1001982,"name":"Ian Thompson","email":"ianst@cadence.com","username":"ianstcdns"},"change_message_id":"6392b7b5a1014c2a6d8eb917c71821a190630d35","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"989887d9_6106652c","in_reply_to":"85625d04_9e6d1652","updated":"2023-07-13 00:56:52.000000000","message":"Thanks for the heads-up... pls tag me when it\u0027s ready for review again.","commit_id":"d840edee64738a1b9b7e2c6221c469cda2428f28"},{"author":{"_account_id":1001982,"name":"Ian Thompson","email":"ianst@cadence.com","username":"ianstcdns"},"change_message_id":"3f47633b0ac6e03333917f40f6ba0836867f8148","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":4,"id":"03e4859a_552a4f0c","updated":"2023-07-25 13:34:38.000000000","message":"Couple of minor questions that are not necessarily actionable.  Feel free to close them if there aren\u0027t any relevant changes.  But I\u0027m curious--why did a couple of the files in your earlier 7760 review get moved from the xtensa/ to the espressif/ directory?  Once I eventually get to testing this on generic xtensa, would you be open to my moving them (or parts of them) back at that time?","commit_id":"5f319d719efef89efd3cec34efe3c25053e431fa"},{"author":{"_account_id":1001964,"name":"Erhan Kurubas","display_name":"Erhan Kurubas","email":"erhan.kurubas@espressif.com","username":"erhankur"},"change_message_id":"60abd077f910760436664da4dd233a2a65313b47","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":4,"id":"1863a22c_249c3f31","in_reply_to":"03e4859a_552a4f0c","updated":"2023-07-25 19:58:34.000000000","message":"Hello Ian,\n\nYou can refer to the diagram provided in the link below.\n\nhttps://docs.google.com/drawings/d/1Jl8_mH7DMHoOme7gAKLaYMy3LuzSznCapzV6MAyna6w/edit?usp\u003dsharing\n\nThe structures used for running the algorithm are shared between RISC-V and Xtensa architectures. As a result, I have transferred certain struct-dependent functions from xtensa.c.\n\nIf we later move these structures to the common \"algorithm.h\", we can consider returning to the implementation in 7760","commit_id":"5f319d719efef89efd3cec34efe3c25053e431fa"},{"author":{"_account_id":1001982,"name":"Ian Thompson","email":"ianst@cadence.com","username":"ianstcdns"},"change_message_id":"50ea8aa81183daefc381c07da10f71a17a102310","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":4,"id":"39c6006c_9176f471","in_reply_to":"1863a22c_249c3f31","updated":"2023-07-26 13:25:34.000000000","message":"Ah makes sense.  I didn\u0027t realize this was shared with RV32.","commit_id":"5f319d719efef89efd3cec34efe3c25053e431fa"},{"author":{"_account_id":1001964,"name":"Erhan Kurubas","display_name":"Erhan Kurubas","email":"erhan.kurubas@espressif.com","username":"erhankur"},"change_message_id":"cfcb791bc8141508c78cc515e04b9ae8319eeba8","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":5,"id":"c63ad176_bbfbfd32","updated":"2023-08-31 10:59:43.000000000","message":"Hi @Antonio, Is there any available time slot to review this patch?","commit_id":"a2a900a0964ed0fc430352ed1e927f4c205d003b"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"c805a5a424651ab3b5ffeabd838c8af13b29a4cd","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":5,"id":"0a6c88a7_116cf388","updated":"2023-09-10 16:14:26.000000000","message":"Only minor stuff to fix. The rest looks ok.","commit_id":"a2a900a0964ed0fc430352ed1e927f4c205d003b"},{"author":{"_account_id":1001964,"name":"Erhan Kurubas","display_name":"Erhan Kurubas","email":"erhan.kurubas@espressif.com","username":"erhankur"},"change_message_id":"9c18e7b8c9afa2be51e9fd6a909c0e00111da3fd","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":5,"id":"1c68eb29_bcee93dd","updated":"2023-08-01 08:18:40.000000000","message":"Thanks Ian for the review. I confirmed your last comment with Alexey. I hope it\u0027s OK for you. \n@Antonio, can you also please have a look when you have a time?","commit_id":"a2a900a0964ed0fc430352ed1e927f4c205d003b"},{"author":{"_account_id":1001964,"name":"Erhan Kurubas","display_name":"Erhan Kurubas","email":"erhan.kurubas@espressif.com","username":"erhankur"},"change_message_id":"6cd4e43da244f4748dd63cdd34d1aa6ceee2bdc0","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":5,"id":"a0655210_b53a5e68","updated":"2023-09-10 17:42:07.000000000","message":"Thanks for the review @Antonio, @Ian","commit_id":"a2a900a0964ed0fc430352ed1e927f4c205d003b"},{"author":{"_account_id":1001982,"name":"Ian Thompson","email":"ianst@cadence.com","username":"ianstcdns"},"change_message_id":"52c99b2dd692c3a8b7f3a72da470e5f9de77a9f8","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":5,"id":"a8cdd283_6dc472fc","updated":"2023-08-03 13:37:36.000000000","message":"Thanks, Erhan.  Looks good to me.","commit_id":"a2a900a0964ed0fc430352ed1e927f4c205d003b"},{"author":{"_account_id":1001982,"name":"Ian Thompson","email":"ianst@cadence.com","username":"ianstcdns"},"change_message_id":"6bbcd4f919d6b24bba34dbcf962b12bacb19b5ff","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":8,"id":"0cc01f06_9461f1c6","updated":"2023-11-25 22:16:57.000000000","message":"Been using patchset 6 successfully for a while now.  Looks good to me... Thanks!","commit_id":"50252a729791fd1ba5e7fc281c6e6a7beb66d571"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"83a4a41d958e8dc5391fa9c01a7cf40941ecf159","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":8,"id":"147951e4_5b10c76f","updated":"2023-11-25 18:50:41.000000000","message":"thanks","commit_id":"50252a729791fd1ba5e7fc281c6e6a7beb66d571"},{"author":{"_account_id":1001982,"name":"Ian Thompson","email":"ianst@cadence.com","username":"ianstcdns"},"change_message_id":"cd311dc72ffefc2226a5c914a8b7d330432b62f1","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":9,"id":"519a4b05_8455f90d","updated":"2023-12-05 21:42:49.000000000","message":"not sure whether a new +1 is required after prior rebase/rebuild?","commit_id":"b4e4f842b16f745ce9fc8fe0da4d1a590d380574"}],"src/target/xtensa/xtensa.c":[{"author":{"_account_id":1001982,"name":"Ian Thompson","email":"ianst@cadence.com","username":"ianstcdns"},"change_message_id":"3f47633b0ac6e03333917f40f6ba0836867f8148","unresolved":true,"context_lines":[{"line_number":2705,"context_line":"\t\t\tLOG_DEBUG(\"setting core_mode: 0x%x\", algorithm_info-\u003ecore_mode);"},{"line_number":2706,"context_line":"\t\t\txtensa_reg_val_t new_ps \u003d (ps \u0026 ~XT_PS_RING_MSK) | XT_PS_RING(algorithm_info-\u003ecore_mode);"},{"line_number":2707,"context_line":"\t\t\t/* save previous core mode */"},{"line_number":2708,"context_line":"\t\t\talgorithm_info-\u003ecore_mode \u003d core_mode;"},{"line_number":2709,"context_line":"\t\t\txtensa_reg_set(target, eps_reg_idx, new_ps);"},{"line_number":2710,"context_line":"\t\t\txtensa-\u003ecore_cache-\u003ereg_list[eps_reg_idx].valid \u003d 1;"},{"line_number":2711,"context_line":"\t\t}"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"e307040c_6c8a388c","line":2708,"updated":"2023-07-25 13:34:38.000000000","message":"Have you tested running algos that change PS.INTLEVEL or PS.EXCM (e.g. an RSIL instruction)?  Does PS get restored properly after that?  If not, and it\u0027s nontrivial to fix this, please add a comment.","commit_id":"5f319d719efef89efd3cec34efe3c25053e431fa"},{"author":{"_account_id":1001964,"name":"Erhan Kurubas","display_name":"Erhan Kurubas","email":"erhan.kurubas@espressif.com","username":"erhankur"},"change_message_id":"0b9c2e98324aa30a48c45a24065657bba99d21f2","unresolved":false,"context_lines":[{"line_number":2705,"context_line":"\t\t\tLOG_DEBUG(\"setting core_mode: 0x%x\", algorithm_info-\u003ecore_mode);"},{"line_number":2706,"context_line":"\t\t\txtensa_reg_val_t new_ps \u003d (ps \u0026 ~XT_PS_RING_MSK) | XT_PS_RING(algorithm_info-\u003ecore_mode);"},{"line_number":2707,"context_line":"\t\t\t/* save previous core mode */"},{"line_number":2708,"context_line":"\t\t\talgorithm_info-\u003ecore_mode \u003d core_mode;"},{"line_number":2709,"context_line":"\t\t\txtensa_reg_set(target, eps_reg_idx, new_ps);"},{"line_number":2710,"context_line":"\t\t\txtensa-\u003ecore_cache-\u003ereg_list[eps_reg_idx].valid \u003d 1;"},{"line_number":2711,"context_line":"\t\t}"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"284a305f_8795cc7d","line":2708,"in_reply_to":"e307040c_6c8a388c","updated":"2023-08-01 08:16:20.000000000","message":"We don\u0027t have specific tests for when the stub modifies intlevel or excm. Instead, we depend on the fact that PS is restored like any other dirty register after the stub is called. For now core_mode is not used in our chips. I added a TODO comment regarding the restoration.","commit_id":"5f319d719efef89efd3cec34efe3c25053e431fa"},{"author":{"_account_id":1001982,"name":"Ian Thompson","email":"ianst@cadence.com","username":"ianstcdns"},"change_message_id":"3f47633b0ac6e03333917f40f6ba0836867f8148","unresolved":true,"context_lines":[{"line_number":2783,"context_line":"\t\tif (i \u003d\u003d XT_REG_IDX_PS) {"},{"line_number":2784,"context_line":"\t\t\tcontinue;\t/* restore mapped reg number of PS depends on NDEBUGLEVEL */"},{"line_number":2785,"context_line":"\t\t} else if (i \u003d\u003d XT_REG_IDX_DEBUGCAUSE) {"},{"line_number":2786,"context_line":"\t\t\t/*FIXME: restoring DEBUGCAUSE causes exception when executing corresponding"},{"line_number":2787,"context_line":"\t\t\t* instruction in DIR */"},{"line_number":2788,"context_line":"\t\t\tLOG_DEBUG(\"Skip restoring register %s: 0x%8.8\" PRIx32 \" -\u003e 0x%8.8\" PRIx32,"},{"line_number":2789,"context_line":"\t\t\t\txtensa-\u003ecore_cache-\u003ereg_list[i].name,"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"d69f72da_8a2cecb6","line":2786,"updated":"2023-07-25 13:34:38.000000000","message":"It\u0027s possible this is happening because of the following comment in the ISA RM: \"The DEBUGCAUSE register is undefined after processor reset and when CINTLEVEL \u003c DEBUGLEVEL.\"","commit_id":"5f319d719efef89efd3cec34efe3c25053e431fa"},{"author":{"_account_id":1001982,"name":"Ian Thompson","email":"ianst@cadence.com","username":"ianstcdns"},"change_message_id":"50ea8aa81183daefc381c07da10f71a17a102310","unresolved":false,"context_lines":[{"line_number":2783,"context_line":"\t\tif (i \u003d\u003d XT_REG_IDX_PS) {"},{"line_number":2784,"context_line":"\t\t\tcontinue;\t/* restore mapped reg number of PS depends on NDEBUGLEVEL */"},{"line_number":2785,"context_line":"\t\t} else if (i \u003d\u003d XT_REG_IDX_DEBUGCAUSE) {"},{"line_number":2786,"context_line":"\t\t\t/*FIXME: restoring DEBUGCAUSE causes exception when executing corresponding"},{"line_number":2787,"context_line":"\t\t\t* instruction in DIR */"},{"line_number":2788,"context_line":"\t\t\tLOG_DEBUG(\"Skip restoring register %s: 0x%8.8\" PRIx32 \" -\u003e 0x%8.8\" PRIx32,"},{"line_number":2789,"context_line":"\t\t\t\txtensa-\u003ecore_cache-\u003ereg_list[i].name,"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"d127cb11_a1233cfc","line":2786,"in_reply_to":"d69f72da_8a2cecb6","updated":"2023-07-26 13:25:34.000000000","message":"Comment is just FYI.  Resolving.","commit_id":"5f319d719efef89efd3cec34efe3c25053e431fa"},{"author":{"_account_id":1001982,"name":"Ian Thompson","email":"ianst@cadence.com","username":"ianstcdns"},"change_message_id":"3f47633b0ac6e03333917f40f6ba0836867f8148","unresolved":true,"context_lines":[{"line_number":2820,"context_line":"\treturn retval;"},{"line_number":2821,"context_line":"}"},{"line_number":2822,"context_line":""},{"line_number":2823,"context_line":"int xtensa_run_algorithm(struct target *target,"},{"line_number":2824,"context_line":"\tint num_mem_params, struct mem_param *mem_params,"},{"line_number":2825,"context_line":"\tint num_reg_params, struct reg_param *reg_params,"},{"line_number":2826,"context_line":"\ttarget_addr_t entry_point, target_addr_t exit_point,"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"d59b6e0e_4275e859","line":2823,"updated":"2023-07-25 13:34:38.000000000","message":"how are these tested?  do they currently require having the esp changes in review 7772, or is there an easy way to do that on non-xtensa platforms?","commit_id":"5f319d719efef89efd3cec34efe3c25053e431fa"},{"author":{"_account_id":1001982,"name":"Ian Thompson","email":"ianst@cadence.com","username":"ianstcdns"},"change_message_id":"50ea8aa81183daefc381c07da10f71a17a102310","unresolved":false,"context_lines":[{"line_number":2820,"context_line":"\treturn retval;"},{"line_number":2821,"context_line":"}"},{"line_number":2822,"context_line":""},{"line_number":2823,"context_line":"int xtensa_run_algorithm(struct target *target,"},{"line_number":2824,"context_line":"\tint num_mem_params, struct mem_param *mem_params,"},{"line_number":2825,"context_line":"\tint num_reg_params, struct reg_param *reg_params,"},{"line_number":2826,"context_line":"\ttarget_addr_t entry_point, target_addr_t exit_point,"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"bec0b84c_cf4fa550","line":2823,"in_reply_to":"73831907_938a6486","updated":"2023-07-26 13:25:34.000000000","message":"Thanks.  I\u0027ll take a look in the future when I have time to add Xtensa trace support.","commit_id":"5f319d719efef89efd3cec34efe3c25053e431fa"},{"author":{"_account_id":1001964,"name":"Erhan Kurubas","display_name":"Erhan Kurubas","email":"erhan.kurubas@espressif.com","username":"erhankur"},"change_message_id":"0653deab4220c8eadc18d0d2f6d61f3dbafbd51f","unresolved":true,"context_lines":[{"line_number":2820,"context_line":"\treturn retval;"},{"line_number":2821,"context_line":"}"},{"line_number":2822,"context_line":""},{"line_number":2823,"context_line":"int xtensa_run_algorithm(struct target *target,"},{"line_number":2824,"context_line":"\tint num_mem_params, struct mem_param *mem_params,"},{"line_number":2825,"context_line":"\tint num_reg_params, struct reg_param *reg_params,"},{"line_number":2826,"context_line":"\ttarget_addr_t entry_point, target_addr_t exit_point,"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"73831907_938a6486","line":2823,"in_reply_to":"d59b6e0e_4275e859","updated":"2023-07-25 20:15:37.000000000","message":"Testing might not be straightforward at the moment, as it requires a stub code to run. I recommend you take a look at our fork to understand how it is connected. The integration done in esp_flash.c and also esp_gcov command uses algorithm. I\u0027ve prepared simplified patches for here 7761 and 7766(not rebased yet)","commit_id":"5f319d719efef89efd3cec34efe3c25053e431fa"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"c805a5a424651ab3b5ffeabd838c8af13b29a4cd","unresolved":true,"context_lines":[{"line_number":2675,"context_line":"\tfor (int i \u003d 0; i \u003c num_reg_params; i++) {"},{"line_number":2676,"context_line":"\t\tif (reg_params[i].size \u003e 32) {"},{"line_number":2677,"context_line":"\t\t\tLOG_ERROR(\"BUG: not supported register size (%d)\", reg_params[i].size);"},{"line_number":2678,"context_line":"\t\t\treturn ERROR_COMMAND_SYNTAX_ERROR;"},{"line_number":2679,"context_line":"\t\t}"},{"line_number":2680,"context_line":"\t\tstruct reg *reg \u003d register_get_by_name(xtensa-\u003ecore_cache, reg_params[i].reg_name, 0);"},{"line_number":2681,"context_line":"\t\tif (!reg) {"}],"source_content_type":"text/x-csrc","patch_set":5,"id":"f7083913_fa75bfa6","line":2678,"updated":"2023-09-10 16:14:26.000000000","message":"The special ERROR_COMMAND_SYNTAX_ERROR is intended to be used only by OpenOCD TCL commands to report a syntax error.\nHere it should be more appropriate ERROR_TARGET_RESOURCE_NOT_AVAILABLE, or even a generic ERROR_FAIL.\nSame in line 2683, 2687, 2758, 2762,","commit_id":"a2a900a0964ed0fc430352ed1e927f4c205d003b"},{"author":{"_account_id":1001964,"name":"Erhan Kurubas","display_name":"Erhan Kurubas","email":"erhan.kurubas@espressif.com","username":"erhankur"},"change_message_id":"6cd4e43da244f4748dd63cdd34d1aa6ceee2bdc0","unresolved":false,"context_lines":[{"line_number":2675,"context_line":"\tfor (int i \u003d 0; i \u003c num_reg_params; i++) {"},{"line_number":2676,"context_line":"\t\tif (reg_params[i].size \u003e 32) {"},{"line_number":2677,"context_line":"\t\t\tLOG_ERROR(\"BUG: not supported register size (%d)\", reg_params[i].size);"},{"line_number":2678,"context_line":"\t\t\treturn ERROR_COMMAND_SYNTAX_ERROR;"},{"line_number":2679,"context_line":"\t\t}"},{"line_number":2680,"context_line":"\t\tstruct reg *reg \u003d register_get_by_name(xtensa-\u003ecore_cache, reg_params[i].reg_name, 0);"},{"line_number":2681,"context_line":"\t\tif (!reg) {"}],"source_content_type":"text/x-csrc","patch_set":5,"id":"1ef2eede_128b3afd","line":2678,"in_reply_to":"f7083913_fa75bfa6","updated":"2023-09-10 17:42:07.000000000","message":"Done","commit_id":"a2a900a0964ed0fc430352ed1e927f4c205d003b"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"c805a5a424651ab3b5ffeabd838c8af13b29a4cd","unresolved":true,"context_lines":[{"line_number":2739,"context_line":"\t\tretval \u003d target_wait_state(target, TARGET_HALTED, 500);"},{"line_number":2740,"context_line":"\t\tif (retval !\u003d ERROR_OK)"},{"line_number":2741,"context_line":"\t\t\treturn retval;"},{"line_number":2742,"context_line":"\t\tLOG_TARGET_ERROR(target, \"not halted %d, pc 0x%x, ps 0x%x\", retval,"},{"line_number":2743,"context_line":"\t\t\txtensa_reg_get(target, XT_REG_IDX_PC),"},{"line_number":2744,"context_line":"\t\t\txtensa_reg_get(target, xtensa-\u003eeps_dbglevel_idx));"},{"line_number":2745,"context_line":"\t\treturn ERROR_TARGET_TIMEOUT;"}],"source_content_type":"text/x-csrc","patch_set":5,"id":"2af4af14_b954fefc","line":2742,"updated":"2023-09-10 16:14:26.000000000","message":"due to\ntypedef uint32_t xtensa_reg_val_t;\nyou should use %PRIx32 for the values returned by xtensa_reg_get()","commit_id":"a2a900a0964ed0fc430352ed1e927f4c205d003b"},{"author":{"_account_id":1001964,"name":"Erhan Kurubas","display_name":"Erhan Kurubas","email":"erhan.kurubas@espressif.com","username":"erhankur"},"change_message_id":"6cd4e43da244f4748dd63cdd34d1aa6ceee2bdc0","unresolved":false,"context_lines":[{"line_number":2739,"context_line":"\t\tretval \u003d target_wait_state(target, TARGET_HALTED, 500);"},{"line_number":2740,"context_line":"\t\tif (retval !\u003d ERROR_OK)"},{"line_number":2741,"context_line":"\t\t\treturn retval;"},{"line_number":2742,"context_line":"\t\tLOG_TARGET_ERROR(target, \"not halted %d, pc 0x%x, ps 0x%x\", retval,"},{"line_number":2743,"context_line":"\t\t\txtensa_reg_get(target, XT_REG_IDX_PC),"},{"line_number":2744,"context_line":"\t\t\txtensa_reg_get(target, xtensa-\u003eeps_dbglevel_idx));"},{"line_number":2745,"context_line":"\t\treturn ERROR_TARGET_TIMEOUT;"}],"source_content_type":"text/x-csrc","patch_set":5,"id":"270be99c_69aaf221","line":2742,"in_reply_to":"2af4af14_b954fefc","updated":"2023-09-10 17:42:07.000000000","message":"Done","commit_id":"a2a900a0964ed0fc430352ed1e927f4c205d003b"}]}