)]}'
{"/PATCHSET_LEVEL":[{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"6448ac7623bcb75e36bf73ab78a3afd28654807d","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":27,"id":"5965faac_07475b2b","updated":"2024-02-29 02:58:45.000000000","message":"Hi! I was trying to port the `FIELD_GET` and `FILED_SET` from linux kernel and I noticed that the macro `GENMASK` is already ported in `src/helper/bits.h#24`, should I put it there? Or just in `mips32.h`?\n\nBTW, I will do the refractor for `FILED_GET` in a seperate patch later in the chain.","commit_id":"14c005b97046b7d5a6ebfe442afcf5a2dafdc8ee"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"2dfb9222678ef1855e63aaa267f2b0eccba554bb","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":27,"id":"e9fdbdab_d3862a88","updated":"2024-03-05 19:58:08.000000000","message":"Looks good. Thank you!","commit_id":"14c005b97046b7d5a6ebfe442afcf5a2dafdc8ee"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"23fa7234510bb2899f778476190379635a29beef","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":27,"id":"2d9c82e1_2876e3c9","updated":"2024-03-09 11:12:28.000000000","message":"Thanks","commit_id":"14c005b97046b7d5a6ebfe442afcf5a2dafdc8ee"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"daf82d037f3106b7925a235183ff4b427ec3643a","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":27,"id":"d34db877_9bde44de","in_reply_to":"5965faac_07475b2b","updated":"2024-02-29 08:06:54.000000000","message":"Please create src/helper/bitfield.h \ns/FILED_SET/FILED_PREP","commit_id":"14c005b97046b7d5a6ebfe442afcf5a2dafdc8ee"}],"src/target/mips32.c":[{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"15e6f812f8c8134da7c7b583043f6ea2950b696f","unresolved":true,"context_lines":[{"line_number":269,"context_line":" *"},{"line_number":270,"context_line":" * @brief Sets the width of floating-point registers based on the specified flag."},{"line_number":271,"context_line":" */"},{"line_number":272,"context_line":"static void mips32_set_fpr_width(struct mips32_common *mips32, bool fp64)"},{"line_number":273,"context_line":"{"},{"line_number":274,"context_line":"\tstruct reg_cache *cache \u003d mips32-\u003ecore_cache;"},{"line_number":275,"context_line":"\tstruct reg *reg_list \u003d cache-\u003ereg_list;"}],"source_content_type":"text/x-csrc","patch_set":26,"id":"4ac4432e_c01831ab","line":272,"updated":"2024-02-02 16:31:48.000000000","message":"may be mips32_set_all_fpr_width() to make it clear it will affect all registers.","commit_id":"78a3900fef98db55207f94c6d9e6eaf3ad47245c"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"3e013c5fa92bbf88bac6bcacffd6e4afb976fe7a","unresolved":false,"context_lines":[{"line_number":269,"context_line":" *"},{"line_number":270,"context_line":" * @brief Sets the width of floating-point registers based on the specified flag."},{"line_number":271,"context_line":" */"},{"line_number":272,"context_line":"static void mips32_set_fpr_width(struct mips32_common *mips32, bool fp64)"},{"line_number":273,"context_line":"{"},{"line_number":274,"context_line":"\tstruct reg_cache *cache \u003d mips32-\u003ecore_cache;"},{"line_number":275,"context_line":"\tstruct reg *reg_list \u003d cache-\u003ereg_list;"}],"source_content_type":"text/x-csrc","patch_set":26,"id":"e7b47eb9_a64d6dd0","line":272,"in_reply_to":"4ac4432e_c01831ab","updated":"2024-02-26 08:27:19.000000000","message":"Done","commit_id":"78a3900fef98db55207f94c6d9e6eaf3ad47245c"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"15e6f812f8c8134da7c7b583043f6ea2950b696f","unresolved":true,"context_lines":[{"line_number":292,"context_line":" */"},{"line_number":293,"context_line":"static void mips32_detect_fpr_mode_change(struct mips32_common *mips32, uint32_t cp0_status)"},{"line_number":294,"context_line":"{"},{"line_number":295,"context_line":"\tif (mips32-\u003efp_imp) {"},{"line_number":296,"context_line":"\t\tbool status_fr \u003d (cp0_status \u003e\u003e MIPS32_CP0_STATUS_FR_SHIFT) \u0026 0x1;"},{"line_number":297,"context_line":"\t\tbool status_cu1 \u003d (cp0_status \u003e\u003e MIPS32_CP0_STATUS_CU1_SHIFT) \u0026 0x1;"},{"line_number":298,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":26,"id":"27d917f3_cdc3daa3","line":295,"updated":"2024-02-02 16:31:48.000000000","message":"if (!mips32-\u003efp_imp)\n  return;\n  \nthen everything else","commit_id":"78a3900fef98db55207f94c6d9e6eaf3ad47245c"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"3e013c5fa92bbf88bac6bcacffd6e4afb976fe7a","unresolved":false,"context_lines":[{"line_number":292,"context_line":" */"},{"line_number":293,"context_line":"static void mips32_detect_fpr_mode_change(struct mips32_common *mips32, uint32_t cp0_status)"},{"line_number":294,"context_line":"{"},{"line_number":295,"context_line":"\tif (mips32-\u003efp_imp) {"},{"line_number":296,"context_line":"\t\tbool status_fr \u003d (cp0_status \u003e\u003e MIPS32_CP0_STATUS_FR_SHIFT) \u0026 0x1;"},{"line_number":297,"context_line":"\t\tbool status_cu1 \u003d (cp0_status \u003e\u003e MIPS32_CP0_STATUS_CU1_SHIFT) \u0026 0x1;"},{"line_number":298,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":26,"id":"39db5476_801c52d2","line":295,"in_reply_to":"27d917f3_cdc3daa3","updated":"2024-02-26 08:27:19.000000000","message":"I did a small clean up before and somehow missed this one, sorry!","commit_id":"78a3900fef98db55207f94c6d9e6eaf3ad47245c"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"15e6f812f8c8134da7c7b583043f6ea2950b696f","unresolved":true,"context_lines":[{"line_number":294,"context_line":"{"},{"line_number":295,"context_line":"\tif (mips32-\u003efp_imp) {"},{"line_number":296,"context_line":"\t\tbool status_fr \u003d (cp0_status \u003e\u003e MIPS32_CP0_STATUS_FR_SHIFT) \u0026 0x1;"},{"line_number":297,"context_line":"\t\tbool status_cu1 \u003d (cp0_status \u003e\u003e MIPS32_CP0_STATUS_CU1_SHIFT) \u0026 0x1;"},{"line_number":298,"context_line":""},{"line_number":299,"context_line":"\t\tif (mips32-\u003efpu_in_64bit !\u003d status_fr) {"},{"line_number":300,"context_line":"\t\t\tmips32-\u003efpu_in_64bit \u003d status_fr;"}],"source_content_type":"text/x-csrc","patch_set":26,"id":"6ca5bc52_09bda5d8","line":297,"updated":"2024-02-02 16:31:48.000000000","message":"this part is somehow unclear: status_fr and status_cu1 do not reflect meaning of used bit. Only in the if statements it is clear that in first case it is \nfpu_in_64bit and fpu_enabled. It should be renamed in all places of this patch.\n\nplease also use descriptive names instead of 0x1.\nIn general, it will be good idea to port FIELD_GET/FIELD_PREP helpers from linux kernel. It will make things more readable.","commit_id":"78a3900fef98db55207f94c6d9e6eaf3ad47245c"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"3e013c5fa92bbf88bac6bcacffd6e4afb976fe7a","unresolved":false,"context_lines":[{"line_number":294,"context_line":"{"},{"line_number":295,"context_line":"\tif (mips32-\u003efp_imp) {"},{"line_number":296,"context_line":"\t\tbool status_fr \u003d (cp0_status \u003e\u003e MIPS32_CP0_STATUS_FR_SHIFT) \u0026 0x1;"},{"line_number":297,"context_line":"\t\tbool status_cu1 \u003d (cp0_status \u003e\u003e MIPS32_CP0_STATUS_CU1_SHIFT) \u0026 0x1;"},{"line_number":298,"context_line":""},{"line_number":299,"context_line":"\t\tif (mips32-\u003efpu_in_64bit !\u003d status_fr) {"},{"line_number":300,"context_line":"\t\t\tmips32-\u003efpu_in_64bit \u003d status_fr;"}],"source_content_type":"text/x-csrc","patch_set":26,"id":"9955c883_f522bb2b","line":297,"in_reply_to":"6ca5bc52_09bda5d8","updated":"2024-02-26 08:27:19.000000000","message":"I have renamed the variables and changed the definition of them according to other platforms\u0027 code.","commit_id":"78a3900fef98db55207f94c6d9e6eaf3ad47245c"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"15e6f812f8c8134da7c7b583043f6ea2950b696f","unresolved":true,"context_lines":[{"line_number":326,"context_line":"\t\tcnum \u003d num - MIPS32_REGLIST_C0_INDEX;"},{"line_number":327,"context_line":"\t\treg_value \u003d mips32-\u003ecore_regs.cp0[cnum];"},{"line_number":328,"context_line":"\t\tbuf_set_u32(mips32-\u003ecore_cache-\u003ereg_list[num].value, 0, 32, reg_value);"},{"line_number":329,"context_line":"\t\tif (cnum \u003d\u003d 0)"},{"line_number":330,"context_line":"\t\t\tmips32_detect_fpr_mode_change(mips32, reg_value);"},{"line_number":331,"context_line":"\t} else if (num \u003e\u003d MIPS32_REGLIST_FPC_INDEX) {"},{"line_number":332,"context_line":"\t\t/* FPCR */"}],"source_content_type":"text/x-csrc","patch_set":26,"id":"967d874c_84b8d9fd","line":329,"updated":"2024-02-02 16:31:48.000000000","message":"please add some comment here, describing why cnum should be 0","commit_id":"78a3900fef98db55207f94c6d9e6eaf3ad47245c"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"3e013c5fa92bbf88bac6bcacffd6e4afb976fe7a","unresolved":false,"context_lines":[{"line_number":326,"context_line":"\t\tcnum \u003d num - MIPS32_REGLIST_C0_INDEX;"},{"line_number":327,"context_line":"\t\treg_value \u003d mips32-\u003ecore_regs.cp0[cnum];"},{"line_number":328,"context_line":"\t\tbuf_set_u32(mips32-\u003ecore_cache-\u003ereg_list[num].value, 0, 32, reg_value);"},{"line_number":329,"context_line":"\t\tif (cnum \u003d\u003d 0)"},{"line_number":330,"context_line":"\t\t\tmips32_detect_fpr_mode_change(mips32, reg_value);"},{"line_number":331,"context_line":"\t} else if (num \u003e\u003d MIPS32_REGLIST_FPC_INDEX) {"},{"line_number":332,"context_line":"\t\t/* FPCR */"}],"source_content_type":"text/x-csrc","patch_set":26,"id":"c7be2a1e_9184ab07","line":329,"in_reply_to":"967d874c_84b8d9fd","updated":"2024-02-26 08:27:19.000000000","message":"The register list of MIPS has the CP0.status register as the first CP0 register, therefore why `cnum \u003d\u003d 0`, I have changed them to `MIPS32_REG_C0_STATUS_INDEX`.","commit_id":"78a3900fef98db55207f94c6d9e6eaf3ad47245c"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"15e6f812f8c8134da7c7b583043f6ea2950b696f","unresolved":true,"context_lines":[{"line_number":369,"context_line":"\t\tcnum \u003d num - MIPS32_REGLIST_C0_INDEX;"},{"line_number":370,"context_line":"\t\treg_value \u003d buf_get_u32(mips32-\u003ecore_cache-\u003ereg_list[num].value, 0, 32);"},{"line_number":371,"context_line":"\t\tmips32-\u003ecore_regs.cp0[cnum] \u003d (uint32_t)reg_value;"},{"line_number":372,"context_line":"\t\tif (cnum \u003d\u003d 0)"},{"line_number":373,"context_line":"\t\t\tmips32_detect_fpr_mode_change(mips32, reg_value);"},{"line_number":374,"context_line":"\t} else if (num \u003e\u003d MIPS32_REGLIST_FPC_INDEX) {"},{"line_number":375,"context_line":"\t\t/* FPCR */"}],"source_content_type":"text/x-csrc","patch_set":26,"id":"c1bbb420_398f10a0","line":372,"updated":"2024-02-02 16:31:48.000000000","message":"same here","commit_id":"78a3900fef98db55207f94c6d9e6eaf3ad47245c"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"3e013c5fa92bbf88bac6bcacffd6e4afb976fe7a","unresolved":false,"context_lines":[{"line_number":369,"context_line":"\t\tcnum \u003d num - MIPS32_REGLIST_C0_INDEX;"},{"line_number":370,"context_line":"\t\treg_value \u003d buf_get_u32(mips32-\u003ecore_cache-\u003ereg_list[num].value, 0, 32);"},{"line_number":371,"context_line":"\t\tmips32-\u003ecore_regs.cp0[cnum] \u003d (uint32_t)reg_value;"},{"line_number":372,"context_line":"\t\tif (cnum \u003d\u003d 0)"},{"line_number":373,"context_line":"\t\t\tmips32_detect_fpr_mode_change(mips32, reg_value);"},{"line_number":374,"context_line":"\t} else if (num \u003e\u003d MIPS32_REGLIST_FPC_INDEX) {"},{"line_number":375,"context_line":"\t\t/* FPCR */"}],"source_content_type":"text/x-csrc","patch_set":26,"id":"a13bdb99_20e3c23c","line":372,"in_reply_to":"c1bbb420_398f10a0","updated":"2024-02-26 08:27:19.000000000","message":"Done","commit_id":"78a3900fef98db55207f94c6d9e6eaf3ad47245c"}]}