)]}'
{"/PATCHSET_LEVEL":[{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"3d4ed855a9d308f081a6a54accaf542a8067ca3a","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"2fa5670f_a0769b32","updated":"2023-09-27 19:54:28.000000000","message":"Looks nice, with some nit picks fixed ti will be perfect :)","commit_id":"0948ee1f3c8f2e01b68ba93eb8d9e13f2b78b172"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"16d58dfc05a06dc21972b13038a5bc0f5b345197","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":3,"id":"a4d6724f_3ae81c74","updated":"2023-10-09 03:29:58.000000000","message":"Said problems were fixed, all further comments in other patches were changed to /* */ style, too.","commit_id":"287090380bf44cf45d415580bb95dbe37779b3b2"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"5457f122912df14a6114e91fb403e3c5ef5b28d1","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":6,"id":"1c403531_151c7ea1","updated":"2023-11-02 09:43:37.000000000","message":"I have updated the function and slightly changed how the logs organize. The patch for VZ(guest) and TLB support comes later in the chain, the vz part is updated in that patch. \n\nAlso the `cpuinfo` command aims to provide info that are as verbose as it could, so the user can get the information without searching for MIPS Coprocessor documents and manually fillout the bits. Therefore, in my opinion, the command should be kept.","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"65d9af459bdede7b7bed98cb54c147158e8f4a48","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":6,"id":"7aec908e_b4b57d8c","updated":"2023-10-30 12:53:59.000000000","message":"In general, I\u0027m still not happy with this command.\nIt is needed for troubleshooting and diagnostic.\nBut, if some one has problems with openocd, we request a log. We do  not request to execute some target specific command.\nThe worst thing is, executing cpuinfo will show in some cases completely different information, compared to the log in cpu probe.\n\nI have two variants for you:\n- rework it, so information provided by log will be in sync with cpuinfo. Cache and MMU information will not be needed until Openocd will provide MMU and Cache support for MIPS.\n- postpone this patch and we continue with rest of this patch set.","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"9fd2df60cfb9ce0d0d646017aada77fd6fcf355b","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":6,"id":"980ffa45_855315fa","updated":"2023-10-27 10:31:18.000000000","message":"Thanks for the suggestions and let me know if there are any changes should be made to the patch!","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"5457f122912df14a6114e91fb403e3c5ef5b28d1","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":6,"id":"867d0c78_b26f5905","in_reply_to":"7aec908e_b4b57d8c","updated":"2023-11-02 09:43:37.000000000","message":"I have changed the command from read when execute to use the values that were read before. Also reused some of the functions from cpu probe to sync with the log.","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"373e6b7acf8b02e1ec33db95d248313e6aad018d","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":8,"id":"b83b7755_d00e0f00","updated":"2023-11-15 05:08:59.000000000","message":"Hi! I have updated the patch chain based on the suggestions.","commit_id":"ba84e75ecb740a371dbc528d9b4de29ec4d0bce8"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"45f79a942a0ca625be95d0f5a7b0699fcf501564","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":9,"id":"0a6dabf2_7309898e","updated":"2023-11-16 07:46:36.000000000","message":"I\u0027ll block this patch for now to avoid accident merge","commit_id":"09abd9b894bc581f3744a494a9cea13ef5a02763"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"5db99c4e71d29f6738926fe33978565edd507e9b","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":9,"id":"079164ab_10f3ac4c","updated":"2023-11-15 07:46:50.000000000","message":"I\u0027m not sure what happened, jenkins reported fail with `ccache: error: Failed to create directory /run/user/1001/ccache-tmp: Read-only file system` while building... Could anyone help me trigger building again, or is there any method that I could trigger it without updating the patch?","commit_id":"09abd9b894bc581f3744a494a9cea13ef5a02763"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"75bc23039d37f05417c016fdefdf8ef7ecedde05","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":9,"id":"9ddac76c_e8d3514b","updated":"2023-11-16 06:18:32.000000000","message":"It is not too late for this patch, please add comments for all new functions too:\n/**\n * mips32_find_cpu_by_prid - Find CPU information by processor ID.\n * @prid: Processor ID of the CPU.\n *\n * This function looks up the CPU entry in the mips32_cpu_entry array based on the provided\n * processor ID. It also handles special cases like AMD/Alchemy CPUs that use Company Options\n * instead of Processor IDs. \n *\n * Return: Pointer to the corresponding cpu_entry struct, or the \u0027unknown\u0027 entry if not found.\n */\nstatic const struct cpu_entry *mips32_find_cpu_by_prid(uint32_t prid)\n{\n    // Function body\n}\n\n/**\n * mips32_cpu_probe - Detects processor type and applies necessary quirks.\n * @target: The target CPU to probe.\n *\n * This function probes the CPU, reads its PRID (Processor ID), and determines the CPU type.\n * It applies any quirks necessary for specific processor types.\n *\n * Return: ERROR_OK on success; error code on failure.\n */\nint mips32_cpu_probe(struct target *target)\n{\n    // Function body\n}\n\n/**\n * mips32_read_config_mmu - Reads MMU configuration and logs relevant information.\n * @ejtag_info: EJTAG interface information.\n *\n * Reads the MMU configuration from the CP0 register and calculates the number of TLB entries,\n * ways, and sets. Handles different MMU types like VTLB only, root RPU/Fixed, and VTLB and FTLB.\n *\n * Return: ERROR_OK on success; error code on failure.\n */\nint mips32_read_config_mmu(struct mips_ejtag *ejtag_info)\n{\n    // Function body\n}\n\n/**\n * mips32_handle_cpuinfo_command - Handles the \u0027cpuinfo\u0027 command.\n * @cmd: Command invocation context.\n *\n * Executes the \u0027cpuinfo\u0027 command which displays detailed information about the current CPU core.\n * This includes core type, vendor, instruction set, cache size, and other relevant details.\n *\n * Return: ERROR_OK on success; error code on failure.\n */\nCOMMAND_HANDLER(mips32_handle_cpuinfo_command)\n{\n    // Function body\n}","commit_id":"09abd9b894bc581f3744a494a9cea13ef5a02763"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"6c833d4e6af585a6fd4a41781a4defce7e17f167","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":9,"id":"d3e70fa5_213b6e2d","updated":"2023-11-15 17:57:09.000000000","message":"Looks good. Thx!","commit_id":"09abd9b894bc581f3744a494a9cea13ef5a02763"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"3186b07aa519a3de9e7585c2349af2ac62ed9038","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":9,"id":"19040327_cbe37284","in_reply_to":"079164ab_10f3ac4c","updated":"2023-11-15 08:44:08.000000000","message":"I reported it on #openocd irc channel","commit_id":"09abd9b894bc581f3744a494a9cea13ef5a02763"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"6f0fd88dc5081ea65cdf92fc45d6445c939a22c0","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":9,"id":"876dbd52_bf6b9599","in_reply_to":"0a6dabf2_7309898e","updated":"2023-11-17 07:33:44.000000000","message":"Thanks, I have added comments to most of added functions in following patches, too.","commit_id":"09abd9b894bc581f3744a494a9cea13ef5a02763"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"ab1ce97d86530ba1433d8d7415aaf0427a21dc73","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":9,"id":"62b6d829_3d758b8e","in_reply_to":"19040327_cbe37284","updated":"2023-11-16 04:42:07.000000000","message":"Thanks!","commit_id":"09abd9b894bc581f3744a494a9cea13ef5a02763"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"ce72a1a41cb6c9ff35aa4832140ef8f7eb64cece","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":11,"id":"c0ea7a94_abf807e2","updated":"2023-11-18 16:54:35.000000000","message":"Thanks for your patch.\nI have some minor remark below.","commit_id":"5615217b580e8f046750396832279093f802071a"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"936acdcdc85fe30867b3acc7ad68adfb5abfb5d3","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":12,"id":"04958571_728ecd4b","updated":"2023-11-24 22:32:04.000000000","message":"Thanks for the update and for the documentation.\nThere are minor comments below.","commit_id":"822f5bd479bde95e9c05e1c9df8865308802e150"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"c3a0a3070ce84c838b647584eb2e5e77ab56a4f1","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":12,"id":"c7da437c_ed8202ec","updated":"2023-11-22 09:48:08.000000000","message":"Thanks! I have fixed them according to the suggestions. Also I have added MIPS section in openocd.texi, please help me review the structure and see if anything needs to be clarified.","commit_id":"822f5bd479bde95e9c05e1c9df8865308802e150"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"4b9942f8a8cb683861cbddeea999c09625968d81","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":13,"id":"b0714d98_8b2a7f39","updated":"2023-12-08 04:15:08.000000000","message":"Hi! Just a follow up, is this patch clear for merge? Let me know if it still needs fixes!","commit_id":"6c8b21be200278dc035e417c34ca2e0225c14ff6"},{"author":{"_account_id":1001964,"name":"Erhan Kurubas","display_name":"Erhan Kurubas","email":"erhan.kurubas@espressif.com","username":"erhankur"},"change_message_id":"b8fea8e36226653580cf75b524fda5263b5c233f","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":13,"id":"4e204eba_7a3587a9","updated":"2023-12-16 10:51:38.000000000","message":"I see new 3 Sparse warnings from the previous patch. And one will be from this patch.\n\n\u003c ../src/target/mips32.c:809:6: warning: symbol \u0027mips32_read_config_dsp\u0027 was not declared. Should it be static?\n\u003c ../src/target/mips32.c:821:5: warning: symbol \u0027mips32_read_config_fpu\u0027 was not declared. Should it be static?\n\u003c ../src/target/mips32.c:862:6: warning: symbol \u0027mips32_read_config_fdc\u0027 was not declared. Should it be static?","commit_id":"6c8b21be200278dc035e417c34ca2e0225c14ff6"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"16d2811c9aaee74e81ad6c0fdbb9e1ccdfc806ce","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":14,"id":"91f9ff76_7f9c923c","updated":"2023-12-20 02:37:26.000000000","message":"Hi, thanks for pointing out the issue regarding sparse, I have rerun the sparse check on all patches in the chain and fixed all the warnings reported on mips updates. I have also rerun the scanbuild clang static analyzer, it returns no bug found, too.","commit_id":"c4ab68bc986c4c670f0d0984cfb8228305482c33"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"b5dbf9a5099e013aa3b4a7a688c5a3ee6aa8c040","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":15,"id":"c55635f8_20034e45","updated":"2023-12-29 10:09:45.000000000","message":"Walter, please notice that rebasing the whole series causes gerrit to drop all the previous +1 and +2, like in this case.\nI have already this patch queued for merge, so I will not forget it, but now we miss the +2 from Oleksij which is also an acknowledgment for his review effort.\nWhen it\u0027s possible, try to keep the same base commit for the series","commit_id":"6fb12ddbc2d4c47bd695406914fdf11de7e14958"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"50179051a777bbd108f4887425f70b6d060b2be1","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":15,"id":"c3dd4902_2d01e73c","in_reply_to":"c55635f8_20034e45","updated":"2024-01-03 02:59:30.000000000","message":"Sorry about that... I have noticed that several times, and I would like to avoid it, too. However, I had to avoid other changes on MIPS related code that could lead to incorrect merge, too, like the commit  `62b526d mips32: MIPS32_OP_SRL was using SRA opcode`, I had to manually resolve the conflict or it could be overwritten by my commits... From now on I won\u0027t rebase to latest master branch unless there are changes made on MIPS related files.","commit_id":"6fb12ddbc2d4c47bd695406914fdf11de7e14958"}],"doc/openocd.texi":[{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"936acdcdc85fe30867b3acc7ad68adfb5abfb5d3","unresolved":true,"context_lines":[{"line_number":10954,"context_line":""},{"line_number":10955,"context_line":"@uref{http://mips.com/, MIPS} is a simple, streamlined, highly scalable RISC"},{"line_number":10956,"context_line":"architecture. The architecture is evolving over time, from MIPS I~V to"},{"line_number":10957,"context_line":"MIPS release 1~6 iterations, the architecture is now able to handle vairous tasks"},{"line_number":10958,"context_line":"with different ASEs, including SIMD(MSA), DSP, VZ, MT and more."},{"line_number":10959,"context_line":"MIPS32 supports 32-bit programs while MIPS64 can support both 32-bit and 64-bit programs."},{"line_number":10960,"context_line":""}],"source_content_type":"text/x-texinfo","patch_set":12,"id":"f3839297_be6750c4","line":10957,"updated":"2023-11-24 22:32:04.000000000","message":"typo s/vairous/various/","commit_id":"822f5bd479bde95e9c05e1c9df8865308802e150"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"45f0e8802cd701f228a4ce2af3ace27cb047b7e3","unresolved":false,"context_lines":[{"line_number":10954,"context_line":""},{"line_number":10955,"context_line":"@uref{http://mips.com/, MIPS} is a simple, streamlined, highly scalable RISC"},{"line_number":10956,"context_line":"architecture. The architecture is evolving over time, from MIPS I~V to"},{"line_number":10957,"context_line":"MIPS release 1~6 iterations, the architecture is now able to handle vairous tasks"},{"line_number":10958,"context_line":"with different ASEs, including SIMD(MSA), DSP, VZ, MT and more."},{"line_number":10959,"context_line":"MIPS32 supports 32-bit programs while MIPS64 can support both 32-bit and 64-bit programs."},{"line_number":10960,"context_line":""}],"source_content_type":"text/x-texinfo","patch_set":12,"id":"e67b60a9_c16f87f1","line":10957,"in_reply_to":"f3839297_be6750c4","updated":"2023-11-28 02:06:31.000000000","message":"Done","commit_id":"822f5bd479bde95e9c05e1c9df8865308802e150"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"936acdcdc85fe30867b3acc7ad68adfb5abfb5d3","unresolved":true,"context_lines":[{"line_number":10956,"context_line":"architecture. The architecture is evolving over time, from MIPS I~V to"},{"line_number":10957,"context_line":"MIPS release 1~6 iterations, the architecture is now able to handle vairous tasks"},{"line_number":10958,"context_line":"with different ASEs, including SIMD(MSA), DSP, VZ, MT and more."},{"line_number":10959,"context_line":"MIPS32 supports 32-bit programs while MIPS64 can support both 32-bit and 64-bit programs."},{"line_number":10960,"context_line":""},{"line_number":10961,"context_line":"@subsection MIPS Terminology"},{"line_number":10962,"context_line":""}],"source_content_type":"text/x-texinfo","patch_set":12,"id":"701506c3_f4a6a7e3","line":10959,"updated":"2023-11-24 22:32:04.000000000","message":"I\u0027m not sure my suggestion is correct, but what about\nMIPS32 executes 32-bit instructions while MIPS64 can execute both 32-bit and 64-bit instructions.","commit_id":"822f5bd479bde95e9c05e1c9df8865308802e150"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"45f0e8802cd701f228a4ce2af3ace27cb047b7e3","unresolved":false,"context_lines":[{"line_number":10956,"context_line":"architecture. The architecture is evolving over time, from MIPS I~V to"},{"line_number":10957,"context_line":"MIPS release 1~6 iterations, the architecture is now able to handle vairous tasks"},{"line_number":10958,"context_line":"with different ASEs, including SIMD(MSA), DSP, VZ, MT and more."},{"line_number":10959,"context_line":"MIPS32 supports 32-bit programs while MIPS64 can support both 32-bit and 64-bit programs."},{"line_number":10960,"context_line":""},{"line_number":10961,"context_line":"@subsection MIPS Terminology"},{"line_number":10962,"context_line":""}],"source_content_type":"text/x-texinfo","patch_set":12,"id":"84c19f3e_d7568ae9","line":10959,"in_reply_to":"701506c3_f4a6a7e3","updated":"2023-11-28 02:06:31.000000000","message":"It should be programs, as of today\u0027s MIPS, MIPS64 is kinda like an ASE that extends the MIPS32 instruction set with D* instructions like DMTC0 and others for operations on 64 bit registers.","commit_id":"822f5bd479bde95e9c05e1c9df8865308802e150"}],"src/target/mips32.c":[{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"3d4ed855a9d308f081a6a54accaf542a8067ca3a","unresolved":true,"context_lines":[{"line_number":333,"context_line":"\t/* write core regs */"},{"line_number":334,"context_line":"\tint retval \u003d mips32_pracc_write_regs(mips32);"},{"line_number":335,"context_line":""},{"line_number":336,"context_line":"\treturn retval;"},{"line_number":337,"context_line":"}"},{"line_number":338,"context_line":""},{"line_number":339,"context_line":"int mips32_arch_state(struct target *target)"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"579c61ad_b2d92005","line":336,"updated":"2023-09-27 19:54:28.000000000","message":"you can do here:\nreturn mips32_pracc_write_regs(mips32);","commit_id":"0948ee1f3c8f2e01b68ba93eb8d9e13f2b78b172"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"16d58dfc05a06dc21972b13038a5bc0f5b345197","unresolved":false,"context_lines":[{"line_number":333,"context_line":"\t/* write core regs */"},{"line_number":334,"context_line":"\tint retval \u003d mips32_pracc_write_regs(mips32);"},{"line_number":335,"context_line":""},{"line_number":336,"context_line":"\treturn retval;"},{"line_number":337,"context_line":"}"},{"line_number":338,"context_line":""},{"line_number":339,"context_line":"int mips32_arch_state(struct target *target)"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"d10e00a4_f7e4799a","line":336,"in_reply_to":"579c61ad_b2d92005","updated":"2023-10-09 03:29:58.000000000","message":"Done","commit_id":"0948ee1f3c8f2e01b68ba93eb8d9e13f2b78b172"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"77725d78f4b9905e7d18a6446f0ee98037914e74","unresolved":true,"context_lines":[{"line_number":768,"context_line":""},{"line_number":769,"context_line":"\tswitch ((prid \u003e\u003e 24) \u0026 0xff) {"},{"line_number":770,"context_line":"\t\tcase 0x00:"},{"line_number":771,"context_line":"\t\t\t*cpu_name \u003d \"AMD Alchemy AU1000\";"},{"line_number":772,"context_line":"\t\t\tcpu_type \u003d MIPS32_CPU_AU1000;"},{"line_number":773,"context_line":"\t\t\tbreak;"},{"line_number":774,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":2,"id":"b56d6abd_e5714239","line":771,"updated":"2023-09-27 20:08:43.000000000","message":"Please create clonal arrays with names, and link the pointer to array entry to the struct mips32_common::*cpu_name\n\nAll of the information collected here, you can reuse in you next patch which is printing most of information collected here.\n\nYour code will look somewhat like this:\nstruct cpu_entry {\n\tconst char *name;\n\tint prid;\n\tint cpu_type;\n};\n\n/* Global CPU name array */\nstatic struct cpu_entry cpu_entries[] \u003d {\n\t{\"MIPS 24Kc\", 0x93, 1},\n\t{\"MIPS 34Kc\", 0x95, 1},\n\t{\"MIPS 74Kc\", 0x97, 1},\n\t{\"MIPS 1004Kc\", 0x99, 1},\n};\n\nstatic void find_cpu_by_prid(int prid)\n{\n\tint i;\n\tfor (i \u003d 0; i \u003c ARRAY_SIZE(cpu_entries); i++) {\n\t\tif (cpu_entries[i].prid \u003d\u003d prid) {\n\t\t\tpr_info(\"Found CPU: %s, Type: %d\\n\",\n\t\t\t\t\tcpu_entries[i].name, cpu_entries[i].cpu_type);\n\t\t\treturn;\n\t\t}\n\t}\n\tpr_info(\"CPU not found.\\n\");\n}\n\nAnd then, please reuse it in you cpu info patch","commit_id":"0948ee1f3c8f2e01b68ba93eb8d9e13f2b78b172"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"8519f54374955f69dd7d49c641ccf4a6b0923b96","unresolved":false,"context_lines":[{"line_number":768,"context_line":""},{"line_number":769,"context_line":"\tswitch ((prid \u003e\u003e 24) \u0026 0xff) {"},{"line_number":770,"context_line":"\t\tcase 0x00:"},{"line_number":771,"context_line":"\t\t\t*cpu_name \u003d \"AMD Alchemy AU1000\";"},{"line_number":772,"context_line":"\t\t\tcpu_type \u003d MIPS32_CPU_AU1000;"},{"line_number":773,"context_line":"\t\t\tbreak;"},{"line_number":774,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":2,"id":"edf93f88_9f72d2b8","line":771,"in_reply_to":"b56d6abd_e5714239","updated":"2023-10-09 03:35:00.000000000","message":"I didn\u0027t bothered to create an array for it but now it seems only logical, it should come to my mind when a long switch case for assigning values is in my code... About the array, it is created in this patch and modified in the cpu info patch, and its `static const` because it would cause unused variable while compiling.","commit_id":"0948ee1f3c8f2e01b68ba93eb8d9e13f2b78b172"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"3d4ed855a9d308f081a6a54accaf542a8067ca3a","unresolved":true,"context_lines":[{"line_number":1006,"context_line":"\t\tbreak;"},{"line_number":1007,"context_line":""},{"line_number":1008,"context_line":"\tdefault:"},{"line_number":1009,"context_line":"\t\t// None of the special cases? Then it should be generic MIPS Tech(MTI) cpu."},{"line_number":1010,"context_line":"\t\tcpu_type \u003d mips32_determine_mti_cpu(mips32-\u003eprid, \u0026cpu_name);"},{"line_number":1011,"context_line":"\t\tbreak;"},{"line_number":1012,"context_line":"\t}"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"a8d5eca4_ba083e28","line":1009,"updated":"2023-09-27 19:54:28.000000000","message":"/* */ commet style","commit_id":"0948ee1f3c8f2e01b68ba93eb8d9e13f2b78b172"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"16d58dfc05a06dc21972b13038a5bc0f5b345197","unresolved":false,"context_lines":[{"line_number":1006,"context_line":"\t\tbreak;"},{"line_number":1007,"context_line":""},{"line_number":1008,"context_line":"\tdefault:"},{"line_number":1009,"context_line":"\t\t// None of the special cases? Then it should be generic MIPS Tech(MTI) cpu."},{"line_number":1010,"context_line":"\t\tcpu_type \u003d mips32_determine_mti_cpu(mips32-\u003eprid, \u0026cpu_name);"},{"line_number":1011,"context_line":"\t\tbreak;"},{"line_number":1012,"context_line":"\t}"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"fcfa7098_28cc3092","line":1009,"in_reply_to":"a8d5eca4_ba083e28","updated":"2023-10-09 03:29:58.000000000","message":"Done","commit_id":"0948ee1f3c8f2e01b68ba93eb8d9e13f2b78b172"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"e3e56d95e73f0a594f6aa349dcd761201c9ddcb5","unresolved":true,"context_lines":[{"line_number":762,"context_line":"\treturn retval;"},{"line_number":763,"context_line":"}"},{"line_number":764,"context_line":""},{"line_number":765,"context_line":"static struct cpu_entry mips32_find_cpu_by_prid(uint32_t prid)"},{"line_number":766,"context_line":"{"},{"line_number":767,"context_line":"\t/* AMD/Alchemy CPU uses Company Options instead of Processor ID."},{"line_number":768,"context_line":"\t * Therefor an extra transform step for prid to map it to an assigned ID,"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"22c9e6a6_21eb7676","line":765,"updated":"2023-10-20 14:42:31.000000000","message":"please return pointer to the const struct. Or there is some reason to copy complete entry?","commit_id":"05434426201572c30b13522a77b68adfa37cec14"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"9fd2df60cfb9ce0d0d646017aada77fd6fcf355b","unresolved":false,"context_lines":[{"line_number":762,"context_line":"\treturn retval;"},{"line_number":763,"context_line":"}"},{"line_number":764,"context_line":""},{"line_number":765,"context_line":"static struct cpu_entry mips32_find_cpu_by_prid(uint32_t prid)"},{"line_number":766,"context_line":"{"},{"line_number":767,"context_line":"\t/* AMD/Alchemy CPU uses Company Options instead of Processor ID."},{"line_number":768,"context_line":"\t * Therefor an extra transform step for prid to map it to an assigned ID,"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"364d1391_9698f161","line":765,"in_reply_to":"22c9e6a6_21eb7676","updated":"2023-10-27 10:31:18.000000000","message":"Thanks for pointing out the performance problem! Fixed.","commit_id":"05434426201572c30b13522a77b68adfa37cec14"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"e3e56d95e73f0a594f6aa349dcd761201c9ddcb5","unresolved":true,"context_lines":[{"line_number":781,"context_line":"\t\tif ((entry.prid \u0026 MIPS32_CORE_MASK) \u003c\u003d prid \u0026\u0026 prid \u003c\u003d entry.prid)"},{"line_number":782,"context_line":"\t\t\treturn entry;"},{"line_number":783,"context_line":"\t}"},{"line_number":784,"context_line":""},{"line_number":785,"context_line":"\treturn mips32_cpu_entry[MIPS32_NUM_CPU_ENTRIES - 1];"},{"line_number":786,"context_line":"}"},{"line_number":787,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":4,"id":"7596dffa_f17fc4e0","line":784,"updated":"2023-10-20 14:42:31.000000000","message":"Please add here comment, that it points to an unknown entry.","commit_id":"05434426201572c30b13522a77b68adfa37cec14"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"9fd2df60cfb9ce0d0d646017aada77fd6fcf355b","unresolved":false,"context_lines":[{"line_number":781,"context_line":"\t\tif ((entry.prid \u0026 MIPS32_CORE_MASK) \u003c\u003d prid \u0026\u0026 prid \u003c\u003d entry.prid)"},{"line_number":782,"context_line":"\t\t\treturn entry;"},{"line_number":783,"context_line":"\t}"},{"line_number":784,"context_line":""},{"line_number":785,"context_line":"\treturn mips32_cpu_entry[MIPS32_NUM_CPU_ENTRIES - 1];"},{"line_number":786,"context_line":"}"},{"line_number":787,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":4,"id":"17e472ce_7f21daf3","line":784,"in_reply_to":"7596dffa_f17fc4e0","updated":"2023-10-27 10:31:18.000000000","message":"Done","commit_id":"05434426201572c30b13522a77b68adfa37cec14"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"65d9af459bdede7b7bed98cb54c147158e8f4a48","unresolved":true,"context_lines":[{"line_number":798,"context_line":"\treturn (struct cpu_entry *)\u0026mips32_cpu_entry[MIPS32_NUM_CPU_ENTRIES - 1];"},{"line_number":799,"context_line":"}"},{"line_number":800,"context_line":""},{"line_number":801,"context_line":"static struct cpu_entry *mips32_find_cpu_by_cpu_type(uint32_t cpu_type)"},{"line_number":802,"context_line":"{"},{"line_number":803,"context_line":"\tint i;"},{"line_number":804,"context_line":"\tfor (i \u003d 0; i \u003c MIPS32_NUM_CPU_ENTRIES; i++) {"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"80e43259_e2d2f272","line":801,"updated":"2023-10-30 12:53:59.000000000","message":"This function can be dropped","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"5457f122912df14a6114e91fb403e3c5ef5b28d1","unresolved":false,"context_lines":[{"line_number":798,"context_line":"\treturn (struct cpu_entry *)\u0026mips32_cpu_entry[MIPS32_NUM_CPU_ENTRIES - 1];"},{"line_number":799,"context_line":"}"},{"line_number":800,"context_line":""},{"line_number":801,"context_line":"static struct cpu_entry *mips32_find_cpu_by_cpu_type(uint32_t cpu_type)"},{"line_number":802,"context_line":"{"},{"line_number":803,"context_line":"\tint i;"},{"line_number":804,"context_line":"\tfor (i \u003d 0; i \u003c MIPS32_NUM_CPU_ENTRIES; i++) {"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"496153d9_872a41aa","line":801,"in_reply_to":"80e43259_e2d2f272","updated":"2023-11-02 09:43:37.000000000","message":"Done","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"65d9af459bdede7b7bed98cb54c147158e8f4a48","unresolved":true,"context_lines":[{"line_number":856,"context_line":"\t\tbreak;"},{"line_number":857,"context_line":"\t}"},{"line_number":858,"context_line":""},{"line_number":859,"context_line":"\tmips32-\u003ecpu_type \u003d entry-\u003ecpu_type;"},{"line_number":860,"context_line":"\tLOG_USER(\"CPU type: 0x%08x, CP0 mask: 0x%08x\", entry-\u003ecpu_type, mips32-\u003ecp0_mask);"},{"line_number":861,"context_line":""},{"line_number":862,"context_line":"\treturn ERROR_OK;"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"d7754ae0_c0363e72","line":859,"updated":"2023-10-30 12:53:59.000000000","message":"Huh, I was sure I posted comment related to this variable. Looks like I didn\u0027t.\nAnyway: please, store \"entry\" pointer in the mips32 struct instead of cpu_type.\nmips32-\u003ecpu_entry \u003d entry;","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"5457f122912df14a6114e91fb403e3c5ef5b28d1","unresolved":false,"context_lines":[{"line_number":856,"context_line":"\t\tbreak;"},{"line_number":857,"context_line":"\t}"},{"line_number":858,"context_line":""},{"line_number":859,"context_line":"\tmips32-\u003ecpu_type \u003d entry-\u003ecpu_type;"},{"line_number":860,"context_line":"\tLOG_USER(\"CPU type: 0x%08x, CP0 mask: 0x%08x\", entry-\u003ecpu_type, mips32-\u003ecp0_mask);"},{"line_number":861,"context_line":""},{"line_number":862,"context_line":"\treturn ERROR_OK;"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"6b1b1c69_f21cdbcc","line":859,"in_reply_to":"d7754ae0_c0363e72","updated":"2023-11-02 09:43:37.000000000","message":"Done","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"65d9af459bdede7b7bed98cb54c147158e8f4a48","unresolved":true,"context_lines":[{"line_number":1234,"context_line":"\tstruct mips32_common *mips32 \u003d target_to_mips32(target);"},{"line_number":1235,"context_line":"\tstruct mips_ejtag *ejtag_info \u003d \u0026mips32-\u003eejtag_info;"},{"line_number":1236,"context_line":""},{"line_number":1237,"context_line":"\tstruct mips32_cpu_features info \u003d {};"},{"line_number":1238,"context_line":""},{"line_number":1239,"context_line":"\tchar text[40] \u003d {0};"},{"line_number":1240,"context_line":"\tuint32_t ways, sets, bpl;"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"e9210061_2ea2fb97","line":1237,"updated":"2023-10-30 12:53:59.000000000","message":"please drop this struct. It is not used anywhere outside of this function and it hides unused variables. Remove info struct in this function","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"5457f122912df14a6114e91fb403e3c5ef5b28d1","unresolved":false,"context_lines":[{"line_number":1234,"context_line":"\tstruct mips32_common *mips32 \u003d target_to_mips32(target);"},{"line_number":1235,"context_line":"\tstruct mips_ejtag *ejtag_info \u003d \u0026mips32-\u003eejtag_info;"},{"line_number":1236,"context_line":""},{"line_number":1237,"context_line":"\tstruct mips32_cpu_features info \u003d {};"},{"line_number":1238,"context_line":""},{"line_number":1239,"context_line":"\tchar text[40] \u003d {0};"},{"line_number":1240,"context_line":"\tuint32_t ways, sets, bpl;"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"4825ad84_078d85db","line":1237,"in_reply_to":"e9210061_2ea2fb97","updated":"2023-11-02 09:43:37.000000000","message":"Done","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"65d9af459bdede7b7bed98cb54c147158e8f4a48","unresolved":true,"context_lines":[{"line_number":1240,"context_line":"\tuint32_t ways, sets, bpl;"},{"line_number":1241,"context_line":""},{"line_number":1242,"context_line":"\tuint32_t prid \u003d mips32-\u003eprid; /* cp0 PRID - 15, 0 */"},{"line_number":1243,"context_line":"\tuint32_t config; /*\tcp0 config - 16, 0 */"},{"line_number":1244,"context_line":"\tuint32_t config1; /*\tcp0 config - 16, 1 */"},{"line_number":1245,"context_line":"\tuint32_t config2; /*\tcp0 config - 16, 2 */"},{"line_number":1246,"context_line":"\tuint32_t config3; /*\tcp0 config - 16, 3 */"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"d579ebbe_bd875859","line":1243,"updated":"2023-10-30 12:53:59.000000000","message":"config0 for better searching","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"5457f122912df14a6114e91fb403e3c5ef5b28d1","unresolved":false,"context_lines":[{"line_number":1240,"context_line":"\tuint32_t ways, sets, bpl;"},{"line_number":1241,"context_line":""},{"line_number":1242,"context_line":"\tuint32_t prid \u003d mips32-\u003eprid; /* cp0 PRID - 15, 0 */"},{"line_number":1243,"context_line":"\tuint32_t config; /*\tcp0 config - 16, 0 */"},{"line_number":1244,"context_line":"\tuint32_t config1; /*\tcp0 config - 16, 1 */"},{"line_number":1245,"context_line":"\tuint32_t config2; /*\tcp0 config - 16, 2 */"},{"line_number":1246,"context_line":"\tuint32_t config3; /*\tcp0 config - 16, 3 */"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"d4f7485d_738b7bd2","line":1243,"in_reply_to":"d579ebbe_bd875859","updated":"2023-11-02 09:43:37.000000000","message":"Done","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"65d9af459bdede7b7bed98cb54c147158e8f4a48","unresolved":true,"context_lines":[{"line_number":1305,"context_line":"\tinfo.tlb_entries \u003d 0;"},{"line_number":1306,"context_line":""},{"line_number":1307,"context_line":"\t/* MMU types */"},{"line_number":1308,"context_line":"\tif ((info.mmu_type \u003d\u003d 1 || info.mmu_type \u003d\u003d 4) || (info.mmu_type \u003d\u003d 3 \u0026\u0026 info.vzase)) {"},{"line_number":1309,"context_line":"\t\tinfo.tlb_entries \u003d (((config1 \u003e\u003e 25) \u0026 0x3f) + 1);"},{"line_number":1310,"context_line":"\t\tinfo.mmu_type \u003d (config \u003e\u003e 7) \u0026 7;"},{"line_number":1311,"context_line":"\t\tif (info.mmu_type \u003d\u003d 1)"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"b393848e_9d010d0e","line":1308,"updated":"2023-10-30 12:53:59.000000000","message":"move this part of code to a separate function","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"5457f122912df14a6114e91fb403e3c5ef5b28d1","unresolved":false,"context_lines":[{"line_number":1305,"context_line":"\tinfo.tlb_entries \u003d 0;"},{"line_number":1306,"context_line":""},{"line_number":1307,"context_line":"\t/* MMU types */"},{"line_number":1308,"context_line":"\tif ((info.mmu_type \u003d\u003d 1 || info.mmu_type \u003d\u003d 4) || (info.mmu_type \u003d\u003d 3 \u0026\u0026 info.vzase)) {"},{"line_number":1309,"context_line":"\t\tinfo.tlb_entries \u003d (((config1 \u003e\u003e 25) \u0026 0x3f) + 1);"},{"line_number":1310,"context_line":"\t\tinfo.mmu_type \u003d (config \u003e\u003e 7) \u0026 7;"},{"line_number":1311,"context_line":"\t\tif (info.mmu_type \u003d\u003d 1)"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"b4a0de48_b6fe51bd","line":1308,"in_reply_to":"b393848e_9d010d0e","updated":"2023-11-02 09:43:37.000000000","message":"Done","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"65d9af459bdede7b7bed98cb54c147158e8f4a48","unresolved":true,"context_lines":[{"line_number":1342,"context_line":""},{"line_number":1343,"context_line":"\t/* Determine Core info */"},{"line_number":1344,"context_line":"\tinfo.cpu_type \u003d mips32-\u003ecpu_type;"},{"line_number":1345,"context_line":"\tstruct cpu_entry *entry \u003d mips32_find_cpu_by_cpu_type(info.cpu_type);"},{"line_number":1346,"context_line":"\tinfo.vendor \u003d entry-\u003evendor;"},{"line_number":1347,"context_line":"\tinfo.isa \u003d entry-\u003eisa;"},{"line_number":1348,"context_line":"\tstrcpy(text, entry-\u003ecpu_name);"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"8608b0b4_be7e38e0","line":1345,"updated":"2023-10-30 12:53:59.000000000","message":"If mips32 has store entry pointer, no need to search it again.","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"5457f122912df14a6114e91fb403e3c5ef5b28d1","unresolved":false,"context_lines":[{"line_number":1342,"context_line":""},{"line_number":1343,"context_line":"\t/* Determine Core info */"},{"line_number":1344,"context_line":"\tinfo.cpu_type \u003d mips32-\u003ecpu_type;"},{"line_number":1345,"context_line":"\tstruct cpu_entry *entry \u003d mips32_find_cpu_by_cpu_type(info.cpu_type);"},{"line_number":1346,"context_line":"\tinfo.vendor \u003d entry-\u003evendor;"},{"line_number":1347,"context_line":"\tinfo.isa \u003d entry-\u003eisa;"},{"line_number":1348,"context_line":"\tstrcpy(text, entry-\u003ecpu_name);"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"28ce92a1_158f3939","line":1345,"in_reply_to":"8608b0b4_be7e38e0","updated":"2023-11-02 09:43:37.000000000","message":"Done","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"65d9af459bdede7b7bed98cb54c147158e8f4a48","unresolved":true,"context_lines":[{"line_number":1351,"context_line":"\tways \u003d way_table[(config1 \u003e\u003e MIPS32_CFG1_IASHIFT) \u0026 7];"},{"line_number":1352,"context_line":"\tsets \u003d set_table_isds[(config1 \u003e\u003e MIPS32_CFG1_ISSHIFT) \u0026 7];"},{"line_number":1353,"context_line":"\tbpl  \u003d bpl_table[(config1 \u003e\u003e MIPS32_CFG1_ILSHIFT) \u0026 7];"},{"line_number":1354,"context_line":"\tinfo.inst_cache_size \u003d ways * sets * bpl;"},{"line_number":1355,"context_line":""},{"line_number":1356,"context_line":"\t/* Determine data cache size */"},{"line_number":1357,"context_line":"\tways \u003d way_table[(config1 \u003e\u003e  MIPS32_CFG1_DASHIFT) \u0026 7];"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"8afca5c3_0e5bda21","line":1354,"updated":"2023-10-30 12:53:59.000000000","message":"Layout of cache is as important as size. It will be better to print number of ways, sets and bpl together with the size.","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"5457f122912df14a6114e91fb403e3c5ef5b28d1","unresolved":false,"context_lines":[{"line_number":1351,"context_line":"\tways \u003d way_table[(config1 \u003e\u003e MIPS32_CFG1_IASHIFT) \u0026 7];"},{"line_number":1352,"context_line":"\tsets \u003d set_table_isds[(config1 \u003e\u003e MIPS32_CFG1_ISSHIFT) \u0026 7];"},{"line_number":1353,"context_line":"\tbpl  \u003d bpl_table[(config1 \u003e\u003e MIPS32_CFG1_ILSHIFT) \u0026 7];"},{"line_number":1354,"context_line":"\tinfo.inst_cache_size \u003d ways * sets * bpl;"},{"line_number":1355,"context_line":""},{"line_number":1356,"context_line":"\t/* Determine data cache size */"},{"line_number":1357,"context_line":"\tways \u003d way_table[(config1 \u003e\u003e  MIPS32_CFG1_DASHIFT) \u0026 7];"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"c85c7417_e58c49be","line":1354,"in_reply_to":"8afca5c3_0e5bda21","updated":"2023-11-02 09:43:37.000000000","message":"Done","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"65d9af459bdede7b7bed98cb54c147158e8f4a48","unresolved":true,"context_lines":[{"line_number":1357,"context_line":"\tways \u003d way_table[(config1 \u003e\u003e  MIPS32_CFG1_DASHIFT) \u0026 7];"},{"line_number":1358,"context_line":"\tsets \u003d set_table_isds[(config1 \u003e\u003e MIPS32_CFG1_DSSHIFT) \u0026 7];"},{"line_number":1359,"context_line":"\tbpl  \u003d bpl_table[(config1 \u003e\u003e MIPS32_CFG1_DLSHIFT) \u0026 7];"},{"line_number":1360,"context_line":"\tinfo.data_cache_size \u003d ways * sets * bpl;"},{"line_number":1361,"context_line":""},{"line_number":1362,"context_line":"\t/* Display Core Type info */"},{"line_number":1363,"context_line":"\tLOG_USER(\"cpu_core: MIPS_%s\", \u0026text[0]);"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"609a33a3_c3eec05e","line":1360,"updated":"2023-10-30 12:53:59.000000000","message":"Same here","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"5457f122912df14a6114e91fb403e3c5ef5b28d1","unresolved":false,"context_lines":[{"line_number":1357,"context_line":"\tways \u003d way_table[(config1 \u003e\u003e  MIPS32_CFG1_DASHIFT) \u0026 7];"},{"line_number":1358,"context_line":"\tsets \u003d set_table_isds[(config1 \u003e\u003e MIPS32_CFG1_DSSHIFT) \u0026 7];"},{"line_number":1359,"context_line":"\tbpl  \u003d bpl_table[(config1 \u003e\u003e MIPS32_CFG1_DLSHIFT) \u0026 7];"},{"line_number":1360,"context_line":"\tinfo.data_cache_size \u003d ways * sets * bpl;"},{"line_number":1361,"context_line":""},{"line_number":1362,"context_line":"\t/* Display Core Type info */"},{"line_number":1363,"context_line":"\tLOG_USER(\"cpu_core: MIPS_%s\", \u0026text[0]);"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"f10b8c66_9fe43747","line":1360,"in_reply_to":"609a33a3_c3eec05e","updated":"2023-11-02 09:43:37.000000000","message":"Done","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"65d9af459bdede7b7bed98cb54c147158e8f4a48","unresolved":true,"context_lines":[{"line_number":1365,"context_line":"\tLOG_USER(\"cpu_type: %d\", info.cpu_type);"},{"line_number":1366,"context_line":""},{"line_number":1367,"context_line":"\t/* Display Core Vendor ID */"},{"line_number":1368,"context_line":"\tswitch (info.vendor) {"},{"line_number":1369,"context_line":"\t\tcase MIPS32_CPU_VENDOR_MTI:"},{"line_number":1370,"context_line":"\t\t\tstrcpy(text, \"MIPS\");"},{"line_number":1371,"context_line":"\t\tbreak;"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"08e72d97_c13334d3","line":1368,"updated":"2023-10-30 12:53:59.000000000","message":"I see, you are using this switch for the case if entry is unknown, otherwise entry will already provide vendor information.\nIn case case, extract vendor information only if:\nif(entry \u003d\u003d \u0026mips32_cpu_entry[MIPS32_NUM_CPU_ENTRIES - 1])\n\nOtherwise you can get more information by using entry","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"5457f122912df14a6114e91fb403e3c5ef5b28d1","unresolved":false,"context_lines":[{"line_number":1365,"context_line":"\tLOG_USER(\"cpu_type: %d\", info.cpu_type);"},{"line_number":1366,"context_line":""},{"line_number":1367,"context_line":"\t/* Display Core Vendor ID */"},{"line_number":1368,"context_line":"\tswitch (info.vendor) {"},{"line_number":1369,"context_line":"\t\tcase MIPS32_CPU_VENDOR_MTI:"},{"line_number":1370,"context_line":"\t\t\tstrcpy(text, \"MIPS\");"},{"line_number":1371,"context_line":"\t\tbreak;"}],"source_content_type":"text/x-csrc","patch_set":6,"id":"de7806e0_713f564f","line":1368,"in_reply_to":"08e72d97_c13334d3","updated":"2023-11-02 09:43:37.000000000","message":"Done","commit_id":"b8bbeeb7106b0664a1ff5eca6afd39dcfbf0ec4f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"c0a2499ab2012e4a2955a14c1cd11764b3d99964","unresolved":true,"context_lines":[{"line_number":162,"context_line":""},{"line_number":163,"context_line":"/* WAYS MAPPING */"},{"line_number":164,"context_line":"static const int way_table[] \u003d {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};\t   /* field-\u003eways mapping */"},{"line_number":165,"context_line":"static const int set_table_isds[] \u003d {64, 128, 256, 512, 1024, 2048, 4096, 32,\t\t  /* field-\u003esets mapping */"},{"line_number":166,"context_line":"\t\t\t\t   16 * 1024, 32 * 1024, 64 * 1024, 128 * 1024, 256 * 1024, 512 * 1024, 1024 * 1024, 2048 * 1024};"},{"line_number":167,"context_line":""},{"line_number":168,"context_line":"/* BPL */"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"f05a9b90_9b42fd6a","line":165,"updated":"2023-11-07 09:53:51.000000000","message":"the 32 at the end of this line looks suspicious. Is it correct?","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"373e6b7acf8b02e1ec33db95d248313e6aad018d","unresolved":false,"context_lines":[{"line_number":162,"context_line":""},{"line_number":163,"context_line":"/* WAYS MAPPING */"},{"line_number":164,"context_line":"static const int way_table[] \u003d {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};\t   /* field-\u003eways mapping */"},{"line_number":165,"context_line":"static const int set_table_isds[] \u003d {64, 128, 256, 512, 1024, 2048, 4096, 32,\t\t  /* field-\u003esets mapping */"},{"line_number":166,"context_line":"\t\t\t\t   16 * 1024, 32 * 1024, 64 * 1024, 128 * 1024, 256 * 1024, 512 * 1024, 1024 * 1024, 2048 * 1024};"},{"line_number":167,"context_line":""},{"line_number":168,"context_line":"/* BPL */"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"444f542e_3b7f4da3","line":165,"in_reply_to":"f05a9b90_9b42fd6a","updated":"2023-11-15 05:08:59.000000000","message":"Yes, I can confirm it is correct, fwiw you can find full definitions of I/D$ Set tables (on MIPSr7/nanoMIPS) here on page 224 https://s3-eu-west-1.amazonaws.com/downloads-mips/I7200/I7200+product+launch/MIPS_nanoMIPS32_PRA_06_09_MD01251.pdf","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"c0a2499ab2012e4a2955a14c1cd11764b3d99964","unresolved":true,"context_lines":[{"line_number":170,"context_line":"\t\t\t\t\t\t\t\t4 * 1024, 8 * 1024, 16 * 1024, 32 * 1024, 64 * 1024}; /* field-\u003ebytes per line */"},{"line_number":171,"context_line":""},{"line_number":172,"context_line":"static uint32_t  ftlb_ways[16] \u003d {2, 3, 4, 5,\t6, 7, 8, 0,\t\t\t0, 0, 0, 0,\t\t0, 0, 0, 0};"},{"line_number":173,"context_line":"static uint32_t  ftlb_sets[16] \u003d {1, 2, 4, 8,\t16, 32, 64, 128,\t256, 0, 0, 0,\t0, 0, 0, 0};"},{"line_number":174,"context_line":""},{"line_number":175,"context_line":"static int mips32_get_core_reg(struct reg *reg)"},{"line_number":176,"context_line":"{"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"9c57e899_22541f53","line":173,"updated":"2023-11-07 09:53:51.000000000","message":"At the end I suggested to replace this arrays with the code to dynamically calculate it. If you will prefer to stay with arrays, then please continue with following comments:\n\nAlignment: The comment alignment seems off, especially in the arrays set_table_isds, bpl_table, and ftlb_ways. Proper alignment is essential for readability, which is important in the Linux kernel coding style.\n\nComments: While it’s stated not to comment on the good things, it’s still worth noting that having comments next to the way_table and bpl_table arrays to explain what they are mapping would be beneficial for someone who\u0027s new to this code. For set_table_isds, the comment is present but it should be aligned with the code for readability.\n\nSize of Arrays: If the sizes of the arrays are tied to some hardware or architectural specifications, it would be helpful to have an assertion or a compile-time check to ensure that the array size does not exceed the expected limi\n\nInitialization Consistency: The ftlb_ways and ftlb_sets arrays have trailing zeros that may not be necessary if the intent is to initialize only a portion of the array. If the full size needs to be specified, then it would be better to initialize all arrays consistently (either all explicit or all implicit zeros).\n\nArray Type Consistency: There\u0027s inconsistency in the type of arrays. way_table, set_table_isds, and bpl_table are const int while ftlb_ways and ftlb_sets are uint32_t. If these arrays are related and operate in tandem, then their types should be consistent unless there is a specific reason for this discrepancy.\n\nStatic Initialization: The ftlb_ways and ftlb_sets arrays are not declared as const, which suggests that their values might change at runtime. If these values are not meant to be modified, they should be declared as const to protect against accidental modification and to allow the compiler to place them in read-only memory.\n\nUsage Documentation: There is no explanation of how these tables are used in the system and where this numbers are taken from. Including documentation on the usage could help developers understand the purpose of these mappings and validate their correctness.","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"373e6b7acf8b02e1ec33db95d248313e6aad018d","unresolved":false,"context_lines":[{"line_number":170,"context_line":"\t\t\t\t\t\t\t\t4 * 1024, 8 * 1024, 16 * 1024, 32 * 1024, 64 * 1024}; /* field-\u003ebytes per line */"},{"line_number":171,"context_line":""},{"line_number":172,"context_line":"static uint32_t  ftlb_ways[16] \u003d {2, 3, 4, 5,\t6, 7, 8, 0,\t\t\t0, 0, 0, 0,\t\t0, 0, 0, 0};"},{"line_number":173,"context_line":"static uint32_t  ftlb_sets[16] \u003d {1, 2, 4, 8,\t16, 32, 64, 128,\t256, 0, 0, 0,\t0, 0, 0, 0};"},{"line_number":174,"context_line":""},{"line_number":175,"context_line":"static int mips32_get_core_reg(struct reg *reg)"},{"line_number":176,"context_line":"{"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"74b8f50b_4080bee6","line":173,"in_reply_to":"9c57e899_22541f53","updated":"2023-11-15 05:08:59.000000000","message":"The ftlb arrays were converted into a function for calculating the cache layout. \n0s in ftlb sets are reserved values.\nThe MD number for the documents are attached in comments now, and the documents are pretty much all available on any popular search engines when `MDxxxxx` is searched.","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"c0a2499ab2012e4a2955a14c1cd11764b3d99964","unresolved":true,"context_lines":[{"line_number":778,"context_line":"{"},{"line_number":779,"context_line":"\t/* AMD/Alchemy CPU uses Company Options instead of Processor ID."},{"line_number":780,"context_line":"\t * Therefor an extra transform step for prid to map it to an assigned ID,"},{"line_number":781,"context_line":"\t * */"},{"line_number":782,"context_line":"\tif ((prid \u0026 PRID_COMP_MASK) \u003d\u003d PRID_COMP_ALCHEMY) {"},{"line_number":783,"context_line":"\t\t/* Clears Processor ID field, then put Company Option field to its place */"},{"line_number":784,"context_line":"\t\tprid \u003d (prid \u0026 0xFFFF00FF) | ((prid \u0026 0xFF000000) \u003e\u003e 16);"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"1b6f803d_b192f57b","line":781,"updated":"2023-11-07 09:53:51.000000000","message":"s/Therefor/Therefore\n\nComment type:\n/*\n *\n */","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"373e6b7acf8b02e1ec33db95d248313e6aad018d","unresolved":false,"context_lines":[{"line_number":778,"context_line":"{"},{"line_number":779,"context_line":"\t/* AMD/Alchemy CPU uses Company Options instead of Processor ID."},{"line_number":780,"context_line":"\t * Therefor an extra transform step for prid to map it to an assigned ID,"},{"line_number":781,"context_line":"\t * */"},{"line_number":782,"context_line":"\tif ((prid \u0026 PRID_COMP_MASK) \u003d\u003d PRID_COMP_ALCHEMY) {"},{"line_number":783,"context_line":"\t\t/* Clears Processor ID field, then put Company Option field to its place */"},{"line_number":784,"context_line":"\t\tprid \u003d (prid \u0026 0xFFFF00FF) | ((prid \u0026 0xFF000000) \u003e\u003e 16);"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"f25f6d24_574074f8","line":781,"in_reply_to":"1b6f803d_b192f57b","updated":"2023-11-15 05:08:59.000000000","message":"Done","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"c0a2499ab2012e4a2955a14c1cd11764b3d99964","unresolved":true,"context_lines":[{"line_number":789,"context_line":""},{"line_number":790,"context_line":"\tint i;"},{"line_number":791,"context_line":"\tfor (i \u003d 0; i \u003c MIPS32_NUM_CPU_ENTRIES; i++) {"},{"line_number":792,"context_line":"\t\tstruct cpu_entry *entry \u003d (struct cpu_entry *)\u0026mips32_cpu_entry[i];"},{"line_number":793,"context_line":"\t\tif ((entry-\u003eprid \u0026 MIPS32_CORE_MASK) \u003c\u003d prid \u0026\u0026 prid \u003c\u003d entry-\u003eprid)"},{"line_number":794,"context_line":"\t\t\treturn entry;"},{"line_number":795,"context_line":"\t}"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"675ffd31_34370299","line":792,"updated":"2023-11-07 09:53:51.000000000","message":"The pointer cast (struct cpu_entry *)\u0026mips32_cpu_entry[i] is unnecessary if mips32_cpu_entry is an array of struct cpu_entry. You can directly use \u0026mips32_cpu_entry[i].","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"373e6b7acf8b02e1ec33db95d248313e6aad018d","unresolved":false,"context_lines":[{"line_number":789,"context_line":""},{"line_number":790,"context_line":"\tint i;"},{"line_number":791,"context_line":"\tfor (i \u003d 0; i \u003c MIPS32_NUM_CPU_ENTRIES; i++) {"},{"line_number":792,"context_line":"\t\tstruct cpu_entry *entry \u003d (struct cpu_entry *)\u0026mips32_cpu_entry[i];"},{"line_number":793,"context_line":"\t\tif ((entry-\u003eprid \u0026 MIPS32_CORE_MASK) \u003c\u003d prid \u0026\u0026 prid \u003c\u003d entry-\u003eprid)"},{"line_number":794,"context_line":"\t\t\treturn entry;"},{"line_number":795,"context_line":"\t}"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"be2fddd7_45483308","line":792,"in_reply_to":"675ffd31_34370299","updated":"2023-11-15 05:08:59.000000000","message":"I am aware of this, it is written this way is because of when I remove the cast it raises `initialization discards ‘const’`.","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"ceb43d810da19c9c00ae06891d5b742af3b3fa81","unresolved":false,"context_lines":[{"line_number":789,"context_line":""},{"line_number":790,"context_line":"\tint i;"},{"line_number":791,"context_line":"\tfor (i \u003d 0; i \u003c MIPS32_NUM_CPU_ENTRIES; i++) {"},{"line_number":792,"context_line":"\t\tstruct cpu_entry *entry \u003d (struct cpu_entry *)\u0026mips32_cpu_entry[i];"},{"line_number":793,"context_line":"\t\tif ((entry-\u003eprid \u0026 MIPS32_CORE_MASK) \u003c\u003d prid \u0026\u0026 prid \u003c\u003d entry-\u003eprid)"},{"line_number":794,"context_line":"\t\t\treturn entry;"},{"line_number":795,"context_line":"\t}"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"e542d403_04664f27","line":792,"in_reply_to":"be2fddd7_45483308","updated":"2023-11-15 05:48:50.000000000","message":"Then please make sure that this function returns a \"const struct cpu_entry mips32_cpu_entry\"- Compiler warns you for very good reason. Since you removed const flag, compiler will have no chance to warn you if your code will write to this memory location. Using casts is dangerous!","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"c41990c2ac722c97521149c98010541e6477b4b9","unresolved":false,"context_lines":[{"line_number":789,"context_line":""},{"line_number":790,"context_line":"\tint i;"},{"line_number":791,"context_line":"\tfor (i \u003d 0; i \u003c MIPS32_NUM_CPU_ENTRIES; i++) {"},{"line_number":792,"context_line":"\t\tstruct cpu_entry *entry \u003d (struct cpu_entry *)\u0026mips32_cpu_entry[i];"},{"line_number":793,"context_line":"\t\tif ((entry-\u003eprid \u0026 MIPS32_CORE_MASK) \u003c\u003d prid \u0026\u0026 prid \u003c\u003d entry-\u003eprid)"},{"line_number":794,"context_line":"\t\t\treturn entry;"},{"line_number":795,"context_line":"\t}"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"f50d83a3_78695d69","line":792,"in_reply_to":"e542d403_04664f27","updated":"2023-11-15 06:17:34.000000000","message":"Thanks for clarifying! In that case I have removed the casts and added const to every usage of the `cpu_entry` struct.","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"c0a2499ab2012e4a2955a14c1cd11764b3d99964","unresolved":true,"context_lines":[{"line_number":795,"context_line":"\t}"},{"line_number":796,"context_line":""},{"line_number":797,"context_line":"\t/* If nothing matched, then return unknown entry */"},{"line_number":798,"context_line":"\treturn (struct cpu_entry *)\u0026mips32_cpu_entry[MIPS32_NUM_CPU_ENTRIES - 1];"},{"line_number":799,"context_line":"}"},{"line_number":800,"context_line":""},{"line_number":801,"context_line":"/*"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"dfece810_ec87c76b","line":798,"updated":"2023-11-07 09:53:51.000000000","message":"Same here, no pointer casting is needed.","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"373e6b7acf8b02e1ec33db95d248313e6aad018d","unresolved":false,"context_lines":[{"line_number":795,"context_line":"\t}"},{"line_number":796,"context_line":""},{"line_number":797,"context_line":"\t/* If nothing matched, then return unknown entry */"},{"line_number":798,"context_line":"\treturn (struct cpu_entry *)\u0026mips32_cpu_entry[MIPS32_NUM_CPU_ENTRIES - 1];"},{"line_number":799,"context_line":"}"},{"line_number":800,"context_line":""},{"line_number":801,"context_line":"/*"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"651b8784_b3f1378c","line":798,"in_reply_to":"dfece810_ec87c76b","updated":"2023-11-15 05:08:59.000000000","message":"Same as above, might be my compiler, but this should not be ignored.","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"c0a2499ab2012e4a2955a14c1cd11764b3d99964","unresolved":true,"context_lines":[{"line_number":1152,"context_line":"\tuint32_t config4, tlb_entries \u003d 0, ways \u003d 0, sets \u003d 0;"},{"line_number":1153,"context_line":"\tuint32_t config0 \u003d ejtag_info-\u003econfig[0];"},{"line_number":1154,"context_line":"\tuint32_t config1 \u003d ejtag_info-\u003econfig[1];"},{"line_number":1155,"context_line":"\tuint32_t config3 \u003d ejtag_info-\u003econfig[3];"},{"line_number":1156,"context_line":"\tuint32_t mmu_type \u003d (config0 \u003e\u003e 7) \u0026 7;"},{"line_number":1157,"context_line":"\tuint32_t vz_present \u003d (config3 \u0026 BIT(23));"},{"line_number":1158,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":7,"id":"c3cc7423_07c587ae","line":1155,"updated":"2023-11-07 09:53:51.000000000","message":"The code assumes that ejtag_info-\u003econfig has at least four elements since it directly accesses indexes 0, 1, and 3. There should be a check to ensure that the array has the required number of elements to avoid potential out-of-bounds access.","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"373e6b7acf8b02e1ec33db95d248313e6aad018d","unresolved":false,"context_lines":[{"line_number":1152,"context_line":"\tuint32_t config4, tlb_entries \u003d 0, ways \u003d 0, sets \u003d 0;"},{"line_number":1153,"context_line":"\tuint32_t config0 \u003d ejtag_info-\u003econfig[0];"},{"line_number":1154,"context_line":"\tuint32_t config1 \u003d ejtag_info-\u003econfig[1];"},{"line_number":1155,"context_line":"\tuint32_t config3 \u003d ejtag_info-\u003econfig[3];"},{"line_number":1156,"context_line":"\tuint32_t mmu_type \u003d (config0 \u003e\u003e 7) \u0026 7;"},{"line_number":1157,"context_line":"\tuint32_t vz_present \u003d (config3 \u0026 BIT(23));"},{"line_number":1158,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":7,"id":"c35b424c_da358bc7","line":1155,"in_reply_to":"c3cc7423_07c587ae","updated":"2023-11-15 05:08:59.000000000","message":"The structure of `mips_ejtag` in fact does have `config` field as fixed size array which contains 4 elements.\nCheck [mips_ejtag.h:196 (on github)](https://github.com/openocd-org/openocd/blob/master/src/target/mips_ejtag.h#L196)","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"c0a2499ab2012e4a2955a14c1cd11764b3d99964","unresolved":true,"context_lines":[{"line_number":1161,"context_line":"\t\treturn retval;"},{"line_number":1162,"context_line":""},{"line_number":1163,"context_line":"\t/* mmu type \u003d 1: VTLB only\t\t\tNote: Does not account for Config4.ExtVTLB"},{"line_number":1164,"context_line":"\t * mmu type \u003d 3: root RPU/Fixed\t\tNote: Only valid with VZ ASE"},{"line_number":1165,"context_line":"\t * mmu type \u003d 4: VTLB and FTLB */"},{"line_number":1166,"context_line":"\tif ((mmu_type \u003d\u003d 1 || mmu_type \u003d\u003d 4) || (mmu_type \u003d\u003d 3 \u0026\u0026 vz_present)) {"},{"line_number":1167,"context_line":"\t\ttlb_entries \u003d (uint32_t)(((config1 \u003e\u003e 25) \u0026 0x3f) + 1);"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"75a7fbda_a1214e6d","line":1164,"updated":"2023-11-07 09:53:51.000000000","message":"Please remove tabs in this comments","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"373e6b7acf8b02e1ec33db95d248313e6aad018d","unresolved":false,"context_lines":[{"line_number":1161,"context_line":"\t\treturn retval;"},{"line_number":1162,"context_line":""},{"line_number":1163,"context_line":"\t/* mmu type \u003d 1: VTLB only\t\t\tNote: Does not account for Config4.ExtVTLB"},{"line_number":1164,"context_line":"\t * mmu type \u003d 3: root RPU/Fixed\t\tNote: Only valid with VZ ASE"},{"line_number":1165,"context_line":"\t * mmu type \u003d 4: VTLB and FTLB */"},{"line_number":1166,"context_line":"\tif ((mmu_type \u003d\u003d 1 || mmu_type \u003d\u003d 4) || (mmu_type \u003d\u003d 3 \u0026\u0026 vz_present)) {"},{"line_number":1167,"context_line":"\t\ttlb_entries \u003d (uint32_t)(((config1 \u003e\u003e 25) \u0026 0x3f) + 1);"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"d2a2da5b_f24d259c","line":1164,"in_reply_to":"75a7fbda_a1214e6d","updated":"2023-11-15 05:08:59.000000000","message":"Done","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"c0a2499ab2012e4a2955a14c1cd11764b3d99964","unresolved":true,"context_lines":[{"line_number":1168,"context_line":"\t\tif (mmu_type \u003d\u003d 4) {"},{"line_number":1169,"context_line":"\t\t\t/* Release 6 definition for Config4 (MD01251) */"},{"line_number":1170,"context_line":"\t\t\tways \u003d ftlb_ways[(config4 \u003e\u003e 4) \u0026 0xf];"},{"line_number":1171,"context_line":"\t\t\tsets \u003d ftlb_sets[config4 \u0026 0xf];"},{"line_number":1172,"context_line":"\t\t\ttlb_entries \u003d tlb_entries + (ways * sets);"},{"line_number":1173,"context_line":"\t\t}"},{"line_number":1174,"context_line":"\t}"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"c8d785a1_a57ff071","line":1171,"updated":"2023-11-07 09:53:51.000000000","message":"The arrays use in this section can be dynamically calculated:\nuint32_t index \u003d (config4 \u003e\u003e 4) \u0026 0xf; // extract the relevant bits\nuint32_t ways;\nif (index \u003d\u003d 0 || index \u003e 8) {\n    ways \u003d 0; // handle the case where index is 0 or greater than 8\n} else {\n    ways \u003d index + 1; // dynamically calculate ways based on index\n}\n\n\nuint32_t index \u003d config4 \u0026 0xf; // extract the relevant bits\nuint32_t sets;\nif (index \u003e 7) {\n    sets \u003d 0; // handle the case where index is greater than 7\n} else {\n    sets \u003d 1 \u003c\u003c index; // dynamically calculate sets as 2^index\n}","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"373e6b7acf8b02e1ec33db95d248313e6aad018d","unresolved":false,"context_lines":[{"line_number":1168,"context_line":"\t\tif (mmu_type \u003d\u003d 4) {"},{"line_number":1169,"context_line":"\t\t\t/* Release 6 definition for Config4 (MD01251) */"},{"line_number":1170,"context_line":"\t\t\tways \u003d ftlb_ways[(config4 \u003e\u003e 4) \u0026 0xf];"},{"line_number":1171,"context_line":"\t\t\tsets \u003d ftlb_sets[config4 \u0026 0xf];"},{"line_number":1172,"context_line":"\t\t\ttlb_entries \u003d tlb_entries + (ways * sets);"},{"line_number":1173,"context_line":"\t\t}"},{"line_number":1174,"context_line":"\t}"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"98e8b28e_941be76a","line":1171,"in_reply_to":"c8d785a1_a57ff071","updated":"2023-11-15 05:08:59.000000000","message":"Done","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"c0a2499ab2012e4a2955a14c1cd11764b3d99964","unresolved":true,"context_lines":[{"line_number":1278,"context_line":"\telse"},{"line_number":1279,"context_line":"\t\tLOG_USER(\"Vendor: %s\", entry-\u003evendor);"},{"line_number":1280,"context_line":""},{"line_number":1281,"context_line":"\t/* If release 2 of Arch. then get exception base info */"},{"line_number":1282,"context_line":"\tenum mips32_isa_rel ar \u003d mips32-\u003eisa_rel;"},{"line_number":1283,"context_line":"\tif (ar \u003e MIPS32_RELEASE_1) {\t/* release 2 and above */"},{"line_number":1284,"context_line":"\t\tuint32_t ebase;"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"9fa3ef6a_eae8bbee","line":1281,"updated":"2023-11-07 09:53:51.000000000","message":"\"If release 2 or higher\" or \"if not release 1\"?","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"373e6b7acf8b02e1ec33db95d248313e6aad018d","unresolved":false,"context_lines":[{"line_number":1278,"context_line":"\telse"},{"line_number":1279,"context_line":"\t\tLOG_USER(\"Vendor: %s\", entry-\u003evendor);"},{"line_number":1280,"context_line":""},{"line_number":1281,"context_line":"\t/* If release 2 of Arch. then get exception base info */"},{"line_number":1282,"context_line":"\tenum mips32_isa_rel ar \u003d mips32-\u003eisa_rel;"},{"line_number":1283,"context_line":"\tif (ar \u003e MIPS32_RELEASE_1) {\t/* release 2 and above */"},{"line_number":1284,"context_line":"\t\tuint32_t ebase;"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"88931b41_4b4aace9","line":1281,"in_reply_to":"9fa3ef6a_eae8bbee","updated":"2023-11-15 05:08:59.000000000","message":"Done","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"c0a2499ab2012e4a2955a14c1cd11764b3d99964","unresolved":true,"context_lines":[{"line_number":1291,"context_line":"\t\tLOG_USER(\"Current CPU ID: 0\");"},{"line_number":1292,"context_line":"\t}"},{"line_number":1293,"context_line":""},{"line_number":1294,"context_line":"\tswitch ((config3 \u0026 0x0000C000) \u003e\u003e  14) {"},{"line_number":1295,"context_line":"\t\tcase 0:"},{"line_number":1296,"context_line":"\t\t\tsnprintf(text, sizeof(text), \"MIPS32\");"},{"line_number":1297,"context_line":"\t\tbreak;"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"28ebe1eb_f59c0bce","line":1294,"updated":"2023-11-07 09:53:51.000000000","message":"The bitwise operations are not immediately intuitive, such as (config3 \u0026 0x0000C000) \u003e\u003e 14. Using named constants for masks and shifts would help explain what these operations are intended to extract or check.","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"373e6b7acf8b02e1ec33db95d248313e6aad018d","unresolved":false,"context_lines":[{"line_number":1291,"context_line":"\t\tLOG_USER(\"Current CPU ID: 0\");"},{"line_number":1292,"context_line":"\t}"},{"line_number":1293,"context_line":""},{"line_number":1294,"context_line":"\tswitch ((config3 \u0026 0x0000C000) \u003e\u003e  14) {"},{"line_number":1295,"context_line":"\t\tcase 0:"},{"line_number":1296,"context_line":"\t\t\tsnprintf(text, sizeof(text), \"MIPS32\");"},{"line_number":1297,"context_line":"\t\tbreak;"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"9833b4fa_dd142cb8","line":1294,"in_reply_to":"28ebe1eb_f59c0bce","updated":"2023-11-15 05:08:59.000000000","message":"Done","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"c0a2499ab2012e4a2955a14c1cd11764b3d99964","unresolved":true,"context_lines":[{"line_number":1304,"context_line":"\t\tcase 3:"},{"line_number":1305,"context_line":"\t\t\tsnprintf(text, sizeof(text), \"microMIPS (at reset) and MIPS32\");"},{"line_number":1306,"context_line":"\t\tbreak;"},{"line_number":1307,"context_line":"\t}"},{"line_number":1308,"context_line":""},{"line_number":1309,"context_line":"\t/* Display Instruction Set Info */"},{"line_number":1310,"context_line":"\tLOG_USER(\"Instr set: %s\", \u0026text[0]);"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"ae2ff521_cdc9f55b","line":1307,"updated":"2023-11-07 09:53:51.000000000","message":"In this function there is no place justifying usage of \"text\" buffer together with sprintf() function. You can do it as simple as:\n\nchar *instr \u003d \"MIPS32\"\nLOG_USER(\"Instr set: %s\", instr);","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"373e6b7acf8b02e1ec33db95d248313e6aad018d","unresolved":false,"context_lines":[{"line_number":1304,"context_line":"\t\tcase 3:"},{"line_number":1305,"context_line":"\t\t\tsnprintf(text, sizeof(text), \"microMIPS (at reset) and MIPS32\");"},{"line_number":1306,"context_line":"\t\tbreak;"},{"line_number":1307,"context_line":"\t}"},{"line_number":1308,"context_line":""},{"line_number":1309,"context_line":"\t/* Display Instruction Set Info */"},{"line_number":1310,"context_line":"\tLOG_USER(\"Instr set: %s\", \u0026text[0]);"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"a7d631cd_3d36dd26","line":1307,"in_reply_to":"ae2ff521_cdc9f55b","updated":"2023-11-15 05:08:59.000000000","message":"Done","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"c0a2499ab2012e4a2955a14c1cd11764b3d99964","unresolved":true,"context_lines":[{"line_number":1315,"context_line":"\t\t\t: \"unknown\");"},{"line_number":1316,"context_line":"\tLOG_USER(\"PRId: %x\", prid);"},{"line_number":1317,"context_line":"\tuint32_t rev \u003d prid \u0026 0x000000ff;"},{"line_number":1318,"context_line":"\tLOG_USER(\"RTL Rev: %x.%x.%x\", (rev \u0026 0xE0), (rev \u0026 0x1C), (rev \u0026 0x3));"},{"line_number":1319,"context_line":""},{"line_number":1320,"context_line":"\tLOG_USER(\"Max Number of Instr Breakpoints: %d\", mips32-\u003enum_inst_bpoints);"},{"line_number":1321,"context_line":"\tLOG_USER(\"Max Number of  Data Breakpoints: %d\", mips32-\u003enum_data_bpoints);"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"a9ac8c77_bce06a99","line":1318,"updated":"2023-11-07 09:53:51.000000000","message":"This would print hexadecimal values without leading zeros, which might not be the intended format.","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"373e6b7acf8b02e1ec33db95d248313e6aad018d","unresolved":false,"context_lines":[{"line_number":1315,"context_line":"\t\t\t: \"unknown\");"},{"line_number":1316,"context_line":"\tLOG_USER(\"PRId: %x\", prid);"},{"line_number":1317,"context_line":"\tuint32_t rev \u003d prid \u0026 0x000000ff;"},{"line_number":1318,"context_line":"\tLOG_USER(\"RTL Rev: %x.%x.%x\", (rev \u0026 0xE0), (rev \u0026 0x1C), (rev \u0026 0x3));"},{"line_number":1319,"context_line":""},{"line_number":1320,"context_line":"\tLOG_USER(\"Max Number of Instr Breakpoints: %d\", mips32-\u003enum_inst_bpoints);"},{"line_number":1321,"context_line":"\tLOG_USER(\"Max Number of  Data Breakpoints: %d\", mips32-\u003enum_data_bpoints);"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"676d2ba4_2d952a92","line":1318,"in_reply_to":"a9ac8c77_bce06a99","updated":"2023-11-15 05:08:59.000000000","message":"Done","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"c0a2499ab2012e4a2955a14c1cd11764b3d99964","unresolved":true,"context_lines":[{"line_number":1349,"context_line":"\t/* Determine Instr Cache Size */"},{"line_number":1350,"context_line":"\tways \u003d way_table[(config1 \u003e\u003e MIPS32_CFG1_IASHIFT) \u0026 7];"},{"line_number":1351,"context_line":"\tsets \u003d set_table_isds[(config1 \u003e\u003e MIPS32_CFG1_ISSHIFT) \u0026 7];"},{"line_number":1352,"context_line":"\tbpl  \u003d bpl_table[(config1 \u003e\u003e MIPS32_CFG1_ILSHIFT) \u0026 7];"},{"line_number":1353,"context_line":"\tLOG_USER(\"Instr Cache: %d (%d ways, %d lines, %d byte per line)\", ways * sets * bpl, ways, sets, bpl);"},{"line_number":1354,"context_line":""},{"line_number":1355,"context_line":"\t/* Determine data cache size */"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"56a4bc13_681389b6","line":1352,"updated":"2023-11-07 09:53:51.000000000","message":"This array can be potentially replaced with dynamic calculation. May be something like this:\nint index;\nuint32_t sets, bpl;\n\n// For set_table_isds\nindex \u003d (config1 \u003e\u003e MIPS32_CFG1_ISSHIFT) \u0026 7;\nif (index \u003c 8) {\n    // assuming 32 at position 7 was a typo.\n    // For indices 0 to 7, use bit shifting starting from 32 (2^5)\n    sets \u003d 32 \u003c\u003c index;\n} else {\n    // For indices 8 to 15, start shifting from 16384 (2^14) and adjust the index by subtracting 8\n    sets \u003d 16384 \u003c\u003c (index - 8);\n}\n\n// For bpl_table\nindex \u003d (config1 \u003e\u003e MIPS32_CFG1_ILSHIFT) \u0026 7;\nif (index \u003d\u003d 0) {\n    bpl \u003d 0; // Handle the 0 case separately\n} else {\n    bpl \u003d 4 \u003c\u003c (index - 1); // This works for indices 1 to 7\n}\n\n// Then use sets and bpl as before\nLOG_USER(\"Instr Cache: %d (%d ways, %d lines, %d byte per line)\", ways * sets * bpl, ways, sets, bpl);","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"373e6b7acf8b02e1ec33db95d248313e6aad018d","unresolved":false,"context_lines":[{"line_number":1349,"context_line":"\t/* Determine Instr Cache Size */"},{"line_number":1350,"context_line":"\tways \u003d way_table[(config1 \u003e\u003e MIPS32_CFG1_IASHIFT) \u0026 7];"},{"line_number":1351,"context_line":"\tsets \u003d set_table_isds[(config1 \u003e\u003e MIPS32_CFG1_ISSHIFT) \u0026 7];"},{"line_number":1352,"context_line":"\tbpl  \u003d bpl_table[(config1 \u003e\u003e MIPS32_CFG1_ILSHIFT) \u0026 7];"},{"line_number":1353,"context_line":"\tLOG_USER(\"Instr Cache: %d (%d ways, %d lines, %d byte per line)\", ways * sets * bpl, ways, sets, bpl);"},{"line_number":1354,"context_line":""},{"line_number":1355,"context_line":"\t/* Determine data cache size */"}],"source_content_type":"text/x-csrc","patch_set":7,"id":"c592e400_5633a79b","line":1352,"in_reply_to":"56a4bc13_681389b6","updated":"2023-11-15 05:08:59.000000000","message":"The higher half of the array are draft only, I have removed them while no processors available on market implements this. The said part were rewritten, too.","commit_id":"157a7eb332633461be75745ae167bd7b85f2c30f"},{"author":{"_account_id":1000410,"name":"Oleksij Rempel","email":"linux@rempel-privat.de","username":"olerem"},"change_message_id":"45f79a942a0ca625be95d0f5a7b0699fcf501564","unresolved":true,"context_lines":[{"line_number":1266,"context_line":"\t/* Determine Core info */"},{"line_number":1267,"context_line":"\tconst struct cpu_entry *entry \u003d mips32-\u003ecpu_info;"},{"line_number":1268,"context_line":"\t/* Display Core Type info */"},{"line_number":1269,"context_line":"\tLOG_USER(\"CPU Core: %s\", entry-\u003ecpu_name);"},{"line_number":1270,"context_line":""},{"line_number":1271,"context_line":"\t/* Display Core Vendor ID if it\u0027s unknown */"},{"line_number":1272,"context_line":"\tif (entry \u003d\u003d \u0026mips32_cpu_entry[MIPS32_NUM_CPU_ENTRIES - 1])"}],"source_content_type":"text/x-csrc","patch_set":9,"id":"b75384c2_8f1b1b9b","line":1269,"updated":"2023-11-16 07:46:36.000000000","message":"I just noted, should you actually replace all LOG_USER to command_print() in this command?","commit_id":"09abd9b894bc581f3744a494a9cea13ef5a02763"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"c098f24b799e195d9ce0411005c153a5307b01b7","unresolved":false,"context_lines":[{"line_number":1266,"context_line":"\t/* Determine Core info */"},{"line_number":1267,"context_line":"\tconst struct cpu_entry *entry \u003d mips32-\u003ecpu_info;"},{"line_number":1268,"context_line":"\t/* Display Core Type info */"},{"line_number":1269,"context_line":"\tLOG_USER(\"CPU Core: %s\", entry-\u003ecpu_name);"},{"line_number":1270,"context_line":""},{"line_number":1271,"context_line":"\t/* Display Core Vendor ID if it\u0027s unknown */"},{"line_number":1272,"context_line":"\tif (entry \u003d\u003d \u0026mips32_cpu_entry[MIPS32_NUM_CPU_ENTRIES - 1])"}],"source_content_type":"text/x-csrc","patch_set":9,"id":"a517f777_df179947","line":1269,"in_reply_to":"b75384c2_8f1b1b9b","updated":"2023-11-17 07:32:36.000000000","message":"I have changed all prints using LOG_USER/LOG_INFO in following patches, too.","commit_id":"09abd9b894bc581f3744a494a9cea13ef5a02763"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"ce72a1a41cb6c9ff35aa4832140ef8f7eb64cece","unresolved":true,"context_lines":[{"line_number":786,"context_line":"\t/* Mask out Company Option */"},{"line_number":787,"context_line":"\tprid \u0026\u003d 0x00FFFFFF;"},{"line_number":788,"context_line":""},{"line_number":789,"context_line":"\tint i;"},{"line_number":790,"context_line":"\tfor (i \u003d 0; i \u003c MIPS32_NUM_CPU_ENTRIES; i++) {"},{"line_number":791,"context_line":"\t\tconst struct cpu_entry *entry \u003d \u0026mips32_cpu_entry[i];"},{"line_number":792,"context_line":"\t\tif ((entry-\u003eprid \u0026 MIPS32_CORE_MASK) \u003c\u003d prid \u0026\u0026 prid \u003c\u003d entry-\u003eprid)"},{"line_number":793,"context_line":"\t\t\treturn entry;"}],"source_content_type":"text/x-csrc","patch_set":11,"id":"5bd9d2d8_0f946217","line":790,"range":{"start_line":789,"start_character":1,"end_line":790,"end_character":47},"updated":"2023-11-18 16:54:35.000000000","message":"... then here declare \u0027i\u0027 as unsigned int to avoid compile to complain. Better to use:\nfor (unsigned int i \u003d 0; i \u003c MIPS32_NUM_CPU_ENTRIES; i++) {","commit_id":"5615217b580e8f046750396832279093f802071a"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"c3a0a3070ce84c838b647584eb2e5e77ab56a4f1","unresolved":false,"context_lines":[{"line_number":786,"context_line":"\t/* Mask out Company Option */"},{"line_number":787,"context_line":"\tprid \u0026\u003d 0x00FFFFFF;"},{"line_number":788,"context_line":""},{"line_number":789,"context_line":"\tint i;"},{"line_number":790,"context_line":"\tfor (i \u003d 0; i \u003c MIPS32_NUM_CPU_ENTRIES; i++) {"},{"line_number":791,"context_line":"\t\tconst struct cpu_entry *entry \u003d \u0026mips32_cpu_entry[i];"},{"line_number":792,"context_line":"\t\tif ((entry-\u003eprid \u0026 MIPS32_CORE_MASK) \u003c\u003d prid \u0026\u0026 prid \u003c\u003d entry-\u003eprid)"},{"line_number":793,"context_line":"\t\t\treturn entry;"}],"source_content_type":"text/x-csrc","patch_set":11,"id":"1555e5d9_67c49e0d","line":790,"range":{"start_line":789,"start_character":1,"end_line":790,"end_character":47},"in_reply_to":"5bd9d2d8_0f946217","updated":"2023-11-22 09:48:08.000000000","message":"Done","commit_id":"5615217b580e8f046750396832279093f802071a"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"ce72a1a41cb6c9ff35aa4832140ef8f7eb64cece","unresolved":true,"context_lines":[{"line_number":1298,"context_line":""},{"line_number":1299,"context_line":"\tif (target-\u003estate !\u003d TARGET_HALTED) {"},{"line_number":1300,"context_line":"\t\tcommand_print(CMD, \"target must be stopped for \\\"%s\\\" command\", CMD_NAME);"},{"line_number":1301,"context_line":"\t\treturn ERROR_OK;"},{"line_number":1302,"context_line":"\t}"},{"line_number":1303,"context_line":""},{"line_number":1304,"context_line":"\t/* No args for now */"}],"source_content_type":"text/x-csrc","patch_set":11,"id":"ea6e297f_d8a8f463","line":1301,"updated":"2023-11-18 16:54:35.000000000","message":"Should this return ERROR_TARGET_NOT_HALTED ?","commit_id":"5615217b580e8f046750396832279093f802071a"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"c3a0a3070ce84c838b647584eb2e5e77ab56a4f1","unresolved":false,"context_lines":[{"line_number":1298,"context_line":""},{"line_number":1299,"context_line":"\tif (target-\u003estate !\u003d TARGET_HALTED) {"},{"line_number":1300,"context_line":"\t\tcommand_print(CMD, \"target must be stopped for \\\"%s\\\" command\", CMD_NAME);"},{"line_number":1301,"context_line":"\t\treturn ERROR_OK;"},{"line_number":1302,"context_line":"\t}"},{"line_number":1303,"context_line":""},{"line_number":1304,"context_line":"\t/* No args for now */"}],"source_content_type":"text/x-csrc","patch_set":11,"id":"c92e2471_b92676a4","line":1301,"in_reply_to":"ea6e297f_d8a8f463","updated":"2023-11-22 09:48:08.000000000","message":"Done","commit_id":"5615217b580e8f046750396832279093f802071a"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"ce72a1a41cb6c9ff35aa4832140ef8f7eb64cece","unresolved":true,"context_lines":[{"line_number":1302,"context_line":"\t}"},{"line_number":1303,"context_line":""},{"line_number":1304,"context_line":"\t/* No args for now */"},{"line_number":1305,"context_line":"\tif (CMD_ARGC \u003e\u003d 1)"},{"line_number":1306,"context_line":"\t\treturn ERROR_COMMAND_SYNTAX_ERROR;"},{"line_number":1307,"context_line":""},{"line_number":1308,"context_line":"\tretval \u003d mips32_cp0_read(ejtag_info, \u0026config5, 16, 5);"}],"source_content_type":"text/x-csrc","patch_set":11,"id":"b67e5902_80bbbcd5","line":1305,"updated":"2023-11-18 16:54:35.000000000","message":"I prefer the command\u0027s syntax to be checked \u0027before\u0027 the check for target halted.\nPlease use\nif (CMD_ARGC !\u003d 0)","commit_id":"5615217b580e8f046750396832279093f802071a"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"c3a0a3070ce84c838b647584eb2e5e77ab56a4f1","unresolved":false,"context_lines":[{"line_number":1302,"context_line":"\t}"},{"line_number":1303,"context_line":""},{"line_number":1304,"context_line":"\t/* No args for now */"},{"line_number":1305,"context_line":"\tif (CMD_ARGC \u003e\u003d 1)"},{"line_number":1306,"context_line":"\t\treturn ERROR_COMMAND_SYNTAX_ERROR;"},{"line_number":1307,"context_line":""},{"line_number":1308,"context_line":"\tretval \u003d mips32_cp0_read(ejtag_info, \u0026config5, 16, 5);"}],"source_content_type":"text/x-csrc","patch_set":11,"id":"66d53b69_7d5809ce","line":1305,"in_reply_to":"b67e5902_80bbbcd5","updated":"2023-11-22 09:48:08.000000000","message":"Done","commit_id":"5615217b580e8f046750396832279093f802071a"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"ce72a1a41cb6c9ff35aa4832140ef8f7eb64cece","unresolved":true,"context_lines":[{"line_number":1505,"context_line":"\t\t.help \u003d \"display/modify cp0 register\","},{"line_number":1506,"context_line":"\t},"},{"line_number":1507,"context_line":"\t{"},{"line_number":1508,"context_line":"\t\t.name \u003d \"cpuinfo\","},{"line_number":1509,"context_line":"\t\t.handler \u003d mips32_handle_cpuinfo_command,"},{"line_number":1510,"context_line":"\t\t.mode \u003d COMMAND_EXEC,"},{"line_number":1511,"context_line":"\t\t.help \u003d \"cpuinfo displays information for the current CPU core.\","}],"source_content_type":"text/x-csrc","patch_set":11,"id":"aea8114c_43dac22f","line":1508,"updated":"2023-11-18 16:54:35.000000000","message":"this new command \"mips32 cpuinfo\" should be documented in doc/openocd.texi.\nBut I see that none of the commands here is documented! Bad!\nDo you think you could provide a reasonable documentation in a following patch, maybe for all the mips specific commands?","commit_id":"5615217b580e8f046750396832279093f802071a"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"c3a0a3070ce84c838b647584eb2e5e77ab56a4f1","unresolved":false,"context_lines":[{"line_number":1505,"context_line":"\t\t.help \u003d \"display/modify cp0 register\","},{"line_number":1506,"context_line":"\t},"},{"line_number":1507,"context_line":"\t{"},{"line_number":1508,"context_line":"\t\t.name \u003d \"cpuinfo\","},{"line_number":1509,"context_line":"\t\t.handler \u003d mips32_handle_cpuinfo_command,"},{"line_number":1510,"context_line":"\t\t.mode \u003d COMMAND_EXEC,"},{"line_number":1511,"context_line":"\t\t.help \u003d \"cpuinfo displays information for the current CPU core.\","}],"source_content_type":"text/x-csrc","patch_set":11,"id":"a2fea195_42a5e5aa","line":1508,"in_reply_to":"aea8114c_43dac22f","updated":"2023-11-22 09:48:08.000000000","message":"Oops, didn\u0027t notice the commands, sorry! The following patches containing new commands are updated, too.","commit_id":"5615217b580e8f046750396832279093f802071a"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"ce72a1a41cb6c9ff35aa4832140ef8f7eb64cece","unresolved":true,"context_lines":[{"line_number":1508,"context_line":"\t\t.name \u003d \"cpuinfo\","},{"line_number":1509,"context_line":"\t\t.handler \u003d mips32_handle_cpuinfo_command,"},{"line_number":1510,"context_line":"\t\t.mode \u003d COMMAND_EXEC,"},{"line_number":1511,"context_line":"\t\t.help \u003d \"cpuinfo displays information for the current CPU core.\","},{"line_number":1512,"context_line":"\t\t.usage \u003d \"\","},{"line_number":1513,"context_line":"\t},"},{"line_number":1514,"context_line":"\t{"}],"source_content_type":"text/x-csrc","patch_set":11,"id":"c8ec83ec_b3197215","line":1511,"updated":"2023-11-18 16:54:35.000000000","message":"simply:\n.help \u003d \"display CPU information\",","commit_id":"5615217b580e8f046750396832279093f802071a"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"c3a0a3070ce84c838b647584eb2e5e77ab56a4f1","unresolved":false,"context_lines":[{"line_number":1508,"context_line":"\t\t.name \u003d \"cpuinfo\","},{"line_number":1509,"context_line":"\t\t.handler \u003d mips32_handle_cpuinfo_command,"},{"line_number":1510,"context_line":"\t\t.mode \u003d COMMAND_EXEC,"},{"line_number":1511,"context_line":"\t\t.help \u003d \"cpuinfo displays information for the current CPU core.\","},{"line_number":1512,"context_line":"\t\t.usage \u003d \"\","},{"line_number":1513,"context_line":"\t},"},{"line_number":1514,"context_line":"\t{"}],"source_content_type":"text/x-csrc","patch_set":11,"id":"0dd0e4c6_370872ef","line":1511,"in_reply_to":"c8ec83ec_b3197215","updated":"2023-11-22 09:48:08.000000000","message":"Done","commit_id":"5615217b580e8f046750396832279093f802071a"},{"author":{"_account_id":1001964,"name":"Erhan Kurubas","display_name":"Erhan Kurubas","email":"erhan.kurubas@espressif.com","username":"erhankur"},"change_message_id":"b8fea8e36226653580cf75b524fda5263b5c233f","unresolved":true,"context_lines":[{"line_number":913,"context_line":" * MIPS Documents are pretty much all available online,"},{"line_number":914,"context_line":" * it should pop up first when you search \"MDxxxxx\""},{"line_number":915,"context_line":" */"},{"line_number":916,"context_line":"void mips32_read_config_fdc(struct mips32_common *mips32, struct mips_ejtag *ejtag_info, uint32_t dcr)"},{"line_number":917,"context_line":"{"},{"line_number":918,"context_line":"\tif (((ejtag_info-\u003econfig[3] \u0026 MIPS32_CONFIG3_CDMM_MASK) !\u003d 0) \u0026\u0026 ((dcr \u0026 EJTAG_DCR_FDC) !\u003d 0)) {"},{"line_number":919,"context_line":"\t\tmips32-\u003efdc \u003d 1;"}],"source_content_type":"text/x-csrc","patch_set":13,"id":"6774ca61_5c329d25","line":916,"updated":"2023-12-16 10:51:38.000000000","message":"I know this is coming from previous patch but should be static to avoid Sparse tool warning.\nSame for \"mips32_read_config_fpu\" and \"mips32_read_config_dsp\"","commit_id":"6c8b21be200278dc035e417c34ca2e0225c14ff6"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"16d2811c9aaee74e81ad6c0fdbb9e1ccdfc806ce","unresolved":false,"context_lines":[{"line_number":913,"context_line":" * MIPS Documents are pretty much all available online,"},{"line_number":914,"context_line":" * it should pop up first when you search \"MDxxxxx\""},{"line_number":915,"context_line":" */"},{"line_number":916,"context_line":"void mips32_read_config_fdc(struct mips32_common *mips32, struct mips_ejtag *ejtag_info, uint32_t dcr)"},{"line_number":917,"context_line":"{"},{"line_number":918,"context_line":"\tif (((ejtag_info-\u003econfig[3] \u0026 MIPS32_CONFIG3_CDMM_MASK) !\u003d 0) \u0026\u0026 ((dcr \u0026 EJTAG_DCR_FDC) !\u003d 0)) {"},{"line_number":919,"context_line":"\t\tmips32-\u003efdc \u003d 1;"}],"source_content_type":"text/x-csrc","patch_set":13,"id":"e4e44e31_95a1a917","line":916,"in_reply_to":"6774ca61_5c329d25","updated":"2023-12-20 02:37:26.000000000","message":"Done","commit_id":"6c8b21be200278dc035e417c34ca2e0225c14ff6"},{"author":{"_account_id":1001964,"name":"Erhan Kurubas","display_name":"Erhan Kurubas","email":"erhan.kurubas@espressif.com","username":"erhankur"},"change_message_id":"b8fea8e36226653580cf75b524fda5263b5c233f","unresolved":true,"context_lines":[{"line_number":1175,"context_line":" *"},{"line_number":1176,"context_line":" * @return ERROR_OK on success; error code on failure."},{"line_number":1177,"context_line":" */"},{"line_number":1178,"context_line":"int mips32_read_config_mmu(struct mips_ejtag *ejtag_info)"},{"line_number":1179,"context_line":"{"},{"line_number":1180,"context_line":"\tuint32_t config4, tlb_entries \u003d 0, ways \u003d 0, sets \u003d 0;"},{"line_number":1181,"context_line":"\tuint32_t config0 \u003d ejtag_info-\u003econfig[0];"}],"source_content_type":"text/x-csrc","patch_set":13,"id":"79b75f76_4679bae9","line":1178,"updated":"2023-12-16 10:51:38.000000000","message":"Should be static function to avoid Sparse tool warning.","commit_id":"6c8b21be200278dc035e417c34ca2e0225c14ff6"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"16d2811c9aaee74e81ad6c0fdbb9e1ccdfc806ce","unresolved":false,"context_lines":[{"line_number":1175,"context_line":" *"},{"line_number":1176,"context_line":" * @return ERROR_OK on success; error code on failure."},{"line_number":1177,"context_line":" */"},{"line_number":1178,"context_line":"int mips32_read_config_mmu(struct mips_ejtag *ejtag_info)"},{"line_number":1179,"context_line":"{"},{"line_number":1180,"context_line":"\tuint32_t config4, tlb_entries \u003d 0, ways \u003d 0, sets \u003d 0;"},{"line_number":1181,"context_line":"\tuint32_t config0 \u003d ejtag_info-\u003econfig[0];"}],"source_content_type":"text/x-csrc","patch_set":13,"id":"48fe71e8_a800d4ba","line":1178,"in_reply_to":"79b75f76_4679bae9","updated":"2023-12-20 02:37:26.000000000","message":"Done","commit_id":"6c8b21be200278dc035e417c34ca2e0225c14ff6"}],"src/target/mips32.h":[{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"ce72a1a41cb6c9ff35aa4832140ef8f7eb64cece","unresolved":true,"context_lines":[{"line_number":325,"context_line":"\t{0x0001A9FF, MIPS32, \"MIPS\", \"I5500\"},"},{"line_number":326,"context_line":""},{"line_number":327,"context_line":"\t/* Broadcom */"},{"line_number":328,"context_line":"\t{0x000200FF, MIPS32, \"Boradcom\", \"Broadcom\"},"},{"line_number":329,"context_line":""},{"line_number":330,"context_line":"\t/* AMD Alchemy Series*/"},{"line_number":331,"context_line":"\t/* NOTE: AMD/Alchemy series uses Company Option instead of"}],"source_content_type":"text/x-csrc","patch_set":11,"id":"9dd2e61e_62b7883f","line":328,"updated":"2023-11-18 16:54:35.000000000","message":"typo s/Boradcom/Broadcom/","commit_id":"5615217b580e8f046750396832279093f802071a"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"c3a0a3070ce84c838b647584eb2e5e77ab56a4f1","unresolved":false,"context_lines":[{"line_number":325,"context_line":"\t{0x0001A9FF, MIPS32, \"MIPS\", \"I5500\"},"},{"line_number":326,"context_line":""},{"line_number":327,"context_line":"\t/* Broadcom */"},{"line_number":328,"context_line":"\t{0x000200FF, MIPS32, \"Boradcom\", \"Broadcom\"},"},{"line_number":329,"context_line":""},{"line_number":330,"context_line":"\t/* AMD Alchemy Series*/"},{"line_number":331,"context_line":"\t/* NOTE: AMD/Alchemy series uses Company Option instead of"}],"source_content_type":"text/x-csrc","patch_set":11,"id":"081249d8_b09c30ff","line":328,"in_reply_to":"9dd2e61e_62b7883f","updated":"2023-11-22 09:48:08.000000000","message":"Done","commit_id":"5615217b580e8f046750396832279093f802071a"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"ce72a1a41cb6c9ff35aa4832140ef8f7eb64cece","unresolved":true,"context_lines":[{"line_number":351,"context_line":"\t{0xFFFFFFFF, MIPS32, \"Unknown\", \"Unknown\"}"},{"line_number":352,"context_line":"};"},{"line_number":353,"context_line":""},{"line_number":354,"context_line":"#define MIPS32_NUM_CPU_ENTRIES ((int)ARRAY_SIZE(mips32_cpu_entry))"},{"line_number":355,"context_line":""},{"line_number":356,"context_line":"enum mips32_fp_imp {"},{"line_number":357,"context_line":"\tMIPS32_FP_IMP_NONE \u003d 0,"}],"source_content_type":"text/x-csrc","patch_set":11,"id":"0e998fd9_0a107e10","line":354,"updated":"2023-11-18 16:54:35.000000000","message":"please don\u0027t use the cast (int) here, then in next file ....","commit_id":"5615217b580e8f046750396832279093f802071a"},{"author":{"_account_id":1002186,"name":"Walter J.","display_name":"Walter Ji","email":"walter.ji@oss.cipunited.com","username":"709924470","status":"Currently working at CIP United Co., Ltd."},"change_message_id":"c3a0a3070ce84c838b647584eb2e5e77ab56a4f1","unresolved":false,"context_lines":[{"line_number":351,"context_line":"\t{0xFFFFFFFF, MIPS32, \"Unknown\", \"Unknown\"}"},{"line_number":352,"context_line":"};"},{"line_number":353,"context_line":""},{"line_number":354,"context_line":"#define MIPS32_NUM_CPU_ENTRIES ((int)ARRAY_SIZE(mips32_cpu_entry))"},{"line_number":355,"context_line":""},{"line_number":356,"context_line":"enum mips32_fp_imp {"},{"line_number":357,"context_line":"\tMIPS32_FP_IMP_NONE \u003d 0,"}],"source_content_type":"text/x-csrc","patch_set":11,"id":"41f5b2cf_33ea0b13","line":354,"in_reply_to":"0e998fd9_0a107e10","updated":"2023-11-22 09:48:08.000000000","message":"Done","commit_id":"5615217b580e8f046750396832279093f802071a"}]}