)]}'
{"/PATCHSET_LEVEL":[{"author":{"_account_id":1001982,"name":"Ian Thompson","email":"ianst@cadence.com","username":"ianstcdns"},"change_message_id":"93d096c85f2703e36c6290c219f556f4bec86f43","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":1,"id":"379e6edf_0fe178f4","updated":"2024-03-30 23:04:23.000000000","message":"@antonio @erhan any other feedback for this patch?  guessing it may have slipped off your radar.  thanks in advance.","commit_id":"241364315c93a3de9a6d14a1931c2c320f039637"},{"author":{"_account_id":1001982,"name":"Ian Thompson","email":"ianst@cadence.com","username":"ianstcdns"},"change_message_id":"5fec3e6deb9ae535bec56b66783e3936fb375537","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":1,"id":"d1a3bbea_17fa0d25","updated":"2024-02-01 01:03:57.000000000","message":"Fix for MPU-enabled configs.  Thanks in advance for the review.","commit_id":"241364315c93a3de9a6d14a1931c2c320f039637"},{"author":{"_account_id":1001964,"name":"Erhan Kurubas","display_name":"Erhan Kurubas","email":"erhan.kurubas@espressif.com","username":"erhankur"},"change_message_id":"54412bb223703347b36c4bf288e2f073c0691da5","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":1,"id":"0da3cc79_8dabc399","in_reply_to":"379e6edf_0fe178f4","updated":"2024-04-14 18:18:32.000000000","message":"@Ian, LGTM. Thanks","commit_id":"241364315c93a3de9a6d14a1931c2c320f039637"}],"src/target/xtensa/xtensa.c":[{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"3a7065f5d2ec9fadfba5b6b1df602345ef410669","unresolved":true,"context_lines":[{"line_number":572,"context_line":"\t\t\tres \u003d xtensa_core_status_check(target);"},{"line_number":573,"context_line":"\t\t\tif (res !\u003d ERROR_OK)"},{"line_number":574,"context_line":"\t\t\t\tLOG_TARGET_ERROR(target, \"Error issuing PPTLB: %d\", res);"},{"line_number":575,"context_line":"\t\t\tat \u003d buf_get_u32(at_buf, 0, 32);"},{"line_number":576,"context_line":"\t\t\tacc \u003d (at \u003e\u003e XT_TLB1_ACC_SHIFT) \u0026 XT_TLB1_ACC_MSK;"},{"line_number":577,"context_line":"\t\t\texec_acc \u003d ((acc \u003d\u003d XTENSA_ACC_00X_000) || (acc \u003d\u003d XTENSA_ACC_R0X_000) ||"},{"line_number":578,"context_line":"\t\t\t\t\t\t(acc \u003d\u003d XTENSA_ACC_RWX_000) || (acc \u003d\u003d XTENSA_ACC_RWX_R0X) ||"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"1253f5f1_cc4eb9a0","line":575,"updated":"2024-02-18 10:53:25.000000000","message":"is there any endianness to be checked here?\ntarget_buffer_get_u32() ?\nI cannot judge, as I see that in the existing code the output of xtensa_queue_dbg_reg_read() is sometimes passed through buf_get_u32(), sometimes through target_buffer_get_u32().","commit_id":"241364315c93a3de9a6d14a1931c2c320f039637"},{"author":{"_account_id":1001982,"name":"Ian Thompson","email":"ianst@cadence.com","username":"ianstcdns"},"change_message_id":"77a59276f8770bb756e8aa647e359388ac0618b0","unresolved":false,"context_lines":[{"line_number":572,"context_line":"\t\t\tres \u003d xtensa_core_status_check(target);"},{"line_number":573,"context_line":"\t\t\tif (res !\u003d ERROR_OK)"},{"line_number":574,"context_line":"\t\t\t\tLOG_TARGET_ERROR(target, \"Error issuing PPTLB: %d\", res);"},{"line_number":575,"context_line":"\t\t\tat \u003d buf_get_u32(at_buf, 0, 32);"},{"line_number":576,"context_line":"\t\t\tacc \u003d (at \u003e\u003e XT_TLB1_ACC_SHIFT) \u0026 XT_TLB1_ACC_MSK;"},{"line_number":577,"context_line":"\t\t\texec_acc \u003d ((acc \u003d\u003d XTENSA_ACC_00X_000) || (acc \u003d\u003d XTENSA_ACC_R0X_000) ||"},{"line_number":578,"context_line":"\t\t\t\t\t\t(acc \u003d\u003d XTENSA_ACC_RWX_000) || (acc \u003d\u003d XTENSA_ACC_RWX_R0X) ||"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"afbc0cb8_ebd60dd9","line":575,"in_reply_to":"1253f5f1_cc4eb9a0","updated":"2024-02-20 17:37:10.000000000","message":"Endianness must not be checked here.  The PPTLB instruction return data formatting is consistent regardless of big/little endian memory arrangement.  Great question!","commit_id":"241364315c93a3de9a6d14a1931c2c320f039637"}]}