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interface through USB bus.\nThis driver comes from:\nhttps://github.com/WCHSoftGroup/ch347\n\nChange-Id: I9be11aa50f1134e3904bee2012ad73749a4c0c35\nSigned-off-by: ZhiYuanNJ \u003c871238103@qq.com\u003e\n"},"description":"Edit commit message"},"389c92c5fb6ef37dbee90f7acf629d87402cf1c4":{"kind":"REWORK","_number":6,"created":"2024-04-28 03:48:34.000000000","uploader":{"_account_id":1002199,"name":"ZhiYuanNJ","display_name":" ZhiYuanNJ","email":"871238103@qq.com","username":"ZhiYuanNJ"},"ref":"refs/changes/90/8090/6","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/90/8090/6","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/90/8090/6 \u0026\u0026 git checkout -b change-8090 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/90/8090/6 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/90/8090/6 \u0026\u0026 git cherry-pick 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support for WCH CH347T/F interfaces\n\nCH347 is a high-speed USB bus converter chip that provides UART, I2C and SPI synchronous serial ports and JTAG interface through USB bus.\nIn the JTAG interface mode, CH347 provides one JTAG interface that supports 4/5/6 line interfaces (TMS line, TCK line, TDI line, TDO line, TRST line, and SRST line), used to extend the JTAG interface for computers and operate devices such as CPU, DSP, FPGA, and CPLD.\nIn the SWD interface mode, CH347 provides one SWD interface (SWDCLK line, SWDIO line) for expanding the SWD interface for computers, operating ARM MCU and CPU devices, etc.\n\nChange-Id: I9be11aa50f1134e3904bee2012ad73749a4c0c35\nSigned-off-by: ZhiYuanNJ \u003c871238103@qq.com\u003e\n"}},"fcb1248f6c0608a79031ebec17a7ffe40678d472":{"kind":"REWORK","_number":2,"created":"2024-04-28 02:32:04.000000000","uploader":{"_account_id":1002199,"name":"ZhiYuanNJ","display_name":" ZhiYuanNJ","email":"871238103@qq.com","username":"ZhiYuanNJ"},"ref":"refs/changes/90/8090/2","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/90/8090/2","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/90/8090/2 \u0026\u0026 git checkout -b change-8090 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/90/8090/2 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/90/8090/2 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/90/8090/2 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/90/8090/2","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/90/8090/2 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"04154af5d6cd5fe76a2583778379bdacb5aa6fb0","subject":"jtag: linuxgpiod: drop extra parenthesis"}],"author":{"name":"ZhiYuanNJ","email":"871238103@qq.com","date":"2024-04-26 08:45:21.000000000","tz":480},"committer":{"name":"ZhiYuanNJ","email":"871238103@qq.com","date":"2024-04-28 02:32:00.000000000","tz":0},"subject":"jtag/drivers: Add support for WCH CH347T/F interfaces","message":"jtag/drivers: Add support for WCH CH347T/F interfaces\n\nCH347 is a high-speed USB bus converter chip that provides UART, I2C and SPI synchronous serial ports and JTAG interface through USB bus.\nIn the JTAG interface mode, CH347 provides one JTAG interface that supports 4/5/6 line interfaces (TMS line, TCK line, TDI line, TDO line, TRST line, and SRST line), used to extend the JTAG interface for computers and operate devices such as CPU, DSP, FPGA, and CPLD.\nIn the SWD interface mode, CH347 provides one SWD interface (SWDCLK line, SWDIO line) for expanding the SWD interface for computers, operating ARM MCU and CPU devices, etc.\n\nChange-Id: I9be11aa50f1134e3904bee2012ad73749a4c0c35\nSigned-off-by: ZhiYuanNJ \u003c871238103@qq.com\u003e\n"}}},"requirements":[],"submit_records":[],"submit_requirements":[]}