)]}'
{"/PATCHSET_LEVEL":[{"author":{"_account_id":1002302,"name":"Henrik Mau","display_name":"Henrik Mau","email":"henrik.mau@analog.com","username":"hmauadi"},"change_message_id":"a7ee6ae465cb89b9d723205f648035bf25fb8dda","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":1,"id":"1f26e07b_f9d80550","updated":"2024-11-11 17:38:29.000000000","message":"Hi Ian,\n\nI\u0027ve pushed up the changes following our discussion a while ago.  If you have time to review them that would be most appreciated.\n\n\nThanks.","commit_id":"827f9026da442a20bc1c8632e53cb72f447fcd5d"},{"author":{"_account_id":1001982,"name":"Ian Thompson","email":"ianst@cadence.com","username":"ianstcdns"},"change_message_id":"a7d3c8c9cdd7a07a9e10db4ab90d3e642d553ebe","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":1,"id":"64daa483_04baaac8","updated":"2024-11-12 15:27:11.000000000","message":"Thanks for your patch, Henrik.  Looks good to me.  I downloaded it and tested it out on an NX core and it appears to disable interrupts as expected.  One minor request listed separately.","commit_id":"827f9026da442a20bc1c8632e53cb72f447fcd5d"},{"author":{"_account_id":1001982,"name":"Ian Thompson","email":"ianst@cadence.com","username":"ianstcdns"},"change_message_id":"a7d3c8c9cdd7a07a9e10db4ab90d3e642d553ebe","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":1,"id":"94714961_c326c641","in_reply_to":"1f26e07b_f9d80550","updated":"2024-11-12 15:27:11.000000000","message":"Ack","commit_id":"827f9026da442a20bc1c8632e53cb72f447fcd5d"},{"author":{"_account_id":1001982,"name":"Ian Thompson","email":"ianst@cadence.com","username":"ianstcdns"},"change_message_id":"8cb278fe90946e35bff179ec3bd4e70b0ee9c42b","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"9539ae34_4b2f6cd0","updated":"2024-11-13 18:05:35.000000000","message":"Thanks Henrik, looks good to me.","commit_id":"85b005bf54e7a57e44e3e12430a9774ad2994948"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"4e8f7e3d75edaa5a5f6e0f70ea1a2919de122f4c","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"f00ee6d1_71763af4","updated":"2024-11-15 13:38:27.000000000","message":"Thanks!","commit_id":"85b005bf54e7a57e44e3e12430a9774ad2994948"}],"src/target/xtensa/xtensa.c":[{"author":{"_account_id":1001982,"name":"Ian Thompson","email":"ianst@cadence.com","username":"ianstcdns"},"change_message_id":"a7d3c8c9cdd7a07a9e10db4ab90d3e642d553ebe","unresolved":true,"context_lines":[{"line_number":1792,"context_line":"\t\t\t/* Update ICOUNTLEVEL accordingly */"},{"line_number":1793,"context_line":"\t\t\ticountlvl \u003d MIN((oldps \u0026 0xF) + 1, xtensa-\u003ecore_config-\u003edebug.irq_level);"},{"line_number":1794,"context_line":"\t\t} else {"},{"line_number":1795,"context_line":"\t\t\t/* Disable interrupts while stepping */"},{"line_number":1796,"context_line":"\t\t\txtensa_reg_val_t newps \u003d oldps | XT_PS_DI_MSK;"},{"line_number":1797,"context_line":"\t\t\txtensa_reg_set(target, XT_REG_IDX_PS, newps);"},{"line_number":1798,"context_line":"\t\t\ticountlvl \u003d xtensa-\u003ecore_config-\u003edebug.irq_level;"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"61973f70_ee20589a","line":1795,"updated":"2024-11-12 15:27:11.000000000","message":"The LX and NX implementations of masking interrupts during step are slightly different:\n- LX uses ICOUNTLEVEL which allows an interrupt to still be triggered and handled during stepping, which will not be visible to the debug session.\n- NX does not have this feature, and instead disables interrupts during stepping, which could change the timing of the system while under debug.\n\nCould you please leave a comment that clarifies this difference?  \n\nAt some point in the future, the intention was to add an official 3rd option for stepping_isr_mode to separate these behaviors, but that is beyond the scope of this patch.","commit_id":"827f9026da442a20bc1c8632e53cb72f447fcd5d"},{"author":{"_account_id":1001982,"name":"Ian Thompson","email":"ianst@cadence.com","username":"ianstcdns"},"change_message_id":"8cb278fe90946e35bff179ec3bd4e70b0ee9c42b","unresolved":false,"context_lines":[{"line_number":1792,"context_line":"\t\t\t/* Update ICOUNTLEVEL accordingly */"},{"line_number":1793,"context_line":"\t\t\ticountlvl \u003d MIN((oldps \u0026 0xF) + 1, xtensa-\u003ecore_config-\u003edebug.irq_level);"},{"line_number":1794,"context_line":"\t\t} else {"},{"line_number":1795,"context_line":"\t\t\t/* Disable interrupts while stepping */"},{"line_number":1796,"context_line":"\t\t\txtensa_reg_val_t newps \u003d oldps | XT_PS_DI_MSK;"},{"line_number":1797,"context_line":"\t\t\txtensa_reg_set(target, XT_REG_IDX_PS, newps);"},{"line_number":1798,"context_line":"\t\t\ticountlvl \u003d xtensa-\u003ecore_config-\u003edebug.irq_level;"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"4e1e44d9_14138ff1","line":1795,"in_reply_to":"61973f70_ee20589a","updated":"2024-11-13 18:05:35.000000000","message":"Ack","commit_id":"827f9026da442a20bc1c8632e53cb72f447fcd5d"}]}