)]}'
{"/PATCHSET_LEVEL":[{"author":{"_account_id":1002298,"name":"Marek Kraus","email":"gamelaster@outlook.com","username":"gamelaster"},"change_message_id":"1d095b27e2c900c434d40240913e2888e672984b","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":3,"id":"fa5e0585_0caa36ec","updated":"2024-12-20 13:47:19.000000000","message":"Tomas, thank you for feedback. Additionally to addressing the all change requests, there is one thing I found and need to be solved.\nIn the end, I figured out, that whole JTAG is reset as well, and the current implementation works, only because just having \"luck\" in terms of how fast chip boots up, how fast is adapter, and how JTAG works.\nEven on Monday I implemented some new stuff, which improved reliability much more, still it needs more testing.\n\nThe issue is, that everything is reset, JTAG (Debug Module) as well, even it should not. So after triggering the chip reset, OpenOCD needs to try to talk with JTAG periodically immediately, even when it\u0027s not available, and when chip\u0027s JTAG will start to answer, halt the core. My new method works on both fast and slow adapters, just it needs different timing pre chip series, so we can halt the chip in the BootROM, before executing the app. Right now, I don\u0027t see any other, more reliable way of performing reset, which really resets the whole chip, not only some parts of it.\nBefore sending the new method here, I want to perform some more test and analysis, to have exact data and most-tuned reset method.\n\nI don\u0027t think this is first time that chip have not correctly working reset mechanism, so please, if you have any better ideas which I can try to implement (or anything else), anything would be greatly appreciated. Thanks!","commit_id":"63988993ec9393304cdddf38b352ed5a8edde485"},{"author":{"_account_id":1002298,"name":"Marek Kraus","email":"gamelaster@outlook.com","username":"gamelaster"},"change_message_id":"de095d05c0b83f820fcf46cf83c7f475429cd7b6","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":3,"id":"30f9de35_13a39b59","in_reply_to":"9db9dca2_0b433186","updated":"2025-01-03 14:42:48.000000000","message":"Done","commit_id":"63988993ec9393304cdddf38b352ed5a8edde485"},{"author":{"_account_id":1002298,"name":"Marek Kraus","email":"gamelaster@outlook.com","username":"gamelaster"},"change_message_id":"637a062c70c1bc943c6d6588f261932e4284c4a1","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":3,"id":"9db9dca2_0b433186","in_reply_to":"b5f43426_3673c76b","updated":"2024-12-20 14:18:04.000000000","message":"Yes, it is possible to halt the core in BootROM, but it\u0027s time sensitive. Right now, my not yet pushed code works halts in BootROM approx. 9 times successfully from 10 attempts. Tested with slow adapter, so fast adapter should have even better results, which I plan to test soon.\n\nI want to ask, would be reset mechanism with such success rate suitable for merging? I will do more tests and improvements, but I am worried that with this kind of solution, it will be never 100% reliable, as every millisecond matters.\n\nThanks.","commit_id":"63988993ec9393304cdddf38b352ed5a8edde485"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"949923addba04ab722ba9da9f44ae2695dd26904","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":3,"id":"b5f43426_3673c76b","in_reply_to":"fa5e0585_0caa36ec","updated":"2024-12-20 14:10:08.000000000","message":"\u003e I don\u0027t think this is first time that chip have not correctly working reset mechanism, so please, if you have any better ideas which I can try to implement (or anything else), anything would be greatly appreciated. Thanks!\n\nOh yes, there are lot of chips with screwed reset circuitry. Unfortunately there is no universal solution, one always needs some luck and lot of testing to make an workaround. The only general advice is to avoid using such chips. But it\u0027s probably not not what you want to hear...\n\nBTW: It\u0027s possible to halt the core in BootROM? Then setting a bp to flash app start could help, couldn\u0027t it?","commit_id":"63988993ec9393304cdddf38b352ed5a8edde485"},{"author":{"_account_id":1002298,"name":"Marek Kraus","email":"gamelaster@outlook.com","username":"gamelaster"},"change_message_id":"de095d05c0b83f820fcf46cf83c7f475429cd7b6","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":4,"id":"765f36e5_a32a3d25","updated":"2025-01-03 14:42:48.000000000","message":"Dear maintainers, firstly I would like to wish you happy new year, I hope you had good holidays. I unfortunately got sick, so I couldn\u0027t work on this patch series.\n\nTo the topic, I reworked the reset mechanism *again*, this time it should be the best as it\u0027s possible to do so. Thus, it\u0027s assured that chip after reset stays in BootROM, until JTAG adapter re-attach, no matter how fast the adapter is. The reset is triggered manually by DMI commands, so there is no error message to be \"bypassed\".\n\nIt was tested on both fast and slow adapters across all supported chip series, and works perfectly.","commit_id":"123cfe36b8bdd63ffe7fee33df2d1f00f753008d"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"8370c5a2504b215069015d14e10068afc7fccdb7","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":4,"id":"60aaa2e2_499351bb","updated":"2025-02-13 10:01:20.000000000","message":"Only one comment below. For the rest all looks ok. Thanks","commit_id":"123cfe36b8bdd63ffe7fee33df2d1f00f753008d"},{"author":{"_account_id":1000853,"name":"Marc Schink","display_name":"Marc Schink","email":"dev@zapb.de","username":"zapb"},"change_message_id":"bc44c5261c384ae65c7b4087697586fad91d5944","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":4,"id":"b1153b5f_e01bc2c8","updated":"2025-02-05 19:32:41.000000000","message":"Unfortunately I don\u0027t have this target to test this patch.\n\nTomas, Antonio?","commit_id":"123cfe36b8bdd63ffe7fee33df2d1f00f753008d"},{"author":{"_account_id":1002298,"name":"Marek Kraus","email":"gamelaster@outlook.com","username":"gamelaster"},"change_message_id":"392a34e4807dc0c2ad875b3c96688ac31b5f3eb8","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":4,"id":"8a474c05_697082c8","in_reply_to":"1b214e4f_ddcb1c5f","updated":"2025-02-15 09:36:04.000000000","message":"On initial check out of the patch, I thought there is some relevance, but after longer thinking, it is not related in this case. Current reset mechanism is always halting CPU to do cleanups and preparations for proper boot up of the chip after reset, and resume the chip on de-assert if it was reset without halt.","commit_id":"123cfe36b8bdd63ffe7fee33df2d1f00f753008d"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"93e96d6a9bdd69c7bafb65d4d27d621741433b57","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":4,"id":"1b214e4f_ddcb1c5f","in_reply_to":"b1153b5f_e01bc2c8","updated":"2025-02-06 19:36:42.000000000","message":"Neither do I.\n\nI wonder if there is some relevance with 8725: target/riscv: make sure target is halted when reset_halt is set | https://review.openocd.org/c/openocd/+/8725\nor https://github.com/riscv-collab/riscv-openocd/pull/1214\nProbably not.\n\nLooks good to me.","commit_id":"123cfe36b8bdd63ffe7fee33df2d1f00f753008d"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"d6938ba9396b83aae68ae9510ace6c9ead4a3f47","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":5,"id":"8f7cedae_49316c66","updated":"2025-02-16 16:55:20.000000000","message":"Thanks!","commit_id":"137d1e5084c7a2257b99d512a90410ad9b16bdd7"}],"tcl/target/bl602_common.cfg":[{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"189f00b32deccf7dedc6a340ff7853dcc4fbd02d","unresolved":true,"context_lines":[{"line_number":85,"context_line":"\tset attempt 0"},{"line_number":86,"context_line":""},{"line_number":87,"context_line":"\t# In Debug Module Control (dmcontrol), set dmactive to 1"},{"line_number":88,"context_line":"\tset dmcontrol_value 0x00000001"},{"line_number":89,"context_line":"\tif {$_RESETMODE !\u003d \"run\"} {"},{"line_number":90,"context_line":"\t\t# In Debug Module Control (dmcontrol), set haltreq and dmactive to 1"},{"line_number":91,"context_line":"\t\tset dmcontrol_value 0x80000001"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"e780eae4_e700c4d8","line":88,"updated":"2024-12-17 15:16:28.000000000","message":"You may get inspired how to use Tcl variables to make DM registers and bits more readable\nhttps://review.openocd.org/c/openocd/+/6957/3/tcl/target/gd32vf103.cfg#58","commit_id":"c11064d30bcb715e685042485bdbb9c16e35a819"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"11b4b27253387fb5c629aee4ec680b505e7beb13","unresolved":false,"context_lines":[{"line_number":85,"context_line":"\tset attempt 0"},{"line_number":86,"context_line":""},{"line_number":87,"context_line":"\t# In Debug Module Control (dmcontrol), set dmactive to 1"},{"line_number":88,"context_line":"\tset dmcontrol_value 0x00000001"},{"line_number":89,"context_line":"\tif {$_RESETMODE !\u003d \"run\"} {"},{"line_number":90,"context_line":"\t\t# In Debug Module Control (dmcontrol), set haltreq and dmactive to 1"},{"line_number":91,"context_line":"\t\tset dmcontrol_value 0x80000001"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"1333e192_676a6572","line":88,"in_reply_to":"e780eae4_e700c4d8","updated":"2024-12-17 19:12:38.000000000","message":"Done","commit_id":"c11064d30bcb715e685042485bdbb9c16e35a819"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"189f00b32deccf7dedc6a340ff7853dcc4fbd02d","unresolved":true,"context_lines":[{"line_number":100,"context_line":"\t\t\tbreak"},{"line_number":101,"context_line":"\t\t}"},{"line_number":102,"context_line":""},{"line_number":103,"context_line":"\t\tset attempt [expr {$attempt + 1}]"},{"line_number":104,"context_line":"\t\tif {$attempt \u003e\u003d 20} {"},{"line_number":105,"context_line":"\t\t\terror \"Failed to halt CPU after reset. Your JTAG adapter might be too slow.\""},{"line_number":106,"context_line":"\t\t}"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"494e9e95_e78c2107","line":103,"range":{"start_line":103,"start_character":2,"end_line":103,"end_character":35},"updated":"2024-12-17 15:16:28.000000000","message":"`incr attempt`\n;-)","commit_id":"c11064d30bcb715e685042485bdbb9c16e35a819"},{"author":{"_account_id":1002298,"name":"Marek Kraus","email":"gamelaster@outlook.com","username":"gamelaster"},"change_message_id":"1d095b27e2c900c434d40240913e2888e672984b","unresolved":false,"context_lines":[{"line_number":100,"context_line":"\t\t\tbreak"},{"line_number":101,"context_line":"\t\t}"},{"line_number":102,"context_line":""},{"line_number":103,"context_line":"\t\tset attempt [expr {$attempt + 1}]"},{"line_number":104,"context_line":"\t\tif {$attempt \u003e\u003d 20} {"},{"line_number":105,"context_line":"\t\t\terror \"Failed to halt CPU after reset. Your JTAG adapter might be too slow.\""},{"line_number":106,"context_line":"\t\t}"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"5acce95a_5282484a","line":103,"range":{"start_line":103,"start_character":2,"end_line":103,"end_character":35},"in_reply_to":"494e9e95_e78c2107","updated":"2024-12-20 13:47:19.000000000","message":"Ah, thanks :D ! I used old while loop tcl example.","commit_id":"c11064d30bcb715e685042485bdbb9c16e35a819"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"11b4b27253387fb5c629aee4ec680b505e7beb13","unresolved":true,"context_lines":[{"line_number":104,"context_line":"\t\t\tbreak"},{"line_number":105,"context_line":"\t\t}"},{"line_number":106,"context_line":""},{"line_number":107,"context_line":"\t\tincr $attempt"},{"line_number":108,"context_line":"\t\tif {$attempt \u003e\u003d 20} {"},{"line_number":109,"context_line":"\t\t\terror \"Failed to halt CPU after reset. Your JTAG adapter might be too slow.\""},{"line_number":110,"context_line":"\t\t}"}],"source_content_type":"text/x-ttcn-cfg","patch_set":3,"id":"b51da577_f98454a1","line":107,"range":{"start_line":107,"start_character":7,"end_line":107,"end_character":8},"updated":"2024-12-17 19:12:38.000000000","message":"Var name only, without $","commit_id":"63988993ec9393304cdddf38b352ed5a8edde485"},{"author":{"_account_id":1002298,"name":"Marek Kraus","email":"gamelaster@outlook.com","username":"gamelaster"},"change_message_id":"de095d05c0b83f820fcf46cf83c7f475429cd7b6","unresolved":false,"context_lines":[{"line_number":104,"context_line":"\t\t\tbreak"},{"line_number":105,"context_line":"\t\t}"},{"line_number":106,"context_line":""},{"line_number":107,"context_line":"\t\tincr $attempt"},{"line_number":108,"context_line":"\t\tif {$attempt \u003e\u003d 20} {"},{"line_number":109,"context_line":"\t\t\terror \"Failed to halt CPU after reset. Your JTAG adapter might be too slow.\""},{"line_number":110,"context_line":"\t\t}"}],"source_content_type":"text/x-ttcn-cfg","patch_set":3,"id":"60187ab4_15d9b138","line":107,"range":{"start_line":107,"start_character":7,"end_line":107,"end_character":8},"in_reply_to":"acaada90_b203345f","updated":"2025-01-03 14:42:48.000000000","message":"Done","commit_id":"63988993ec9393304cdddf38b352ed5a8edde485"},{"author":{"_account_id":1002298,"name":"Marek Kraus","email":"gamelaster@outlook.com","username":"gamelaster"},"change_message_id":"1d095b27e2c900c434d40240913e2888e672984b","unresolved":true,"context_lines":[{"line_number":104,"context_line":"\t\t\tbreak"},{"line_number":105,"context_line":"\t\t}"},{"line_number":106,"context_line":""},{"line_number":107,"context_line":"\t\tincr $attempt"},{"line_number":108,"context_line":"\t\tif {$attempt \u003e\u003d 20} {"},{"line_number":109,"context_line":"\t\t\terror \"Failed to halt CPU after reset. Your JTAG adapter might be too slow.\""},{"line_number":110,"context_line":"\t\t}"}],"source_content_type":"text/x-ttcn-cfg","patch_set":3,"id":"acaada90_b203345f","line":107,"range":{"start_line":107,"start_character":7,"end_line":107,"end_character":8},"in_reply_to":"b51da577_f98454a1","updated":"2024-12-20 13:47:19.000000000","message":"Ah yes, I noticed that almost right after sending the patch. I tested it, and it worked, but well, it didn\u0027t what it supposed to do. Sorry!","commit_id":"63988993ec9393304cdddf38b352ed5a8edde485"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"8370c5a2504b215069015d14e10068afc7fccdb7","unresolved":true,"context_lines":[{"line_number":139,"context_line":"\tglobal _RESETMODE"},{"line_number":140,"context_line":""},{"line_number":141,"context_line":"\t# Resume the processor if reset was triggered without halt request"},{"line_number":142,"context_line":"\tif {$_RESETMODE \u003d\u003d \"run\"} {"},{"line_number":143,"context_line":"\t\triscv dmi_write $::dmcontrol [ expr {$::dmcontrol_dmactive | $::dmcontrol_resumereq} ]"},{"line_number":144,"context_line":"\t}"},{"line_number":145,"context_line":"}"}],"source_content_type":"text/x-ttcn-cfg","patch_set":4,"id":"49f0ddfc_ad04b734","line":142,"updated":"2025-02-13 10:01:20.000000000","message":"In the events reset-xxx there is the variable `$halt` that is `1` for `reset halt` and `reset init`, while it\u0027s `0` for `reset` and `reset run`.\nI have never investigated if it is a bug or a feature but, since these events are called by `proc ocd_process_reset_inner` that sets `$halt`, the events inherit the variables of the caller.\n\nUsing `$halt` here makes useless overriding `proc init_reset`","commit_id":"123cfe36b8bdd63ffe7fee33df2d1f00f753008d"},{"author":{"_account_id":1002298,"name":"Marek Kraus","email":"gamelaster@outlook.com","username":"gamelaster"},"change_message_id":"392a34e4807dc0c2ad875b3c96688ac31b5f3eb8","unresolved":false,"context_lines":[{"line_number":139,"context_line":"\tglobal _RESETMODE"},{"line_number":140,"context_line":""},{"line_number":141,"context_line":"\t# Resume the processor if reset was triggered without halt request"},{"line_number":142,"context_line":"\tif {$_RESETMODE \u003d\u003d \"run\"} {"},{"line_number":143,"context_line":"\t\triscv dmi_write $::dmcontrol [ expr {$::dmcontrol_dmactive | $::dmcontrol_resumereq} ]"},{"line_number":144,"context_line":"\t}"},{"line_number":145,"context_line":"}"}],"source_content_type":"text/x-ttcn-cfg","patch_set":4,"id":"e23c930a_f421e612","line":142,"in_reply_to":"200fbcd5_feb46b26","updated":"2025-02-15 09:36:04.000000000","message":"Oh! I did not knew about existence of this variable. This is indeed much better solution, and it looks way better after implementing it. Thanks :)","commit_id":"123cfe36b8bdd63ffe7fee33df2d1f00f753008d"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"2c574b8265fa064d0ab10f29cef4906ef47ed11a","unresolved":true,"context_lines":[{"line_number":139,"context_line":"\tglobal _RESETMODE"},{"line_number":140,"context_line":""},{"line_number":141,"context_line":"\t# Resume the processor if reset was triggered without halt request"},{"line_number":142,"context_line":"\tif {$_RESETMODE \u003d\u003d \"run\"} {"},{"line_number":143,"context_line":"\t\triscv dmi_write $::dmcontrol [ expr {$::dmcontrol_dmactive | $::dmcontrol_resumereq} ]"},{"line_number":144,"context_line":"\t}"},{"line_number":145,"context_line":"}"}],"source_content_type":"text/x-ttcn-cfg","patch_set":4,"id":"200fbcd5_feb46b26","line":142,"in_reply_to":"49f0ddfc_ad04b734","updated":"2025-02-13 10:37:03.000000000","message":"OMG, this is a good catch. Lot of configs do exactly the same and all authors including me just copied \u0026 pasted it. I will check init_reset overrides in the existing Tcl configs (found 9 occurrences)","commit_id":"123cfe36b8bdd63ffe7fee33df2d1f00f753008d"}]}