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Additionally,\nwe trigger SW Reset by directly using DMI commands to write to register\nwith system bus method, to avoid getting error about unsuccessful write.\nThe new method works on both FT232H (8MHz JTAG clock) and\nunnamed CMSIS-DAP dongle (1.5MHz JTAG clock).\n\nChange-Id: I5be3694927793fd3f64c9ed4ee6ded2db0d25cae\nSigned-off-by: Marek Kraus \u003cgamelaster@outlook.com\u003e\n"},"description":"Reworked reset mechanism"},"137d1e5084c7a2257b99d512a90410ad9b16bdd7":{"kind":"REWORK","_number":5,"created":"2025-02-15 09:17:27.000000000","uploader":{"_account_id":1002298,"name":"Marek Kraus","email":"gamelaster@outlook.com","username":"gamelaster"},"ref":"refs/changes/93/8593/5","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/93/8593/5","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/5 \u0026\u0026 git checkout -b change-8593 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/5 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/5 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/5 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/93/8593/5","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/5 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"133dd9d669e5b8beb7c7787b0be677621808e72d","subject":"target/xtensa: add maskisr command support for NX"}],"author":{"name":"Marek Kraus","email":"gamelaster@outlook.com","date":"2024-11-23 14:54:26.000000000","tz":60},"committer":{"name":"Marek Kraus","email":"gamelaster@outlook.com","date":"2025-02-15 09:11:35.000000000","tz":60},"subject":"tcl/target: add Bouffalo Lab BL602 and BL702L chip series support","message":"tcl/target: add Bouffalo Lab BL602 and BL702L chip series support\n\nBL602, BL702 and BL702L series of chips are sharing same architecture,\nso they all need same software reset mechanism as well.\nOnly difference (in terms of configuration needed for JTAG) are TAP ID,\nworkarea address and size. This is addressed by creating bl602_common.cfg\ntcl file, which contains all those common stuff between the chips.\nThe script is prefixed by bl602, as this was\nfirst *publicly* available chip from Bouffalo with this architecture.\n\nThis patch also improves reset mechanism. Previous reset mechanism did not\nworked properly when slower JTAG adapter was used (it attached too late).\nNew reset mechanism uses various methods to keep CPU in BootROM, until\nthe JTAG adapter does not attach again after reset. Additionally,\nwe trigger SW Reset by directly using DMI commands to write to register\nwith system bus method, to avoid getting error about unsuccessful write.\nThe new method works on both FT232H (8MHz JTAG clock) and\nunnamed CMSIS-DAP dongle (1.5MHz JTAG clock).\n\nChange-Id: I5be3694927793fd3f64c9ed4ee6ded2db0d25cae\nSigned-off-by: Marek Kraus \u003cgamelaster@outlook.com\u003e\n"},"description":"Use halt var instead of ugly workaround"},"c986b4dbf2ff81753adcd0235954cfd577831672":{"kind":"REWORK","_number":6,"created":"2025-03-01 15:11:33.000000000","uploader":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"ref":"refs/changes/93/8593/6","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/93/8593/6","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/6 \u0026\u0026 git checkout -b change-8593 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/6 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/6 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/6 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/93/8593/6","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/6 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"e1425845ea32713924cbfdfc9a328c6eb774f11f","subject":"target: algorithm: change reg_name to const in init_reg_param()"}],"author":{"name":"Marek Kraus","email":"gamelaster@outlook.com","date":"2024-11-23 14:54:26.000000000","tz":60},"committer":{"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","date":"2025-03-01 15:11:33.000000000","tz":0},"subject":"tcl/target: add Bouffalo Lab BL602 and BL702L chip series support","message":"tcl/target: add Bouffalo Lab BL602 and BL702L chip series support\n\nBL602, BL702 and BL702L series of chips are sharing same architecture,\nso they all need same software reset mechanism as well.\nOnly difference (in terms of configuration needed for JTAG) are TAP ID,\nworkarea address and size. This is addressed by creating bl602_common.cfg\ntcl file, which contains all those common stuff between the chips.\nThe script is prefixed by bl602, as this was\nfirst *publicly* available chip from Bouffalo with this architecture.\n\nThis patch also improves reset mechanism. Previous reset mechanism did not\nworked properly when slower JTAG adapter was used (it attached too late).\nNew reset mechanism uses various methods to keep CPU in BootROM, until\nthe JTAG adapter does not attach again after reset. Additionally,\nwe trigger SW Reset by directly using DMI commands to write to register\nwith system bus method, to avoid getting error about unsuccessful write.\nThe new method works on both FT232H (8MHz JTAG clock) and\nunnamed CMSIS-DAP dongle (1.5MHz JTAG clock).\n\nChange-Id: I5be3694927793fd3f64c9ed4ee6ded2db0d25cae\nSigned-off-by: Marek Kraus \u003cgamelaster@outlook.com\u003e\nReviewed-on: https://review.openocd.org/c/openocd/+/8593\nTested-by: jenkins\nReviewed-by: Antonio Borneo \u003cborneo.antonio@gmail.com\u003e\n"}},"422513303fdb69e9659e0b47f6a6be18a63d650a":{"kind":"REWORK","_number":1,"created":"2024-11-23 17:57:40.000000000","uploader":{"_account_id":1002298,"name":"Marek Kraus","email":"gamelaster@outlook.com","username":"gamelaster"},"ref":"refs/changes/93/8593/1","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/93/8593/1","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/1 \u0026\u0026 git checkout -b change-8593 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/1 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/1 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/1 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/93/8593/1","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/1 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"133dd9d669e5b8beb7c7787b0be677621808e72d","subject":"target/xtensa: add maskisr command support for NX"}],"author":{"name":"Marek Kraus","email":"gamelaster@outlook.com","date":"2024-11-23 14:54:26.000000000","tz":60},"committer":{"name":"Marek Kraus","email":"gamelaster@outlook.com","date":"2024-11-23 17:48:39.000000000","tz":60},"subject":"tcl/target: add Bouffalo Lab BL602 and BL702L chip series support","message":"tcl/target: add Bouffalo Lab BL602 and BL702L chip series support\n\nBL602, BL702 and BL702L series of chips are sharing same architecture,\nso they all need same software reset mechanism as well.\nOnly difference (in terms of configuration needed for JTAG) are TAP ID,\nworkarea address and size. This is addressed by creating bl602_common.cfg\ntcl file, which contains all those common stuff between the chips.\nThe script is prefixed by bl602, as this was\nfirst *publicly* available chip from Bouffalo with this architecture.\n\nChange-Id: I5be3694927793fd3f64c9ed4ee6ded2db0d25cae\nSigned-off-by: Marek Kraus \u003cgamelaster@outlook.com\u003e\n"}},"c11064d30bcb715e685042485bdbb9c16e35a819":{"kind":"REWORK","_number":2,"created":"2024-12-16 22:19:32.000000000","uploader":{"_account_id":1002298,"name":"Marek Kraus","email":"gamelaster@outlook.com","username":"gamelaster"},"ref":"refs/changes/93/8593/2","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/93/8593/2","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/2 \u0026\u0026 git checkout -b change-8593 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/2 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/2 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/2 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/93/8593/2","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/2 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"133dd9d669e5b8beb7c7787b0be677621808e72d","subject":"target/xtensa: add maskisr command support for NX"}],"author":{"name":"Marek Kraus","email":"gamelaster@outlook.com","date":"2024-11-23 14:54:26.000000000","tz":60},"committer":{"name":"Marek Kraus","email":"gamelaster@outlook.com","date":"2024-12-16 21:51:38.000000000","tz":60},"subject":"tcl/target: add Bouffalo Lab BL602 and BL702L chip series support","message":"tcl/target: add Bouffalo Lab BL602 and BL702L chip series support\n\nBL602, BL702 and BL702L series of chips are sharing same architecture,\nso they all need same software reset mechanism as well.\nOnly difference (in terms of configuration needed for JTAG) are TAP ID,\nworkarea address and size. This is addressed by creating bl602_common.cfg\ntcl file, which contains all those common stuff between the chips.\nThe script is prefixed by bl602, as this was\nfirst *publicly* available chip from Bouffalo with this architecture.\n\nThis patch also improves reset mechanism. It triggers SW Reset by directly\nusing DMI commands to write to register with system bus method,\nto avoid getting error message about unsuccessful write.\nPrevious reset mechanism did not worked properly when slower JTAG adapter\nwas used. The new method fixes this.\nIt works on both FT232H (8MHz JTAG clock) and\nunnamed CMSIS-DAP dongle (1.5MHz JTAG clock).\n\nChange-Id: I5be3694927793fd3f64c9ed4ee6ded2db0d25cae\nSigned-off-by: Marek Kraus \u003cgamelaster@outlook.com\u003e\n"},"description":"Improve reset mechanism"},"63988993ec9393304cdddf38b352ed5a8edde485":{"kind":"REWORK","_number":3,"created":"2024-12-17 19:01:05.000000000","uploader":{"_account_id":1002298,"name":"Marek Kraus","email":"gamelaster@outlook.com","username":"gamelaster"},"ref":"refs/changes/93/8593/3","fetch":{"anonymous http":{"url":"https://review.openocd.org/openocd","ref":"refs/changes/93/8593/3","commands":{"Branch":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/3 \u0026\u0026 git checkout -b change-8593 FETCH_HEAD","Checkout":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/3 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/3 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/3 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.openocd.org/openocd refs/changes/93/8593/3","Reset To":"git fetch https://review.openocd.org/openocd refs/changes/93/8593/3 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"133dd9d669e5b8beb7c7787b0be677621808e72d","subject":"target/xtensa: add maskisr command support for NX"}],"author":{"name":"Marek Kraus","email":"gamelaster@outlook.com","date":"2024-11-23 14:54:26.000000000","tz":60},"committer":{"name":"Marek Kraus","email":"gamelaster@outlook.com","date":"2024-12-17 18:59:39.000000000","tz":60},"subject":"tcl/target: add Bouffalo Lab BL602 and BL702L chip series support","message":"tcl/target: add Bouffalo Lab BL602 and BL702L chip series support\n\nBL602, BL702 and BL702L series of chips are sharing same architecture,\nso they all need same software reset mechanism as well.\nOnly difference (in terms of configuration needed for JTAG) are TAP ID,\nworkarea address and size. This is addressed by creating bl602_common.cfg\ntcl file, which contains all those common stuff between the chips.\nThe script is prefixed by bl602, as this was\nfirst *publicly* available chip from Bouffalo with this architecture.\n\nThis patch also improves reset mechanism. It triggers SW Reset by directly\nusing DMI commands to write to register with system bus method,\nto avoid getting error message about unsuccessful write.\nPrevious reset mechanism did not worked properly when slower JTAG adapter\nwas used. The new method fixes this.\nIt works on both FT232H (8MHz JTAG clock) and\nunnamed CMSIS-DAP dongle (1.5MHz JTAG clock).\n\nChange-Id: I5be3694927793fd3f64c9ed4ee6ded2db0d25cae\nSigned-off-by: Marek Kraus \u003cgamelaster@outlook.com\u003e\n"},"description":"TCL fixes and improvements"}},"requirements":[],"submit_records":[{"rule_name":"gerrit~DefaultSubmitRule","status":"CLOSED","labels":[{"label":"Verified","status":"OK","applied_by":{"_account_id":1000014,"name":"jenkins","username":"jenkins","tags":["SERVICE_USER"]}},{"label":"Code-Review","status":"OK","applied_by":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"}}]}],"submit_requirements":[{"name":"Verified","status":"SATISFIED","is_legacy":true,"submittability_expression_result":{"expression":"label:Verified\u003dMAX -label:Verified\u003dMIN","fulfilled":true,"status":"PASS","passing_atoms":["label:Verified\u003dMAX","-label:Verified\u003dMIN"],"failing_atoms":[]}},{"name":"Code-Review","status":"SATISFIED","is_legacy":true,"submittability_expression_result":{"expression":"label:Code-Review\u003dMAX -label:Code-Review\u003dMIN","fulfilled":true,"status":"PASS","passing_atoms":["label:Code-Review\u003dMAX","-label:Code-Review\u003dMIN"],"failing_atoms":[]}}]}