)]}'
{"/COMMIT_MSG":[{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"6d7dd9aed58b1a4782c5692d7080d6e93dae17b7","unresolved":true,"context_lines":[{"line_number":8,"context_line":""},{"line_number":9,"context_line":"Add new flash driver for internal flash of Microchip PIC32CZ family."},{"line_number":10,"context_line":"The CZ family is unrelated to the original PIC32\u0027s, it is an ARM"},{"line_number":11,"context_line":"Cortex 7 based MCU at the higher performance end of the Microchip"},{"line_number":12,"context_line":"MCUs. Whilst the flash controller is internally not dissimilar to"},{"line_number":13,"context_line":"the PIC32MX familiy it is sufficiently different to warrant a new"},{"line_number":14,"context_line":"flash driver implementation."}],"source_content_type":"text/x-gerrit-commit-message","patch_set":4,"id":"01a31969_bb8e7599","line":11,"range":{"start_line":11,"start_character":0,"end_line":11,"end_character":8},"updated":"2025-01-03 20:03:08.000000000","message":"Cortex-M7","commit_id":"5cf78ef4f6f898e96601b223fb3f6bb6799dad25"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"06a23d68f2d8906994d043a6904a9448cc6c386d","unresolved":false,"context_lines":[{"line_number":8,"context_line":""},{"line_number":9,"context_line":"Add new flash driver for internal flash of Microchip PIC32CZ family."},{"line_number":10,"context_line":"The CZ family is unrelated to the original PIC32\u0027s, it is an ARM"},{"line_number":11,"context_line":"Cortex 7 based MCU at the higher performance end of the Microchip"},{"line_number":12,"context_line":"MCUs. Whilst the flash controller is internally not dissimilar to"},{"line_number":13,"context_line":"the PIC32MX familiy it is sufficiently different to warrant a new"},{"line_number":14,"context_line":"flash driver implementation."}],"source_content_type":"text/x-gerrit-commit-message","patch_set":4,"id":"cf6e0e5c_8717bf3b","line":11,"range":{"start_line":11,"start_character":0,"end_line":11,"end_character":8},"in_reply_to":"01a31969_bb8e7599","updated":"2025-01-03 20:17:57.000000000","message":"Done","commit_id":"5cf78ef4f6f898e96601b223fb3f6bb6799dad25"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"6d7dd9aed58b1a4782c5692d7080d6e93dae17b7","unresolved":false,"context_lines":[{"line_number":18,"context_line":"Fix warnings from patch check script."},{"line_number":19,"context_line":""},{"line_number":20,"context_line":"Fix pic32cz.cfg to be more consistent with other cortexm7 setups."},{"line_number":21,"context_line":""},{"line_number":22,"context_line":"Change-Id: I84fb1eb33240e1824f2f53771c854a286a01f11a"},{"line_number":23,"context_line":"Signed-off-by: Andrew Shelley \u003candrewjohnshelley@gmail.com\u003e"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":4,"id":"20267864_625acbf3","line":21,"updated":"2025-01-03 20:03:08.000000000","message":"Adding comments about each patch update step is not necessary, we keep that history in gerrit.","commit_id":"5cf78ef4f6f898e96601b223fb3f6bb6799dad25"}],"/PATCHSET_LEVEL":[{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"61773be7b1db48386e883287de3bb3295c3cea01","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":1,"id":"baca216a_cabb3e02","updated":"2025-01-02 19:27:54.000000000","message":"Andrew, thanks for the contributed code!","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"ad57bad04f8d9d9be2c19623d5c153205307dc7e","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"6d6f1de4_cf5c31a7","updated":"2025-01-03 11:53:55.000000000","message":"Please run `tools/checkpatch.sh` locally after you prepared the commit and before `git push review`","commit_id":"f30e29083d158ac082030e4aa1d9c0184657c35a"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"c5bdd9d29162d6a0bb39b08bedf02209f84c4d08","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"0c30793e_63833e1d","in_reply_to":"6d6f1de4_cf5c31a7","updated":"2025-01-03 19:40:58.000000000","message":"Yes I completely forget to do that, still learning the ropes. Now done and I\u0027ve also addressed the cfg file changes. I think I\u0027m done with changes for this round.","commit_id":"f30e29083d158ac082030e4aa1d9c0184657c35a"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"c5bdd9d29162d6a0bb39b08bedf02209f84c4d08","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":4,"id":"9a3d88a5_32f51400","updated":"2025-01-03 19:40:58.000000000","message":"Took me a while to work out the draft comments needed publishing!","commit_id":"5cf78ef4f6f898e96601b223fb3f6bb6799dad25"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"680611cd970f2414687df438f508793e1addc8b4","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":5,"id":"34bd3383_312f3c84","updated":"2025-01-03 20:16:30.000000000","message":"Be tomorrow now for the configuration file cleanup, thanks.","commit_id":"9495054c8ba63e22ccf3528e043975c466476b7e"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"06a23d68f2d8906994d043a6904a9448cc6c386d","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":5,"id":"daa58e6f_72c2dd0a","updated":"2025-01-03 20:17:57.000000000","message":"Fixed Comment.","commit_id":"9495054c8ba63e22ccf3528e043975c466476b7e"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"a6c22a51aed09af399783807f7c4e94eba49a21c","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":5,"id":"0ba21149_0bbe69fc","updated":"2025-01-03 20:12:01.000000000","message":"Fixed the changes for the pic32cz.c file","commit_id":"9495054c8ba63e22ccf3528e043975c466476b7e"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"74614fa77cf4d301ca7ff635ff880c2c746657c1","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":10,"id":"3db5a377_10671cf7","updated":"2025-01-05 14:54:06.000000000","message":"Further work with the PIC32CZ has shown that the boot flash memory (BFM) is locked by default. I have implemented the protect and protect_check methods in the flash driver to allow the protection to be controlled/reported and programmes loaded into BFM for debug. I was previously vectoring directly to PFM.\n\nI am not sure where responsibility lies for unlocking the BFM in a user environment. In my own work I have opted to add the \"flash protect 0 0 last off\" to GDB in my VS code launch scripts. Let me know if I am expected to implement a more automated mechanism directly in the OpenOCD flash driver.\n\nThere are also further complications around interactive boot modes, panel swapping and debugger probe authentication but I\u0027ll address those if and when they become blockers and hopefully not in this submission.","commit_id":"545a105efdb7848edf01a0b1b6eb33dee06fc331"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"03850b065d60da431bbc5c6a12c5d62881051da5","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":10,"id":"59994030_eadb53a6","updated":"2025-01-05 21:39:18.000000000","message":"Please add the driver description to doc/openocd.texi section Flash Driver List subsection Internal Flash (Microcontrollers).\n\nAlso document that BFM protection setting is volatile.","commit_id":"545a105efdb7848edf01a0b1b6eb33dee06fc331"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"03850b065d60da431bbc5c6a12c5d62881051da5","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":10,"id":"cb40a10b_5c6177b0","in_reply_to":"3db5a377_10671cf7","updated":"2025-01-05 21:39:18.000000000","message":"\u003e I have implemented the protect and protect_check methods in the flash driver to allow the protection to be controlled/reported and programmes loaded into BFM for debug. I was previously vectoring directly to PFM.\n\nOpenOCD `flash protect` command usually handles non-volatile protection.\nI have no objections if you clearly document that this flash\ndoesn\u0027t implement non-volatile protection and protection setting\nis valid until reset/power cycle.\nPerhaps add a LOG_WARNING to `pic32cz_protect` briefly reminding this.\n \n\u003e I am not sure where responsibility lies for unlocking the BFM in a user environment. In my own work I have opted to add the \"flash protect 0 0 last off\" to GDB in my VS code launch scripts. Let me know if I am expected to implement a more automated mechanism directly in the OpenOCD flash driver.\n\nIt\u0027s just fine from OpenOCD user perspective (not sure what IDE users would want).","commit_id":"545a105efdb7848edf01a0b1b6eb33dee06fc331"}],"src/flash/nor/pic32cz.c":[{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"61773be7b1db48386e883287de3bb3295c3cea01","unresolved":true,"context_lines":[{"line_number":88,"context_line":"\t\tuint16_t manufacturer \u003d (id \u003e\u003e 1) \u0026 0x7FF;"},{"line_number":89,"context_line":"\t\tif (product \u003d\u003d 0x92 \u0026\u0026 manufacturer \u003d\u003d 0x29) {"},{"line_number":90,"context_line":"\t\t\tuint8_t devsel \u003d (id \u003e\u003e 12) \u0026 0xFF;"},{"line_number":91,"context_line":"\t\t\tfor (unsigned long i \u003d 0; i \u003c ARRAY_SIZE(pic32cz_known_chips); i++) {"},{"line_number":92,"context_line":"\t\t\t\tif (pic32cz_known_chips[i].devsel \u003d\u003d devsel)"},{"line_number":93,"context_line":"\t\t\t\t\treturn \u0026pic32cz_known_chips[i];"},{"line_number":94,"context_line":"\t\t\t}"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"6916565d_8bfa90dc","line":91,"range":{"start_line":91,"start_character":17,"end_line":91,"end_character":21},"updated":"2025-01-02 19:27:54.000000000","message":"int?","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"c5bdd9d29162d6a0bb39b08bedf02209f84c4d08","unresolved":false,"context_lines":[{"line_number":88,"context_line":"\t\tuint16_t manufacturer \u003d (id \u003e\u003e 1) \u0026 0x7FF;"},{"line_number":89,"context_line":"\t\tif (product \u003d\u003d 0x92 \u0026\u0026 manufacturer \u003d\u003d 0x29) {"},{"line_number":90,"context_line":"\t\t\tuint8_t devsel \u003d (id \u003e\u003e 12) \u0026 0xFF;"},{"line_number":91,"context_line":"\t\t\tfor (unsigned long i \u003d 0; i \u003c ARRAY_SIZE(pic32cz_known_chips); i++) {"},{"line_number":92,"context_line":"\t\t\t\tif (pic32cz_known_chips[i].devsel \u003d\u003d devsel)"},{"line_number":93,"context_line":"\t\t\t\t\treturn \u0026pic32cz_known_chips[i];"},{"line_number":94,"context_line":"\t\t\t}"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"ed28cc70_f1989c36","line":91,"range":{"start_line":91,"start_character":17,"end_line":91,"end_character":21},"in_reply_to":"6916565d_8bfa90dc","updated":"2025-01-03 19:40:58.000000000","message":"Done","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"61773be7b1db48386e883287de3bb3295c3cea01","unresolved":true,"context_lines":[{"line_number":113,"context_line":"\tuint32_t timeout \u003d (operation \u003d\u003d PIC32CZ_NVMOP_ERASE_PFM || operation \u003d\u003d PIC32CZ_NVMOP_ERASE_PAGE)"},{"line_number":114,"context_line":"\t\t? PIC32CZ_TIMEOUT_ERASE : PIC32CZ_TIMEOUT_WRITE;"},{"line_number":115,"context_line":""},{"line_number":116,"context_line":"\t// 1. Lock the hardware write mutex by setting the LOCK bit to ‘1’ and the OWNER field to ‘01’"},{"line_number":117,"context_line":"\t// simultaneously to the MUTEX register. Ensure that these bits are set correctly before proceeding,"},{"line_number":118,"context_line":"\t// if the OWNER field is not ‘01’ and the LOCK bit is ‘1’ another system has ownership of the"},{"line_number":119,"context_line":"\t// hardware write mutex and this operation must be attempted again when that system releases"},{"line_number":120,"context_line":"\t// the mutex."},{"line_number":121,"context_line":"\ttarget_write_u32(bank-\u003etarget, PIC32CZ_NVM_MUTEX, 0x3);"},{"line_number":122,"context_line":"\ttarget_read_u32(bank-\u003etarget, PIC32CZ_NVM_MUTEX, \u0026tmp);"},{"line_number":123,"context_line":"\tif (tmp !\u003d 0x3) {"},{"line_number":124,"context_line":"\t\tLOG_ERROR(\"Cannot lock hardware write mutex\");"},{"line_number":125,"context_line":"\t\treturn ERROR_FAIL;"},{"line_number":126,"context_line":"\t}"},{"line_number":127,"context_line":""},{"line_number":128,"context_line":"\t// 2.Setup ADDR and if programming either DATAx (Single/Quad) or SRCADDR (Row Write)."},{"line_number":129,"context_line":"\ttarget_write_u32(bank-\u003etarget, PIC32CZ_NVM_ADDR, addr);"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"40d068d0_86bb1716","line":126,"range":{"start_line":116,"start_character":3,"end_line":126,"end_character":2},"updated":"2025-01-02 19:27:54.000000000","message":"Factor the mutex locking out and call it once before write/erase op to speed up programming a little.\n31.2.13.2:\nOnce the NVM system is configured the only registers necessary for programming are ...","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"140f38e41009ece4912a54f200b4ab459da8fe71","unresolved":false,"context_lines":[{"line_number":113,"context_line":"\tuint32_t timeout \u003d (operation \u003d\u003d PIC32CZ_NVMOP_ERASE_PFM || operation \u003d\u003d PIC32CZ_NVMOP_ERASE_PAGE)"},{"line_number":114,"context_line":"\t\t? PIC32CZ_TIMEOUT_ERASE : PIC32CZ_TIMEOUT_WRITE;"},{"line_number":115,"context_line":""},{"line_number":116,"context_line":"\t// 1. Lock the hardware write mutex by setting the LOCK bit to ‘1’ and the OWNER field to ‘01’"},{"line_number":117,"context_line":"\t// simultaneously to the MUTEX register. Ensure that these bits are set correctly before proceeding,"},{"line_number":118,"context_line":"\t// if the OWNER field is not ‘01’ and the LOCK bit is ‘1’ another system has ownership of the"},{"line_number":119,"context_line":"\t// hardware write mutex and this operation must be attempted again when that system releases"},{"line_number":120,"context_line":"\t// the mutex."},{"line_number":121,"context_line":"\ttarget_write_u32(bank-\u003etarget, PIC32CZ_NVM_MUTEX, 0x3);"},{"line_number":122,"context_line":"\ttarget_read_u32(bank-\u003etarget, PIC32CZ_NVM_MUTEX, \u0026tmp);"},{"line_number":123,"context_line":"\tif (tmp !\u003d 0x3) {"},{"line_number":124,"context_line":"\t\tLOG_ERROR(\"Cannot lock hardware write mutex\");"},{"line_number":125,"context_line":"\t\treturn ERROR_FAIL;"},{"line_number":126,"context_line":"\t}"},{"line_number":127,"context_line":""},{"line_number":128,"context_line":"\t// 2.Setup ADDR and if programming either DATAx (Single/Quad) or SRCADDR (Row Write)."},{"line_number":129,"context_line":"\ttarget_write_u32(bank-\u003etarget, PIC32CZ_NVM_ADDR, addr);"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"cc62c430_407fc5e9","line":126,"range":{"start_line":116,"start_character":3,"end_line":126,"end_character":2},"in_reply_to":"40d068d0_86bb1716","updated":"2025-01-03 19:46:07.000000000","message":"Done","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"c5bdd9d29162d6a0bb39b08bedf02209f84c4d08","unresolved":false,"context_lines":[{"line_number":113,"context_line":"\tuint32_t timeout \u003d (operation \u003d\u003d PIC32CZ_NVMOP_ERASE_PFM || operation \u003d\u003d PIC32CZ_NVMOP_ERASE_PAGE)"},{"line_number":114,"context_line":"\t\t? PIC32CZ_TIMEOUT_ERASE : PIC32CZ_TIMEOUT_WRITE;"},{"line_number":115,"context_line":""},{"line_number":116,"context_line":"\t// 1. Lock the hardware write mutex by setting the LOCK bit to ‘1’ and the OWNER field to ‘01’"},{"line_number":117,"context_line":"\t// simultaneously to the MUTEX register. Ensure that these bits are set correctly before proceeding,"},{"line_number":118,"context_line":"\t// if the OWNER field is not ‘01’ and the LOCK bit is ‘1’ another system has ownership of the"},{"line_number":119,"context_line":"\t// hardware write mutex and this operation must be attempted again when that system releases"},{"line_number":120,"context_line":"\t// the mutex."},{"line_number":121,"context_line":"\ttarget_write_u32(bank-\u003etarget, PIC32CZ_NVM_MUTEX, 0x3);"},{"line_number":122,"context_line":"\ttarget_read_u32(bank-\u003etarget, PIC32CZ_NVM_MUTEX, \u0026tmp);"},{"line_number":123,"context_line":"\tif (tmp !\u003d 0x3) {"},{"line_number":124,"context_line":"\t\tLOG_ERROR(\"Cannot lock hardware write mutex\");"},{"line_number":125,"context_line":"\t\treturn ERROR_FAIL;"},{"line_number":126,"context_line":"\t}"},{"line_number":127,"context_line":""},{"line_number":128,"context_line":"\t// 2.Setup ADDR and if programming either DATAx (Single/Quad) or SRCADDR (Row Write)."},{"line_number":129,"context_line":"\ttarget_write_u32(bank-\u003etarget, PIC32CZ_NVM_ADDR, addr);"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"76a7446e_4c9557da","line":126,"range":{"start_line":116,"start_character":3,"end_line":126,"end_character":2},"in_reply_to":"40d068d0_86bb1716","updated":"2025-01-03 19:40:58.000000000","message":"I incorrectly thought the mutex got auto released at the end of the flash operation. I\u0027ve factored out the lock and added a corresponding unlock at the end.","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"61773be7b1db48386e883287de3bb3295c3cea01","unresolved":true,"context_lines":[{"line_number":129,"context_line":"\ttarget_write_u32(bank-\u003etarget, PIC32CZ_NVM_ADDR, addr);"},{"line_number":130,"context_line":"\tif (operation \u003d\u003d PIC32CZ_NVMOP_WRITE_QUAD) {"},{"line_number":131,"context_line":"\t\tfor (int i \u003d 0; i \u003c 32; i +\u003d 4)"},{"line_number":132,"context_line":"\t\t\ttarget_write_u32(bank-\u003etarget,"},{"line_number":133,"context_line":"\t\t\t\tPIC32CZ_NVM_DATA0 + i,"},{"line_number":134,"context_line":"\t\t\t\tdata[i] | data[i + 1] \u003c\u003c 8 | data[i + 2] \u003c\u003c 16 | data[i + 3] \u003c\u003c 24);"},{"line_number":135,"context_line":"\t}"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"241f1ef5_259f5f36","line":132,"range":{"start_line":132,"start_character":3,"end_line":132,"end_character":19},"updated":"2025-01-02 19:27:54.000000000","message":"Don\u0027t use multiple `target_write_u32()` in the cycle.\nUse one `target_write_memory()` for whole quad instead - it will be faster","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"140f38e41009ece4912a54f200b4ab459da8fe71","unresolved":false,"context_lines":[{"line_number":129,"context_line":"\ttarget_write_u32(bank-\u003etarget, PIC32CZ_NVM_ADDR, addr);"},{"line_number":130,"context_line":"\tif (operation \u003d\u003d PIC32CZ_NVMOP_WRITE_QUAD) {"},{"line_number":131,"context_line":"\t\tfor (int i \u003d 0; i \u003c 32; i +\u003d 4)"},{"line_number":132,"context_line":"\t\t\ttarget_write_u32(bank-\u003etarget,"},{"line_number":133,"context_line":"\t\t\t\tPIC32CZ_NVM_DATA0 + i,"},{"line_number":134,"context_line":"\t\t\t\tdata[i] | data[i + 1] \u003c\u003c 8 | data[i + 2] \u003c\u003c 16 | data[i + 3] \u003c\u003c 24);"},{"line_number":135,"context_line":"\t}"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"a4ca989b_b9a23868","line":132,"range":{"start_line":132,"start_character":3,"end_line":132,"end_character":19},"in_reply_to":"241f1ef5_259f5f36","updated":"2025-01-03 19:46:07.000000000","message":"Done","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"c5bdd9d29162d6a0bb39b08bedf02209f84c4d08","unresolved":false,"context_lines":[{"line_number":129,"context_line":"\ttarget_write_u32(bank-\u003etarget, PIC32CZ_NVM_ADDR, addr);"},{"line_number":130,"context_line":"\tif (operation \u003d\u003d PIC32CZ_NVMOP_WRITE_QUAD) {"},{"line_number":131,"context_line":"\t\tfor (int i \u003d 0; i \u003c 32; i +\u003d 4)"},{"line_number":132,"context_line":"\t\t\ttarget_write_u32(bank-\u003etarget,"},{"line_number":133,"context_line":"\t\t\t\tPIC32CZ_NVM_DATA0 + i,"},{"line_number":134,"context_line":"\t\t\t\tdata[i] | data[i + 1] \u003c\u003c 8 | data[i + 2] \u003c\u003c 16 | data[i + 3] \u003c\u003c 24);"},{"line_number":135,"context_line":"\t}"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"ca12a407_f66c5cfd","line":132,"range":{"start_line":132,"start_character":3,"end_line":132,"end_character":19},"in_reply_to":"241f1ef5_259f5f36","updated":"2025-01-03 19:40:58.000000000","message":"Thanks, still learning the infrastructure.","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"61773be7b1db48386e883287de3bb3295c3cea01","unresolved":true,"context_lines":[{"line_number":143,"context_line":""},{"line_number":144,"context_line":"\t// 5. The FCW generates an interrupt when it clears STATUS.BUSY and sets INTFLAG.DONE."},{"line_number":145,"context_line":"\ttmp \u003d 0;"},{"line_number":146,"context_line":"\twhile (timeout--) {"},{"line_number":147,"context_line":"\t\ttarget_read_u32(bank-\u003etarget, PIC32CZ_NVM_STATUS, \u0026tmp);"},{"line_number":148,"context_line":"\t\tif ((tmp \u0026 0x1) \u003d\u003d 0)"},{"line_number":149,"context_line":"\t\t\treturn ERROR_OK;"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"d6c4f1f1_78410c97","line":146,"range":{"start_line":146,"start_character":8,"end_line":146,"end_character":15},"updated":"2025-01-02 19:27:54.000000000","message":"Please use timeval_ms() to get reasonable precision timeouts","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"c5bdd9d29162d6a0bb39b08bedf02209f84c4d08","unresolved":false,"context_lines":[{"line_number":143,"context_line":""},{"line_number":144,"context_line":"\t// 5. The FCW generates an interrupt when it clears STATUS.BUSY and sets INTFLAG.DONE."},{"line_number":145,"context_line":"\ttmp \u003d 0;"},{"line_number":146,"context_line":"\twhile (timeout--) {"},{"line_number":147,"context_line":"\t\ttarget_read_u32(bank-\u003etarget, PIC32CZ_NVM_STATUS, \u0026tmp);"},{"line_number":148,"context_line":"\t\tif ((tmp \u0026 0x1) \u003d\u003d 0)"},{"line_number":149,"context_line":"\t\t\treturn ERROR_OK;"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"c606b1a7_a2410585","line":146,"range":{"start_line":146,"start_character":8,"end_line":146,"end_character":15},"in_reply_to":"d6c4f1f1_78410c97","updated":"2025-01-03 19:40:58.000000000","message":"Done","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"61773be7b1db48386e883287de3bb3295c3cea01","unresolved":true,"context_lines":[{"line_number":145,"context_line":"\ttmp \u003d 0;"},{"line_number":146,"context_line":"\twhile (timeout--) {"},{"line_number":147,"context_line":"\t\ttarget_read_u32(bank-\u003etarget, PIC32CZ_NVM_STATUS, \u0026tmp);"},{"line_number":148,"context_line":"\t\tif ((tmp \u0026 0x1) \u003d\u003d 0)"},{"line_number":149,"context_line":"\t\t\treturn ERROR_OK;"},{"line_number":150,"context_line":"\t\talive_sleep(1);"},{"line_number":151,"context_line":"\t}"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"635af45b_4449d99e","line":148,"range":{"start_line":148,"start_character":13,"end_line":148,"end_character":16},"updated":"2025-01-02 19:27:54.000000000","message":"No magic values. Please\n```\n#define PIC32CZ_NVM_STATUS_BUSY BIT(0)\n```","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"c5bdd9d29162d6a0bb39b08bedf02209f84c4d08","unresolved":false,"context_lines":[{"line_number":145,"context_line":"\ttmp \u003d 0;"},{"line_number":146,"context_line":"\twhile (timeout--) {"},{"line_number":147,"context_line":"\t\ttarget_read_u32(bank-\u003etarget, PIC32CZ_NVM_STATUS, \u0026tmp);"},{"line_number":148,"context_line":"\t\tif ((tmp \u0026 0x1) \u003d\u003d 0)"},{"line_number":149,"context_line":"\t\t\treturn ERROR_OK;"},{"line_number":150,"context_line":"\t\talive_sleep(1);"},{"line_number":151,"context_line":"\t}"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"ce1f5ccd_bd8403b4","line":148,"range":{"start_line":148,"start_character":13,"end_line":148,"end_character":16},"in_reply_to":"635af45b_4449d99e","updated":"2025-01-03 19:40:58.000000000","message":"All converted to defines including this highlighted one and all the others.","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"140f38e41009ece4912a54f200b4ab459da8fe71","unresolved":false,"context_lines":[{"line_number":145,"context_line":"\ttmp \u003d 0;"},{"line_number":146,"context_line":"\twhile (timeout--) {"},{"line_number":147,"context_line":"\t\ttarget_read_u32(bank-\u003etarget, PIC32CZ_NVM_STATUS, \u0026tmp);"},{"line_number":148,"context_line":"\t\tif ((tmp \u0026 0x1) \u003d\u003d 0)"},{"line_number":149,"context_line":"\t\t\treturn ERROR_OK;"},{"line_number":150,"context_line":"\t\talive_sleep(1);"},{"line_number":151,"context_line":"\t}"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"09e9f41e_7e8d1cc7","line":148,"range":{"start_line":148,"start_character":13,"end_line":148,"end_character":16},"in_reply_to":"635af45b_4449d99e","updated":"2025-01-03 19:46:07.000000000","message":"Done","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"61773be7b1db48386e883287de3bb3295c3cea01","unresolved":true,"context_lines":[{"line_number":157,"context_line":"/**"},{"line_number":158,"context_line":" * Request Human Readable Information about the PIC32CZ flash banks."},{"line_number":159,"context_line":" *"},{"line_number":160,"context_line":" * Not returning anything meaningful as I can\u0027t see what I can say here that"},{"line_number":161,"context_line":" * would not be provided elsewhere, for examples from \"flash banks\" command."},{"line_number":162,"context_line":" */"},{"line_number":163,"context_line":"static int pic32cz_info(struct flash_bank *bank, struct command_invocation *cmd)"},{"line_number":164,"context_line":"{"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"2532e335_747e3adc","line":161,"range":{"start_line":160,"start_character":3,"end_line":161,"end_character":76},"updated":"2025-01-02 19:27:54.000000000","message":"A good flash driver prints the detected device type and flash size in KiB.\n\nIf you not going to print anything, remove the stub.","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"140f38e41009ece4912a54f200b4ab459da8fe71","unresolved":false,"context_lines":[{"line_number":157,"context_line":"/**"},{"line_number":158,"context_line":" * Request Human Readable Information about the PIC32CZ flash banks."},{"line_number":159,"context_line":" *"},{"line_number":160,"context_line":" * Not returning anything meaningful as I can\u0027t see what I can say here that"},{"line_number":161,"context_line":" * would not be provided elsewhere, for examples from \"flash banks\" command."},{"line_number":162,"context_line":" */"},{"line_number":163,"context_line":"static int pic32cz_info(struct flash_bank *bank, struct command_invocation *cmd)"},{"line_number":164,"context_line":"{"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"b7692c77_205aafe2","line":161,"range":{"start_line":160,"start_character":3,"end_line":161,"end_character":76},"in_reply_to":"2532e335_747e3adc","updated":"2025-01-03 19:46:07.000000000","message":"Done","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"c5bdd9d29162d6a0bb39b08bedf02209f84c4d08","unresolved":false,"context_lines":[{"line_number":157,"context_line":"/**"},{"line_number":158,"context_line":" * Request Human Readable Information about the PIC32CZ flash banks."},{"line_number":159,"context_line":" *"},{"line_number":160,"context_line":" * Not returning anything meaningful as I can\u0027t see what I can say here that"},{"line_number":161,"context_line":" * would not be provided elsewhere, for examples from \"flash banks\" command."},{"line_number":162,"context_line":" */"},{"line_number":163,"context_line":"static int pic32cz_info(struct flash_bank *bank, struct command_invocation *cmd)"},{"line_number":164,"context_line":"{"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"05008abf_c9c1106f","line":161,"range":{"start_line":160,"start_character":3,"end_line":161,"end_character":76},"in_reply_to":"2532e335_747e3adc","updated":"2025-01-03 19:40:58.000000000","message":"Ok, understood. I went digging for a good example to follow, now reporting the size, the type and a bit of status from the flash reader peripheral.","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"61773be7b1db48386e883287de3bb3295c3cea01","unresolved":true,"context_lines":[{"line_number":189,"context_line":" */"},{"line_number":190,"context_line":"static int pic32cz_probe(struct flash_bank *bank)"},{"line_number":191,"context_line":"{"},{"line_number":192,"context_line":"\t// Since all banks have a non zero size we\u0027ll use this as a test for"},{"line_number":193,"context_line":"\t// whether we have already probed the device for this specific bank."},{"line_number":194,"context_line":"\tif (bank-\u003esize !\u003d 0)"},{"line_number":195,"context_line":"\t\treturn ERROR_OK;"},{"line_number":196,"context_line":""},{"line_number":197,"context_line":"\t// We need to know exactly which device this is so we can size the banks correctly."},{"line_number":198,"context_line":"\tconst struct pic32cz_chip_info *details \u003d _pic32cz_get_chip_info(bank-\u003etarget);"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"64598f82_b86f66d9","line":195,"range":{"start_line":192,"start_character":1,"end_line":195,"end_character":18},"updated":"2025-01-02 19:27:54.000000000","message":"This should do autoprobe only. Probe should always re-read values from hw.","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"140f38e41009ece4912a54f200b4ab459da8fe71","unresolved":false,"context_lines":[{"line_number":189,"context_line":" */"},{"line_number":190,"context_line":"static int pic32cz_probe(struct flash_bank *bank)"},{"line_number":191,"context_line":"{"},{"line_number":192,"context_line":"\t// Since all banks have a non zero size we\u0027ll use this as a test for"},{"line_number":193,"context_line":"\t// whether we have already probed the device for this specific bank."},{"line_number":194,"context_line":"\tif (bank-\u003esize !\u003d 0)"},{"line_number":195,"context_line":"\t\treturn ERROR_OK;"},{"line_number":196,"context_line":""},{"line_number":197,"context_line":"\t// We need to know exactly which device this is so we can size the banks correctly."},{"line_number":198,"context_line":"\tconst struct pic32cz_chip_info *details \u003d _pic32cz_get_chip_info(bank-\u003etarget);"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"61da4890_68b137de","line":195,"range":{"start_line":192,"start_character":1,"end_line":195,"end_character":18},"in_reply_to":"64598f82_b86f66d9","updated":"2025-01-03 19:46:07.000000000","message":"Done","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"c5bdd9d29162d6a0bb39b08bedf02209f84c4d08","unresolved":false,"context_lines":[{"line_number":189,"context_line":" */"},{"line_number":190,"context_line":"static int pic32cz_probe(struct flash_bank *bank)"},{"line_number":191,"context_line":"{"},{"line_number":192,"context_line":"\t// Since all banks have a non zero size we\u0027ll use this as a test for"},{"line_number":193,"context_line":"\t// whether we have already probed the device for this specific bank."},{"line_number":194,"context_line":"\tif (bank-\u003esize !\u003d 0)"},{"line_number":195,"context_line":"\t\treturn ERROR_OK;"},{"line_number":196,"context_line":""},{"line_number":197,"context_line":"\t// We need to know exactly which device this is so we can size the banks correctly."},{"line_number":198,"context_line":"\tconst struct pic32cz_chip_info *details \u003d _pic32cz_get_chip_info(bank-\u003etarget);"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"081f3650_b4fc309c","line":195,"range":{"start_line":192,"start_character":1,"end_line":195,"end_character":18},"in_reply_to":"64598f82_b86f66d9","updated":"2025-01-03 19:40:58.000000000","message":"Yep, makes sense. Autoprobe now implemented to check and probe always rereads hardware.","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"61773be7b1db48386e883287de3bb3295c3cea01","unresolved":true,"context_lines":[{"line_number":214,"context_line":"\t\tbreak;"},{"line_number":215,"context_line":""},{"line_number":216,"context_line":"\tdefault:"},{"line_number":217,"context_line":"\t\tLOG_ERROR(\"Bank not found at 0x%08x \", (unsigned int)bank-\u003ebase);"},{"line_number":218,"context_line":"\t\treturn ERROR_FAIL;"},{"line_number":219,"context_line":"\t}"},{"line_number":220,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":1,"id":"d75a5512_60c8557e","line":217,"range":{"start_line":217,"start_character":41,"end_line":217,"end_character":55},"updated":"2025-01-02 19:27:54.000000000","message":"No typecasts in LOG_ arguments.\n```\nLOG_ERROR(\"Bank not found at \" TARGET_ADDR_FMT, bank-\u003ebase)\n```","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"c5bdd9d29162d6a0bb39b08bedf02209f84c4d08","unresolved":false,"context_lines":[{"line_number":214,"context_line":"\t\tbreak;"},{"line_number":215,"context_line":""},{"line_number":216,"context_line":"\tdefault:"},{"line_number":217,"context_line":"\t\tLOG_ERROR(\"Bank not found at 0x%08x \", (unsigned int)bank-\u003ebase);"},{"line_number":218,"context_line":"\t\treturn ERROR_FAIL;"},{"line_number":219,"context_line":"\t}"},{"line_number":220,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":1,"id":"211de434_9495d109","line":217,"range":{"start_line":217,"start_character":41,"end_line":217,"end_character":55},"in_reply_to":"d75a5512_60c8557e","updated":"2025-01-03 19:40:58.000000000","message":"Done","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"61773be7b1db48386e883287de3bb3295c3cea01","unresolved":true,"context_lines":[{"line_number":220,"context_line":""},{"line_number":221,"context_line":"\t// We are expected to allocate tracking structures for the sectors in the bank"},{"line_number":222,"context_line":"\t// and store these in the bank structure."},{"line_number":223,"context_line":"\tbank-\u003esectors \u003d malloc(sizeof(struct flash_sector) * bank-\u003enum_sectors);"},{"line_number":224,"context_line":"\tif (bank-\u003esectors) {"},{"line_number":225,"context_line":"\t\tfor (int i \u003d 0; i \u003c (int)bank-\u003enum_sectors; i++) {"},{"line_number":226,"context_line":"\t\t\tbank-\u003esectors[i].offset \u003d i * (bank-\u003esize / bank-\u003enum_sectors);"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"7980e5ec_9f4b2997","line":223,"updated":"2025-01-02 19:27:54.000000000","message":"Use `alloc_block_array()` for equally sized sectors.\nReturn error if allocation fails.","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"c5bdd9d29162d6a0bb39b08bedf02209f84c4d08","unresolved":false,"context_lines":[{"line_number":220,"context_line":""},{"line_number":221,"context_line":"\t// We are expected to allocate tracking structures for the sectors in the bank"},{"line_number":222,"context_line":"\t// and store these in the bank structure."},{"line_number":223,"context_line":"\tbank-\u003esectors \u003d malloc(sizeof(struct flash_sector) * bank-\u003enum_sectors);"},{"line_number":224,"context_line":"\tif (bank-\u003esectors) {"},{"line_number":225,"context_line":"\t\tfor (int i \u003d 0; i \u003c (int)bank-\u003enum_sectors; i++) {"},{"line_number":226,"context_line":"\t\t\tbank-\u003esectors[i].offset \u003d i * (bank-\u003esize / bank-\u003enum_sectors);"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"b87dbfc2_57939a87","line":223,"in_reply_to":"7980e5ec_9f4b2997","updated":"2025-01-03 19:40:58.000000000","message":"Ah that\u0027s easier, thanks.","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"140f38e41009ece4912a54f200b4ab459da8fe71","unresolved":false,"context_lines":[{"line_number":220,"context_line":""},{"line_number":221,"context_line":"\t// We are expected to allocate tracking structures for the sectors in the bank"},{"line_number":222,"context_line":"\t// and store these in the bank structure."},{"line_number":223,"context_line":"\tbank-\u003esectors \u003d malloc(sizeof(struct flash_sector) * bank-\u003enum_sectors);"},{"line_number":224,"context_line":"\tif (bank-\u003esectors) {"},{"line_number":225,"context_line":"\t\tfor (int i \u003d 0; i \u003c (int)bank-\u003enum_sectors; i++) {"},{"line_number":226,"context_line":"\t\t\tbank-\u003esectors[i].offset \u003d i * (bank-\u003esize / bank-\u003enum_sectors);"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"9938532e_7d971d70","line":223,"in_reply_to":"7980e5ec_9f4b2997","updated":"2025-01-03 19:46:07.000000000","message":"Done","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"61773be7b1db48386e883287de3bb3295c3cea01","unresolved":true,"context_lines":[{"line_number":248,"context_line":""},{"line_number":249,"context_line":"\t// Trap the special cases where the entire block is erased (not applicable to BFM)"},{"line_number":250,"context_line":"\tif (first \u003d\u003d 0 \u0026\u0026 (last \u003d\u003d (bank-\u003enum_sectors - 1)) \u0026\u0026 bank-\u003ebase \u003d\u003d FLASH_BANK_PFM_BASE) {"},{"line_number":251,"context_line":"\t\tLOG_DEBUG(\"Erasing bank at 0x%08x\", (uint32_t)(bank-\u003ebase));"},{"line_number":252,"context_line":"\t\t_pic32cz_nvm_sequence(bank, bank-\u003ebase, 0, PIC32CZ_NVMOP_ERASE_PFM);"},{"line_number":253,"context_line":"\t\treturn ERROR_OK;"},{"line_number":254,"context_line":"\t}"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"89469f9c_cc7d42ec","line":251,"range":{"start_line":251,"start_character":29,"end_line":251,"end_character":48},"updated":"2025-01-02 19:27:54.000000000","message":"Same as above","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"c5bdd9d29162d6a0bb39b08bedf02209f84c4d08","unresolved":false,"context_lines":[{"line_number":248,"context_line":""},{"line_number":249,"context_line":"\t// Trap the special cases where the entire block is erased (not applicable to BFM)"},{"line_number":250,"context_line":"\tif (first \u003d\u003d 0 \u0026\u0026 (last \u003d\u003d (bank-\u003enum_sectors - 1)) \u0026\u0026 bank-\u003ebase \u003d\u003d FLASH_BANK_PFM_BASE) {"},{"line_number":251,"context_line":"\t\tLOG_DEBUG(\"Erasing bank at 0x%08x\", (uint32_t)(bank-\u003ebase));"},{"line_number":252,"context_line":"\t\t_pic32cz_nvm_sequence(bank, bank-\u003ebase, 0, PIC32CZ_NVMOP_ERASE_PFM);"},{"line_number":253,"context_line":"\t\treturn ERROR_OK;"},{"line_number":254,"context_line":"\t}"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"f6881ad1_d9b61953","line":251,"range":{"start_line":251,"start_character":29,"end_line":251,"end_character":48},"in_reply_to":"89469f9c_cc7d42ec","updated":"2025-01-03 19:40:58.000000000","message":"Done","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"61773be7b1db48386e883287de3bb3295c3cea01","unresolved":true,"context_lines":[{"line_number":255,"context_line":""},{"line_number":256,"context_line":"\t// Erase pages from first to last exclusive"},{"line_number":257,"context_line":"\tfor (unsigned int i \u003d first; i \u003c\u003d last; i++) {"},{"line_number":258,"context_line":"\t\tLOG_DEBUG(\"Erasing page %d at 0x%08x\", i, (uint32_t)(bank-\u003ebase + bank-\u003esectors[i].offset));"},{"line_number":259,"context_line":"\t\t_pic32cz_nvm_sequence(bank, bank-\u003ebase + bank-\u003esectors[i].offset, 0, PIC32CZ_NVMOP_ERASE_PAGE);"},{"line_number":260,"context_line":"\t}"},{"line_number":261,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":1,"id":"b1bce686_fcf652c4","line":258,"range":{"start_line":258,"start_character":44,"end_line":258,"end_character":54},"updated":"2025-01-02 19:27:54.000000000","message":"Same as above and %d should be %u","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"c5bdd9d29162d6a0bb39b08bedf02209f84c4d08","unresolved":false,"context_lines":[{"line_number":255,"context_line":""},{"line_number":256,"context_line":"\t// Erase pages from first to last exclusive"},{"line_number":257,"context_line":"\tfor (unsigned int i \u003d first; i \u003c\u003d last; i++) {"},{"line_number":258,"context_line":"\t\tLOG_DEBUG(\"Erasing page %d at 0x%08x\", i, (uint32_t)(bank-\u003ebase + bank-\u003esectors[i].offset));"},{"line_number":259,"context_line":"\t\t_pic32cz_nvm_sequence(bank, bank-\u003ebase + bank-\u003esectors[i].offset, 0, PIC32CZ_NVMOP_ERASE_PAGE);"},{"line_number":260,"context_line":"\t}"},{"line_number":261,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":1,"id":"037b0188_f6bf5616","line":258,"range":{"start_line":258,"start_character":44,"end_line":258,"end_character":54},"in_reply_to":"b1bce686_fcf652c4","updated":"2025-01-03 19:40:58.000000000","message":"Done","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"61773be7b1db48386e883287de3bb3295c3cea01","unresolved":true,"context_lines":[{"line_number":291,"context_line":"\t}"},{"line_number":292,"context_line":""},{"line_number":293,"context_line":"\tLOG_DEBUG(\"writing to flash at address \" TARGET_ADDR_FMT \" at offset 0x%8.8\" PRIx32"},{"line_number":294,"context_line":"\t\t\t  \" count: 0x%8.8\" PRIx32 \"\","},{"line_number":295,"context_line":"\t\t\t  bank-\u003ebase, offset, count);"},{"line_number":296,"context_line":""},{"line_number":297,"context_line":"\t// The inclusive range of addresses for which the caller is providing data"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"956bbee1_9e656307","line":294,"range":{"start_line":294,"start_character":28,"end_line":294,"end_character":31},"updated":"2025-01-02 19:27:54.000000000","message":"Remove empty string","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"c5bdd9d29162d6a0bb39b08bedf02209f84c4d08","unresolved":false,"context_lines":[{"line_number":291,"context_line":"\t}"},{"line_number":292,"context_line":""},{"line_number":293,"context_line":"\tLOG_DEBUG(\"writing to flash at address \" TARGET_ADDR_FMT \" at offset 0x%8.8\" PRIx32"},{"line_number":294,"context_line":"\t\t\t  \" count: 0x%8.8\" PRIx32 \"\","},{"line_number":295,"context_line":"\t\t\t  bank-\u003ebase, offset, count);"},{"line_number":296,"context_line":""},{"line_number":297,"context_line":"\t// The inclusive range of addresses for which the caller is providing data"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"33a1b0e0_b95235f6","line":294,"range":{"start_line":294,"start_character":28,"end_line":294,"end_character":31},"in_reply_to":"956bbee1_9e656307","updated":"2025-01-03 19:40:58.000000000","message":"Done","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"61773be7b1db48386e883287de3bb3295c3cea01","unresolved":true,"context_lines":[{"line_number":300,"context_line":""},{"line_number":301,"context_line":"\t// Iterating over the range of quads spanning the callers data"},{"line_number":302,"context_line":"\tuint8_t quad[32];"},{"line_number":303,"context_line":"\tuint32_t addr_quad \u003d addr_first \u0026 ~(ARRAY_SIZE(quad) - 1);"},{"line_number":304,"context_line":"\twhile (addr_quad \u003c\u003d addr_last) {"},{"line_number":305,"context_line":"\t\tfor (unsigned long i \u003d 0; i \u003c ARRAY_SIZE(quad); ++i) {"},{"line_number":306,"context_line":"\t\t\tuint32_t addr \u003d addr_quad + i;"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"b8b4475b_3766a719","line":303,"range":{"start_line":303,"start_character":37,"end_line":303,"end_character":47},"updated":"2025-01-02 19:27:54.000000000","message":"Prefer `sizeof()` for byte buffer","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"c5bdd9d29162d6a0bb39b08bedf02209f84c4d08","unresolved":false,"context_lines":[{"line_number":300,"context_line":""},{"line_number":301,"context_line":"\t// Iterating over the range of quads spanning the callers data"},{"line_number":302,"context_line":"\tuint8_t quad[32];"},{"line_number":303,"context_line":"\tuint32_t addr_quad \u003d addr_first \u0026 ~(ARRAY_SIZE(quad) - 1);"},{"line_number":304,"context_line":"\twhile (addr_quad \u003c\u003d addr_last) {"},{"line_number":305,"context_line":"\t\tfor (unsigned long i \u003d 0; i \u003c ARRAY_SIZE(quad); ++i) {"},{"line_number":306,"context_line":"\t\t\tuint32_t addr \u003d addr_quad + i;"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"253020a3_1a063a04","line":303,"range":{"start_line":303,"start_character":37,"end_line":303,"end_character":47},"in_reply_to":"b8b4475b_3766a719","updated":"2025-01-03 19:40:58.000000000","message":"Done but went away with the alignment quad size fix anyway.","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"61773be7b1db48386e883287de3bb3295c3cea01","unresolved":true,"context_lines":[{"line_number":307,"context_line":"\t\t\tif (addr \u003e\u003d addr_first \u0026\u0026 addr \u003c\u003d addr_last)"},{"line_number":308,"context_line":"\t\t\t\tquad[i] \u003d buffer[addr - addr_first];"},{"line_number":309,"context_line":"\t\t\telse"},{"line_number":310,"context_line":"\t\t\t\ttarget_read_u8(bank-\u003etarget, addr, \u0026quad[i]);"},{"line_number":311,"context_line":"\t\t}"},{"line_number":312,"context_line":"\t\t_pic32cz_nvm_sequence(bank, addr_quad, quad, PIC32CZ_NVMOP_WRITE_QUAD);"},{"line_number":313,"context_line":"\t\taddr_quad +\u003d ARRAY_SIZE(quad);"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"cb2fd2aa_94e21d98","line":310,"updated":"2025-01-02 19:27:54.000000000","message":"I don\u0027t think that merging the new data with already programmed data in one quad would work. Either NVM controller refuses the write to already programmed quad or wrong ECC is very likely as ECC bits cannot change from programmed to unprogrammed state.\nYou may use `flash fillb` command to test.\n\nMuch simpler solution is to set\n```\nbank-\u003ewrite_start_alignment \u003d quad_size;\nbank-\u003ewrite_end_alignment \u003d quad_size;\n```\nin `probe()` and the infrastructure pads the data with `default_padded_value` (default 0xff). `write()` then gets properly aligned offset and count.","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"140f38e41009ece4912a54f200b4ab459da8fe71","unresolved":false,"context_lines":[{"line_number":307,"context_line":"\t\t\tif (addr \u003e\u003d addr_first \u0026\u0026 addr \u003c\u003d addr_last)"},{"line_number":308,"context_line":"\t\t\t\tquad[i] \u003d buffer[addr - addr_first];"},{"line_number":309,"context_line":"\t\t\telse"},{"line_number":310,"context_line":"\t\t\t\ttarget_read_u8(bank-\u003etarget, addr, \u0026quad[i]);"},{"line_number":311,"context_line":"\t\t}"},{"line_number":312,"context_line":"\t\t_pic32cz_nvm_sequence(bank, addr_quad, quad, PIC32CZ_NVMOP_WRITE_QUAD);"},{"line_number":313,"context_line":"\t\taddr_quad +\u003d ARRAY_SIZE(quad);"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"4407c1d0_91b00b96","line":310,"in_reply_to":"cb2fd2aa_94e21d98","updated":"2025-01-03 19:46:07.000000000","message":"Done","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"c5bdd9d29162d6a0bb39b08bedf02209f84c4d08","unresolved":false,"context_lines":[{"line_number":307,"context_line":"\t\t\tif (addr \u003e\u003d addr_first \u0026\u0026 addr \u003c\u003d addr_last)"},{"line_number":308,"context_line":"\t\t\t\tquad[i] \u003d buffer[addr - addr_first];"},{"line_number":309,"context_line":"\t\t\telse"},{"line_number":310,"context_line":"\t\t\t\ttarget_read_u8(bank-\u003etarget, addr, \u0026quad[i]);"},{"line_number":311,"context_line":"\t\t}"},{"line_number":312,"context_line":"\t\t_pic32cz_nvm_sequence(bank, addr_quad, quad, PIC32CZ_NVMOP_WRITE_QUAD);"},{"line_number":313,"context_line":"\t\taddr_quad +\u003d ARRAY_SIZE(quad);"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"85f6285f_b8527e89","line":310,"in_reply_to":"cb2fd2aa_94e21d98","updated":"2025-01-03 19:40:58.000000000","message":"Yes, I lost my way slightly there forgetting this was flash not sram. Also not aware the infrastructure would pad and align for me. I did verify the RMW with flash fillb which worked but only as the read inserted values obviously had no impact on the flash and 0xFF pad would have worked equally well.\n\nI double checked the ECC and it is per 256 bits (QUAD) and the quad write mechanism will erase and reprogram the correct ECC (the single write do NOT so are not ECC safe). The row writes are just 4xQuad writes with DMA so also safe.\n\nAnyway, reworked and much simpler now, thanks.","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"140f38e41009ece4912a54f200b4ab459da8fe71","unresolved":true,"context_lines":[{"line_number":205,"context_line":"\t// Setup ADDR and if programming either DATAx (Single/Quad) or SRCADDR (Row Write)."},{"line_number":206,"context_line":"\ttarget_write_u32(bank-\u003etarget, PIC32CZ_NVM_ADDR, addr);"},{"line_number":207,"context_line":"\tif (operation \u003d\u003d PIC32CZ_NVMOP_WRITE_QUAD \u0026\u0026 data \u0026\u0026 length)"},{"line_number":208,"context_line":"\t\ttarget_write_memory(bank-\u003etarget, PIC32CZ_NVM_DATA0, sizeof(data[0]), length, data);"},{"line_number":209,"context_line":""},{"line_number":210,"context_line":"\t// Write WRKEY to KEY.KEY."},{"line_number":211,"context_line":"\ttarget_write_u32(bank-\u003etarget, PIC32CZ_NVM_KEY, PIC32CZ_NVM_KEY_UNLOCK | PIC32CZ_NVM_KEY_WR);"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"febc2fe8_2424fb0e","line":208,"range":{"start_line":208,"start_character":55,"end_line":208,"end_character":78},"updated":"2025-01-03 19:46:07.000000000","message":"`target_write_memory()` size parameter directly controls if byte, half-word or word write is performed over the debug interface. I assume NVM_DATA0 .. 7 registers are word sized, so use their native size \u003d 4 and length / 4","commit_id":"5cf78ef4f6f898e96601b223fb3f6bb6799dad25"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"a6c22a51aed09af399783807f7c4e94eba49a21c","unresolved":false,"context_lines":[{"line_number":205,"context_line":"\t// Setup ADDR and if programming either DATAx (Single/Quad) or SRCADDR (Row Write)."},{"line_number":206,"context_line":"\ttarget_write_u32(bank-\u003etarget, PIC32CZ_NVM_ADDR, addr);"},{"line_number":207,"context_line":"\tif (operation \u003d\u003d PIC32CZ_NVMOP_WRITE_QUAD \u0026\u0026 data \u0026\u0026 length)"},{"line_number":208,"context_line":"\t\ttarget_write_memory(bank-\u003etarget, PIC32CZ_NVM_DATA0, sizeof(data[0]), length, data);"},{"line_number":209,"context_line":""},{"line_number":210,"context_line":"\t// Write WRKEY to KEY.KEY."},{"line_number":211,"context_line":"\ttarget_write_u32(bank-\u003etarget, PIC32CZ_NVM_KEY, PIC32CZ_NVM_KEY_UNLOCK | PIC32CZ_NVM_KEY_WR);"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"53ef78dd_0cd9b1ca","line":208,"range":{"start_line":208,"start_character":55,"end_line":208,"end_character":78},"in_reply_to":"febc2fe8_2424fb0e","updated":"2025-01-03 20:12:01.000000000","message":"Done","commit_id":"5cf78ef4f6f898e96601b223fb3f6bb6799dad25"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"140f38e41009ece4912a54f200b4ab459da8fe71","unresolved":true,"context_lines":[{"line_number":279,"context_line":"\t}"},{"line_number":280,"context_line":""},{"line_number":281,"context_line":"\t// To allow re-reading from hardware we must clear any previously allocated memory"},{"line_number":282,"context_line":"\tif (bank-\u003esectors) {"},{"line_number":283,"context_line":"\t\tfree(bank-\u003esectors);"},{"line_number":284,"context_line":"\t\tbank-\u003esectors \u003d NULL;"},{"line_number":285,"context_line":"\t}"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"5b42e2e6_d0346e32","line":282,"range":{"start_line":282,"start_character":1,"end_line":282,"end_character":21},"updated":"2025-01-03 19:46:07.000000000","message":"`free(bank-\u003esectors)` is enough.\nNo need to test for non-null ptr as `free()` guarantees no-op on null parameter.\nNo need to assign NULL as bank-\u003esectors is assigned again on the next line.","commit_id":"5cf78ef4f6f898e96601b223fb3f6bb6799dad25"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"a6c22a51aed09af399783807f7c4e94eba49a21c","unresolved":false,"context_lines":[{"line_number":279,"context_line":"\t}"},{"line_number":280,"context_line":""},{"line_number":281,"context_line":"\t// To allow re-reading from hardware we must clear any previously allocated memory"},{"line_number":282,"context_line":"\tif (bank-\u003esectors) {"},{"line_number":283,"context_line":"\t\tfree(bank-\u003esectors);"},{"line_number":284,"context_line":"\t\tbank-\u003esectors \u003d NULL;"},{"line_number":285,"context_line":"\t}"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"a2f3a7ee_28f86af4","line":282,"range":{"start_line":282,"start_character":1,"end_line":282,"end_character":21},"in_reply_to":"5b42e2e6_d0346e32","updated":"2025-01-03 20:12:01.000000000","message":"Done","commit_id":"5cf78ef4f6f898e96601b223fb3f6bb6799dad25"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"140f38e41009ece4912a54f200b4ab459da8fe71","unresolved":true,"context_lines":[{"line_number":324,"context_line":"\t\tLOG_ERROR(\"Target not halted\");"},{"line_number":325,"context_line":"\t\treturn ERROR_TARGET_NOT_HALTED;"},{"line_number":326,"context_line":"\t}"},{"line_number":327,"context_line":""},{"line_number":328,"context_line":"\t// Trap the special cases where the entire block is erased (not applicable to BFM)"},{"line_number":329,"context_line":"\tif (first \u003d\u003d 0 \u0026\u0026 (last \u003d\u003d (bank-\u003enum_sectors - 1)) \u0026\u0026 bank-\u003ebase \u003d\u003d FLASH_BANK_PFM_BASE) {"},{"line_number":330,"context_line":"\t\tLOG_DEBUG(\"Erasing bank at \" TARGET_ADDR_FMT, bank-\u003ebase);"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"3aee652e_7c558d02","line":327,"updated":"2025-01-03 19:46:07.000000000","message":"nvm_lock \u0026 unlock?","commit_id":"5cf78ef4f6f898e96601b223fb3f6bb6799dad25"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"a6c22a51aed09af399783807f7c4e94eba49a21c","unresolved":false,"context_lines":[{"line_number":324,"context_line":"\t\tLOG_ERROR(\"Target not halted\");"},{"line_number":325,"context_line":"\t\treturn ERROR_TARGET_NOT_HALTED;"},{"line_number":326,"context_line":"\t}"},{"line_number":327,"context_line":""},{"line_number":328,"context_line":"\t// Trap the special cases where the entire block is erased (not applicable to BFM)"},{"line_number":329,"context_line":"\tif (first \u003d\u003d 0 \u0026\u0026 (last \u003d\u003d (bank-\u003enum_sectors - 1)) \u0026\u0026 bank-\u003ebase \u003d\u003d FLASH_BANK_PFM_BASE) {"},{"line_number":330,"context_line":"\t\tLOG_DEBUG(\"Erasing bank at \" TARGET_ADDR_FMT, bank-\u003ebase);"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"49b7f2c6_74e5edcc","line":327,"in_reply_to":"3aee652e_7c558d02","updated":"2025-01-03 20:12:01.000000000","message":"Done","commit_id":"5cf78ef4f6f898e96601b223fb3f6bb6799dad25"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"140f38e41009ece4912a54f200b4ab459da8fe71","unresolved":true,"context_lines":[{"line_number":382,"context_line":"\t// By setting the required alignment properties in the flash banks we can now assume"},{"line_number":383,"context_line":"\t// that the caller has provided data that is correctly aligned for the bank. Processing"},{"line_number":384,"context_line":"\t// now collapses to a simple loop over the range of quads spanning the supplied data."},{"line_number":385,"context_line":"\tfor (int i \u003d 0; i \u003c (int)count; i +\u003d FLASH_BANK_QUAD_SIZE)"},{"line_number":386,"context_line":"\t\t_pic32cz_nvm_sequence(bank,"},{"line_number":387,"context_line":"\t\t\tbank-\u003ebase + i,"},{"line_number":388,"context_line":"\t\t\tbuffer + i,"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"854d15dd_f87d98c4","line":385,"range":{"start_line":385,"start_character":6,"end_line":385,"end_character":9},"updated":"2025-01-03 19:46:07.000000000","message":"Use `unsigned int` and remove typecast to `int`","commit_id":"5cf78ef4f6f898e96601b223fb3f6bb6799dad25"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"a6c22a51aed09af399783807f7c4e94eba49a21c","unresolved":false,"context_lines":[{"line_number":382,"context_line":"\t// By setting the required alignment properties in the flash banks we can now assume"},{"line_number":383,"context_line":"\t// that the caller has provided data that is correctly aligned for the bank. Processing"},{"line_number":384,"context_line":"\t// now collapses to a simple loop over the range of quads spanning the supplied data."},{"line_number":385,"context_line":"\tfor (int i \u003d 0; i \u003c (int)count; i +\u003d FLASH_BANK_QUAD_SIZE)"},{"line_number":386,"context_line":"\t\t_pic32cz_nvm_sequence(bank,"},{"line_number":387,"context_line":"\t\t\tbank-\u003ebase + i,"},{"line_number":388,"context_line":"\t\t\tbuffer + i,"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"356fd6b0_a657fd75","line":385,"range":{"start_line":385,"start_character":6,"end_line":385,"end_character":9},"in_reply_to":"854d15dd_f87d98c4","updated":"2025-01-03 20:12:01.000000000","message":"Done","commit_id":"5cf78ef4f6f898e96601b223fb3f6bb6799dad25"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"03850b065d60da431bbc5c6a12c5d62881051da5","unresolved":true,"context_lines":[{"line_number":245,"context_line":"\t\t? PIC32CZ_TIMEOUT_ERASE : PIC32CZ_TIMEOUT_WRITE;"},{"line_number":246,"context_line":""},{"line_number":247,"context_line":"\t// Setup ADDR and if programming either DATAx (Single/Quad) or SRCADDR (Row Write)"},{"line_number":248,"context_line":"\ttarget_write_u32(bank-\u003etarget, PIC32CZ_NVM_ADDR, addr);"},{"line_number":249,"context_line":"\tif (operation \u003d\u003d PIC32CZ_NVMOP_WRITE_QUAD \u0026\u0026 data \u0026\u0026 length)"},{"line_number":250,"context_line":"\t\ttarget_write_memory(bank-\u003etarget, PIC32CZ_NVM_DATA0, 4, length / 4, data);"},{"line_number":251,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":10,"id":"74afdf95_fd8b6042","line":248,"updated":"2025-01-05 21:39:18.000000000","message":"Check return value for error! Many times...","commit_id":"545a105efdb7848edf01a0b1b6eb33dee06fc331"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"03850b065d60da431bbc5c6a12c5d62881051da5","unresolved":true,"context_lines":[{"line_number":259,"context_line":"\t// is signalled by the STATUS.BUSY bit clearing down to zero."},{"line_number":260,"context_line":"\tint64_t endtime \u003d timeval_ms() + timeout;"},{"line_number":261,"context_line":"\tdo {"},{"line_number":262,"context_line":"\t\talive_sleep(1);"},{"line_number":263,"context_line":"\t\tif (timeval_ms() \u003e endtime) {"},{"line_number":264,"context_line":"\t\t\tLOG_ERROR(\"Timed out waiting for NVM operation to complete\");"},{"line_number":265,"context_line":"\t\t\treturn ERROR_FAIL;"}],"source_content_type":"text/x-csrc","patch_set":10,"id":"6dd36d42_9e4590ae","line":262,"updated":"2025-01-05 21:39:18.000000000","message":"Any reason to unconditionally wait?\nThe previous version of waiting loop in patchset 8 could perform better\n(first test and if busy then wait)","commit_id":"545a105efdb7848edf01a0b1b6eb33dee06fc331"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"03850b065d60da431bbc5c6a12c5d62881051da5","unresolved":true,"context_lines":[{"line_number":362,"context_line":""},{"line_number":363,"context_line":"\tuint32_t lbwp \u003d 0;"},{"line_number":364,"context_line":"\tuint32_t ubwp \u003d 0;"},{"line_number":365,"context_line":"\ttarget_read_u32(bank-\u003etarget, PIC32CZ_NVM_LBWP, \u0026lbwp);"},{"line_number":366,"context_line":"\ttarget_read_u32(bank-\u003etarget, PIC32CZ_NVM_UBWP, \u0026ubwp);"},{"line_number":367,"context_line":""},{"line_number":368,"context_line":"\tunsigned int num_sectors \u003d bank-\u003esize / FLASH_BANK_BFM_PAGE;"},{"line_number":369,"context_line":"\tif (protect)"}],"source_content_type":"text/x-csrc","patch_set":10,"id":"da9047be_824e38f7","line":366,"range":{"start_line":365,"start_character":1,"end_line":366,"end_character":56},"updated":"2025-01-05 21:39:18.000000000","message":"Check for error return!\nProtection status in struct flash_sector is tri-state and in case of error you should leave it in \u0027unknown\u0027 state, not pretend that all sectors are unprotected.","commit_id":"545a105efdb7848edf01a0b1b6eb33dee06fc331"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"03850b065d60da431bbc5c6a12c5d62881051da5","unresolved":true,"context_lines":[{"line_number":365,"context_line":"\ttarget_read_u32(bank-\u003etarget, PIC32CZ_NVM_LBWP, \u0026lbwp);"},{"line_number":366,"context_line":"\ttarget_read_u32(bank-\u003etarget, PIC32CZ_NVM_UBWP, \u0026ubwp);"},{"line_number":367,"context_line":""},{"line_number":368,"context_line":"\tunsigned int num_sectors \u003d bank-\u003esize / FLASH_BANK_BFM_PAGE;"},{"line_number":369,"context_line":"\tif (protect)"},{"line_number":370,"context_line":"\t\t*protect \u003d ((ubwp \u0026 0xFFFF) \u003c\u003c (num_sectors / 2)) | (lbwp \u0026 0xFFFF);"},{"line_number":371,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":10,"id":"e6026b82_c4ecb0cd","line":368,"range":{"start_line":368,"start_character":1,"end_line":368,"end_character":61},"updated":"2025-01-05 21:39:18.000000000","message":"bank-\u003enum_sectors ?","commit_id":"545a105efdb7848edf01a0b1b6eb33dee06fc331"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"03850b065d60da431bbc5c6a12c5d62881051da5","unresolved":true,"context_lines":[{"line_number":389,"context_line":"\t\treturn ERROR_FAIL;"},{"line_number":390,"context_line":"\t}"},{"line_number":391,"context_line":""},{"line_number":392,"context_line":"\tuint32_t current \u003d 0;"},{"line_number":393,"context_line":"\tunsigned int locked \u003d 0;"},{"line_number":394,"context_line":"\t_pic32cz_get_bfm_write_protect(bank, \u0026current, \u0026locked);"},{"line_number":395,"context_line":"\tif (locked) {"},{"line_number":396,"context_line":"\t\tLOG_ERROR(\"BFM write protection bits cannot be altered after locking\");"},{"line_number":397,"context_line":"\t\treturn ERROR_FAIL;"},{"line_number":398,"context_line":"\t}"},{"line_number":399,"context_line":""},{"line_number":400,"context_line":"\tLOG_DEBUG(\"Setting BFM write protection to 0x%08\" PRIx32, protect);"},{"line_number":401,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":10,"id":"520271c6_737251c9","line":398,"range":{"start_line":392,"start_character":1,"end_line":398,"end_character":2},"updated":"2025-01-05 21:39:18.000000000","message":"Could you move this check to `pic32cz_protect()` and reuse `_pic32cz_get_bfm_write_protect()` results?","commit_id":"545a105efdb7848edf01a0b1b6eb33dee06fc331"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"03850b065d60da431bbc5c6a12c5d62881051da5","unresolved":true,"context_lines":[{"line_number":404,"context_line":"\t// the flash configuration registers."},{"line_number":405,"context_line":"\ttarget_write_u32(bank-\u003etarget, PIC32CZ_NVM_KEY, PIC32CZ_NVM_KEY_UNLOCK | PIC32CZ_NVM_KEY_CFGKEY);"},{"line_number":406,"context_line":""},{"line_number":407,"context_line":"\tunsigned int num_sectors \u003d bank-\u003esize / FLASH_BANK_BFM_PAGE;"},{"line_number":408,"context_line":"\tunsigned int mask \u003d (1 \u003c\u003c (num_sectors / 2)) - 1;"},{"line_number":409,"context_line":"\ttarget_write_u32(bank-\u003etarget, PIC32CZ_NVM_LBWP, protect \u0026 mask);"},{"line_number":410,"context_line":"\ttarget_write_u32(bank-\u003etarget, PIC32CZ_NVM_UBWP, (protect \u003e\u003e (num_sectors / 2)) \u0026 mask);"}],"source_content_type":"text/x-csrc","patch_set":10,"id":"ebd5a1fd_60eb693b","line":407,"range":{"start_line":407,"start_character":1,"end_line":407,"end_character":60},"updated":"2025-01-05 21:39:18.000000000","message":"bank-\u003enum_sectors ?","commit_id":"545a105efdb7848edf01a0b1b6eb33dee06fc331"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"03850b065d60da431bbc5c6a12c5d62881051da5","unresolved":true,"context_lines":[{"line_number":520,"context_line":"\t\treturn ERROR_TARGET_NOT_HALTED;"},{"line_number":521,"context_line":"\t}"},{"line_number":522,"context_line":""},{"line_number":523,"context_line":"//\tif (bank-\u003ebase \u003d\u003d FLASH_BANK_BFM_BASE) {"},{"line_number":524,"context_line":"//\t\tLOG_ERROR(\"Cannot erase BFM\");"},{"line_number":525,"context_line":"//\t\treturn ERROR_FAIL;"},{"line_number":526,"context_line":"//\t}"},{"line_number":527,"context_line":""},{"line_number":528,"context_line":"\t// Lock the hardware write mutex before proceeding, careful here not to allow"},{"line_number":529,"context_line":"\t// return paths without an unlock call."}],"source_content_type":"text/x-csrc","patch_set":10,"id":"9f8614b5_c74a8bf6","line":526,"range":{"start_line":523,"start_character":1,"end_line":526,"end_character":4},"updated":"2025-01-05 21:39:18.000000000","message":"??","commit_id":"545a105efdb7848edf01a0b1b6eb33dee06fc331"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"03850b065d60da431bbc5c6a12c5d62881051da5","unresolved":true,"context_lines":[{"line_number":628,"context_line":""},{"line_number":629,"context_line":"\tuint32_t bank_protect \u003d 0;"},{"line_number":630,"context_line":"\tunsigned int locked \u003d 0;"},{"line_number":631,"context_line":"\tif (_pic32cz_get_bfm_write_protect(bank, \u0026bank_protect, \u0026locked) \u003d\u003d ERROR_OK) {"},{"line_number":632,"context_line":"\t\tfor (unsigned int i \u003d 0; i \u003c bank-\u003enum_sectors; i++)"},{"line_number":633,"context_line":"\t\t\tbank-\u003esectors[i].is_protected \u003d (bank_protect \u0026 (1 \u003c\u003c i)) ? 1 : 0;"},{"line_number":634,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":10,"id":"87bb47ff_29a231b8","line":631,"updated":"2025-01-05 21:39:18.000000000","message":"Please keep the simple programming style:\n```\nresult \u003d get_write_protect();\nif (result !\u003d ERROR_OK) {\n  LOG_ERROR(...);\n  return result;\n}\n```\nAlso note that except some special cases you should return the error code returned by lower level call. Do not rewrite all errors to ERROR_FAIL!","commit_id":"545a105efdb7848edf01a0b1b6eb33dee06fc331"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"03850b065d60da431bbc5c6a12c5d62881051da5","unresolved":true,"context_lines":[{"line_number":665,"context_line":""},{"line_number":666,"context_line":"\tuint32_t bank_protect \u003d 0;"},{"line_number":667,"context_line":"\tunsigned int locked \u003d 0;"},{"line_number":668,"context_line":"\tif (_pic32cz_get_bfm_write_protect(bank, \u0026bank_protect, \u0026locked) \u003d\u003d ERROR_OK) {"},{"line_number":669,"context_line":"\t\tif (locked) {"},{"line_number":670,"context_line":"\t\t\tLOG_ERROR(\"BFM protection bits have been locked and cannot be unlocked without a reset\");"},{"line_number":671,"context_line":"\t\t\treturn ERROR_FLASH_PROTECTED;"}],"source_content_type":"text/x-csrc","patch_set":10,"id":"da433844_db32c858","line":668,"updated":"2025-01-05 21:39:18.000000000","message":"As above","commit_id":"545a105efdb7848edf01a0b1b6eb33dee06fc331"}],"tcl/target/pic32cz.cfg":[{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"61773be7b1db48386e883287de3bb3295c3cea01","unresolved":true,"context_lines":[{"line_number":6,"context_line":"   set _CHIPNAME pic32cz"},{"line_number":7,"context_line":"}"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"if { [info exists ENDIAN] } {"},{"line_number":10,"context_line":"   set _ENDIAN $ENDIAN"},{"line_number":11,"context_line":"} else {"},{"line_number":12,"context_line":"   set _ENDIAN little"},{"line_number":13,"context_line":"}"},{"line_number":14,"context_line":""},{"line_number":15,"context_line":"if { [info exists CPUTAPID] } {"},{"line_number":16,"context_line":"   set _CPUTAPID $CPUTAPID"}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"6f791a4e_d6fe0ed1","line":13,"range":{"start_line":9,"start_character":0,"end_line":13,"end_character":1},"updated":"2025-01-02 19:27:54.000000000","message":"Unused. Please remove","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"c5bdd9d29162d6a0bb39b08bedf02209f84c4d08","unresolved":false,"context_lines":[{"line_number":6,"context_line":"   set _CHIPNAME pic32cz"},{"line_number":7,"context_line":"}"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"if { [info exists ENDIAN] } {"},{"line_number":10,"context_line":"   set _ENDIAN $ENDIAN"},{"line_number":11,"context_line":"} else {"},{"line_number":12,"context_line":"   set _ENDIAN little"},{"line_number":13,"context_line":"}"},{"line_number":14,"context_line":""},{"line_number":15,"context_line":"if { [info exists CPUTAPID] } {"},{"line_number":16,"context_line":"   set _CPUTAPID $CPUTAPID"}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"d5d476fd_63127127","line":13,"range":{"start_line":9,"start_character":0,"end_line":13,"end_character":1},"in_reply_to":"6f791a4e_d6fe0ed1","updated":"2025-01-03 19:40:58.000000000","message":"Done","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"140f38e41009ece4912a54f200b4ab459da8fe71","unresolved":false,"context_lines":[{"line_number":6,"context_line":"   set _CHIPNAME pic32cz"},{"line_number":7,"context_line":"}"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"if { [info exists ENDIAN] } {"},{"line_number":10,"context_line":"   set _ENDIAN $ENDIAN"},{"line_number":11,"context_line":"} else {"},{"line_number":12,"context_line":"   set _ENDIAN little"},{"line_number":13,"context_line":"}"},{"line_number":14,"context_line":""},{"line_number":15,"context_line":"if { [info exists CPUTAPID] } {"},{"line_number":16,"context_line":"   set _CPUTAPID $CPUTAPID"}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"f92eb608_1cf2f6b3","line":13,"range":{"start_line":9,"start_character":0,"end_line":13,"end_character":1},"in_reply_to":"6f791a4e_d6fe0ed1","updated":"2025-01-03 19:46:07.000000000","message":"Done","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"61773be7b1db48386e883287de3bb3295c3cea01","unresolved":true,"context_lines":[{"line_number":18,"context_line":"   set _CPUTAPID 0x2ba01477"},{"line_number":19,"context_line":"}"},{"line_number":20,"context_line":""},{"line_number":21,"context_line":"transport select swd"},{"line_number":22,"context_line":""},{"line_number":23,"context_line":"swd newdap $_CHIPNAME cpu -enable"},{"line_number":24,"context_line":"dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu"},{"line_number":25,"context_line":"target create $_CHIPNAME.cpu cortex_m -dap $_CHIPNAME.dap"},{"line_number":26,"context_line":""}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"4d0af8c8_fdaa9be8","line":23,"range":{"start_line":21,"start_character":0,"end_line":23,"end_character":33},"updated":"2025-01-02 19:27:54.000000000","message":"The chip has also JTAG. Please se e.g. `atsamv.cfg\u0027","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"140f38e41009ece4912a54f200b4ab459da8fe71","unresolved":false,"context_lines":[{"line_number":18,"context_line":"   set _CPUTAPID 0x2ba01477"},{"line_number":19,"context_line":"}"},{"line_number":20,"context_line":""},{"line_number":21,"context_line":"transport select swd"},{"line_number":22,"context_line":""},{"line_number":23,"context_line":"swd newdap $_CHIPNAME cpu -enable"},{"line_number":24,"context_line":"dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu"},{"line_number":25,"context_line":"target create $_CHIPNAME.cpu cortex_m -dap $_CHIPNAME.dap"},{"line_number":26,"context_line":""}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"82f32d19_67683a18","line":23,"range":{"start_line":21,"start_character":0,"end_line":23,"end_character":33},"in_reply_to":"4d0af8c8_fdaa9be8","updated":"2025-01-03 19:46:07.000000000","message":"Done","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"c5bdd9d29162d6a0bb39b08bedf02209f84c4d08","unresolved":false,"context_lines":[{"line_number":18,"context_line":"   set _CPUTAPID 0x2ba01477"},{"line_number":19,"context_line":"}"},{"line_number":20,"context_line":""},{"line_number":21,"context_line":"transport select swd"},{"line_number":22,"context_line":""},{"line_number":23,"context_line":"swd newdap $_CHIPNAME cpu -enable"},{"line_number":24,"context_line":"dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu"},{"line_number":25,"context_line":"target create $_CHIPNAME.cpu cortex_m -dap $_CHIPNAME.dap"},{"line_number":26,"context_line":""}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"fa2d8ce9_9e299ecf","line":23,"range":{"start_line":21,"start_character":0,"end_line":23,"end_character":33},"in_reply_to":"4d0af8c8_fdaa9be8","updated":"2025-01-03 19:40:58.000000000","message":"I was a bit nervous about enabling the JTAG without actually testing it. That said I\u0027ve copied the setup from the sam config and it seems to be just as happy as before. If I get a chance I\u0027ll hook up the JTAG pins here to try it out.","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"61773be7b1db48386e883287de3bb3295c3cea01","unresolved":true,"context_lines":[{"line_number":27,"context_line":"flash bank $_CHIPNAME.bfm pic32cz 0x08000000 0 0 0 $_CHIPNAME.cpu"},{"line_number":28,"context_line":"flash bank $_CHIPNAME.pfm pic32cz 0x0C000000 0 0 0 $_CHIPNAME.cpu"},{"line_number":29,"context_line":""},{"line_number":30,"context_line":"reset_config srst_only srst_nogate connect_assert_srst"}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"88a65a64_cbff1981","line":30,"range":{"start_line":30,"start_character":23,"end_line":30,"end_character":54},"updated":"2025-01-02 19:27:54.000000000","message":"Usually `connect_assert_srst` is used as the last resort when e.g. due to MCU in deep sleep debugger cannot connect less intrusive way.\nI\u0027m not sure if Cold plug/Hot plugging procedure introduced by Atmel and slightly modified by Microchip now requires such setting. Please be aware that some user may want to connect debug keeping the MCU state intact, i.e. without reset on debug attach.\n\nAre you sure with `srst_nogate`? Simple test is tto keep the reset button pressed and connect OpenOCD simultaneously. if connects fails, there should not be `srst_nogate` in `reset_config`. Atmels SAMV71 doesn\u0027t like that setting.","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"680611cd970f2414687df438f508793e1addc8b4","unresolved":true,"context_lines":[{"line_number":27,"context_line":"flash bank $_CHIPNAME.bfm pic32cz 0x08000000 0 0 0 $_CHIPNAME.cpu"},{"line_number":28,"context_line":"flash bank $_CHIPNAME.pfm pic32cz 0x0C000000 0 0 0 $_CHIPNAME.cpu"},{"line_number":29,"context_line":""},{"line_number":30,"context_line":"reset_config srst_only srst_nogate connect_assert_srst"}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"d6a84014_986ca7a7","line":30,"range":{"start_line":30,"start_character":23,"end_line":30,"end_character":54},"in_reply_to":"8888a3d7_f51ddbe3","updated":"2025-01-03 20:16:30.000000000","message":"No I\u0027m not sure at all and I\u0027ve not tested with the reset button pressed. I\u0027ll read up on how the various resets work and make sure I\u0027ve got the right options.","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"140f38e41009ece4912a54f200b4ab459da8fe71","unresolved":true,"context_lines":[{"line_number":27,"context_line":"flash bank $_CHIPNAME.bfm pic32cz 0x08000000 0 0 0 $_CHIPNAME.cpu"},{"line_number":28,"context_line":"flash bank $_CHIPNAME.pfm pic32cz 0x0C000000 0 0 0 $_CHIPNAME.cpu"},{"line_number":29,"context_line":""},{"line_number":30,"context_line":"reset_config srst_only srst_nogate connect_assert_srst"}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"8888a3d7_f51ddbe3","line":30,"range":{"start_line":30,"start_character":23,"end_line":30,"end_character":54},"in_reply_to":"88a65a64_cbff1981","updated":"2025-01-03 19:46:07.000000000","message":"\u003e Are you sure with `srst_nogate`? Simple test is tto keep the reset button pressed and connect OpenOCD simultaneously. if connects fails, there should not be `srst_nogate` in `reset_config`. Atmels SAMV71 doesn\u0027t like that setting.\n\nDid you test connecting with reset button pressed?","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"c5bdd9d29162d6a0bb39b08bedf02209f84c4d08","unresolved":false,"context_lines":[{"line_number":27,"context_line":"flash bank $_CHIPNAME.bfm pic32cz 0x08000000 0 0 0 $_CHIPNAME.cpu"},{"line_number":28,"context_line":"flash bank $_CHIPNAME.pfm pic32cz 0x0C000000 0 0 0 $_CHIPNAME.cpu"},{"line_number":29,"context_line":""},{"line_number":30,"context_line":"reset_config srst_only srst_nogate connect_assert_srst"}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"ae83009e_d85143ee","line":30,"range":{"start_line":30,"start_character":23,"end_line":30,"end_character":54},"in_reply_to":"88a65a64_cbff1981","updated":"2025-01-03 19:40:58.000000000","message":"Honestly I don\u0027t know, I\u0027m about two days into OpenOCD. I\u0027ve aligned the cfg file to be more like the example you referenced. Since this still works just as well on my debug test setup suggest that\u0027s a better starting point until I discover more.","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"61773be7b1db48386e883287de3bb3295c3cea01","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":1,"id":"25265e82_3d104b05","line":31,"updated":"2025-01-02 19:27:54.000000000","message":"Also see `atsamv.cfg` for Cortex-M7 specific apcsw setting. No idea if it applies also here. Did you test debugging with data cache enabled?","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"140f38e41009ece4912a54f200b4ab459da8fe71","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":1,"id":"e9dd99b2_0fece2f5","line":31,"in_reply_to":"25265e82_3d104b05","updated":"2025-01-03 19:46:07.000000000","message":"Did you test debugging with data cache enabled?","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"c5bdd9d29162d6a0bb39b08bedf02209f84c4d08","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":1,"id":"7c3229ce_90dcfdd0","line":31,"in_reply_to":"25265e82_3d104b05","updated":"2025-01-03 19:40:58.000000000","message":"I have no idea but since it\u0027s a cortex m7 and is does implement the data caches I suspect it does. We\u0027re at the very beginning of our PIC32CZ port so will discover more as we go. I\u0027ve added the same options for consistency.","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1002357,"name":"Andy","display_name":"Digimap2000","email":"andrewjohnshelley@gmail.com","username":"digimap2000"},"change_message_id":"680611cd970f2414687df438f508793e1addc8b4","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":1,"id":"442ff03d_74c7bb47","line":31,"in_reply_to":"6c4c1678_25680e5d","updated":"2025-01-03 20:16:30.000000000","message":"Yes sure, I\u0027ll have a go at testing that properly tomorrow, I\u0027ll need to make sure I\u0027ve got the data caches configured and working correctly anyway.","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"e680a8f1682fe1634f10e8de1850f2497594bed4","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":1,"id":"6c4c1678_25680e5d","line":31,"in_reply_to":"e9dd99b2_0fece2f5","updated":"2025-01-03 19:59:50.000000000","message":"Sorry, I probably didn\u0027t refresh the gerrit page and therefore didn\u0027t see your responses. apcsw setting really needs to be tested as hw vendor could change some implementation details (so far it works for all Cortex-M7 devices I tested)","commit_id":"3cbe4f801ede8247ba8bb577c3e0c6199c9ac04c"}]}