)]}'
{"/PATCHSET_LEVEL":[{"author":{"_account_id":1002047,"name":"Evgeniy Naydanov","email":"eugnay@gmail.com","username":"en-sc"},"change_message_id":"7eaa071707ca796924413ece4e2f360f78ed00a5","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":1,"id":"3c3da86c_1f00ed5d","updated":"2025-11-27 10:28:48.000000000","message":"Thank you for the patch!\n\nPlease, take a look at my suggestions.\n\nI\u0027d also like to link the original issue here if someone is interested:\nhttps://github.com/riscv-collab/riscv-openocd/issues/1298","commit_id":"2defbdfdaa1d6f47a2e1c8efe2a81d468ffd4097"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"adb97dac553e95f9fe80f89c2cc1fd2569acd071","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":4,"id":"d13d1081_14da5b47","updated":"2026-01-21 16:56:10.000000000","message":"I don\u0027t really know the riscv code, so sorry if some comment is not correct.\nThe riscv doc say that misa register has a default value at reset that reports all the available extensions. Then, at runtime, some extension can be disabled (by the code itself, I expect).\nI think that instead of having this `-detect-misa` flag we should have:\n- at examine reporting the information of the extensions available.\n- after that, only use the extension enabled.\n- it could be interesting to give user the possibility to change value in `misa`, but I believe this is already possible by writing the register.\n\nReporting at examine the extensions available, can be considered as useless noise.\nIf the code of OpenOCD doesn\u0027t need this value, we can skip it completely.\nA user that want to know the available extensions can simply write 0xffffffff in misa, read back the value, then write back the old value.","commit_id":"84ac900063ffe44580051904db0055b16469d615"},{"author":{"_account_id":1002047,"name":"Evgeniy Naydanov","email":"eugnay@gmail.com","username":"en-sc"},"change_message_id":"061b2fc5c5fe6bb43da1bbeeee223e97559444da","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":4,"id":"6b35a466_8456dcd9","updated":"2026-01-21 12:56:56.000000000","message":"Sorry for taking so long to respond.\nOne minor optional suggestion.\nOtherwise LGTM.","commit_id":"84ac900063ffe44580051904db0055b16469d615"},{"author":{"_account_id":1002315,"name":"liangzhen","email":"zhen.liang@spacemit.com","username":"liangzhen"},"change_message_id":"66aa625771dd92a618ab77f8f002e6a2995ac5fc","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":4,"id":"3c506aee_42c6ae2a","in_reply_to":"d13d1081_14da5b47","updated":"2026-01-29 02:39:19.000000000","message":"The original purpose of this patch was to fix the issue where setting hardware breakpoints fails due to changes in the misa register value during debugging. Since the misa register is not constant, I believe it\u0027s incorrect to always rely on the initially cached misa value to determine the supported extensions.","commit_id":"84ac900063ffe44580051904db0055b16469d615"}],"src/target/riscv/riscv-013_reg.c":[{"author":{"_account_id":1002047,"name":"Evgeniy Naydanov","email":"eugnay@gmail.com","username":"en-sc"},"change_message_id":"7eaa071707ca796924413ece4e2f360f78ed00a5","unresolved":true,"context_lines":[{"line_number":19,"context_line":""},{"line_number":20,"context_line":"\t/* TODO: Hack to deal with gdb that thinks these registers still exist. */"},{"line_number":21,"context_line":"\tif (reg-\u003enumber \u003e GDB_REGNO_XPR15 \u0026\u0026 reg-\u003enumber \u003c\u003d GDB_REGNO_XPR31 \u0026\u0026"},{"line_number":22,"context_line":"\t\t\triscv_supports_extension(target, \u0027E\u0027, true)) {"},{"line_number":23,"context_line":"\t\tbuf_set_u64(reg-\u003evalue, 0, reg-\u003esize, 0);"},{"line_number":24,"context_line":"\t\treturn ERROR_OK;"},{"line_number":25,"context_line":"\t}"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"90b68065_c36c18cf","line":22,"updated":"2025-11-27 10:28:48.000000000","message":"Here I\u0027d suggest to check the static value (`current \u003d false`).\nThe issue is -- a register can be read on a running target, and e.g. reading a GPR can be supported but reading a CSR can be not supported. The current change will break the reads of registers x16-x31 on such target.\n\nIn general, we should double-check whether this workaround is still relevant. Though I think this should be done in a separate patch.","commit_id":"2defbdfdaa1d6f47a2e1c8efe2a81d468ffd4097"},{"author":{"_account_id":1002315,"name":"liangzhen","email":"zhen.liang@spacemit.com","username":"liangzhen"},"change_message_id":"4b9e09f4879292a6d46be90a7c89b96aa9d285fe","unresolved":false,"context_lines":[{"line_number":19,"context_line":""},{"line_number":20,"context_line":"\t/* TODO: Hack to deal with gdb that thinks these registers still exist. */"},{"line_number":21,"context_line":"\tif (reg-\u003enumber \u003e GDB_REGNO_XPR15 \u0026\u0026 reg-\u003enumber \u003c\u003d GDB_REGNO_XPR31 \u0026\u0026"},{"line_number":22,"context_line":"\t\t\triscv_supports_extension(target, \u0027E\u0027, true)) {"},{"line_number":23,"context_line":"\t\tbuf_set_u64(reg-\u003evalue, 0, reg-\u003esize, 0);"},{"line_number":24,"context_line":"\t\treturn ERROR_OK;"},{"line_number":25,"context_line":"\t}"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"a82f9ea5_7cde8ad6","line":22,"in_reply_to":"90b68065_c36c18cf","updated":"2025-11-28 05:50:34.000000000","message":"Done","commit_id":"2defbdfdaa1d6f47a2e1c8efe2a81d468ffd4097"},{"author":{"_account_id":1002047,"name":"Evgeniy Naydanov","email":"eugnay@gmail.com","username":"en-sc"},"change_message_id":"7eaa071707ca796924413ece4e2f360f78ed00a5","unresolved":true,"context_lines":[{"line_number":277,"context_line":"\tif (res !\u003d ERROR_OK)"},{"line_number":278,"context_line":"\t\treturn res;"},{"line_number":279,"context_line":""},{"line_number":280,"context_line":"\tres \u003d riscv_reg_get(target, \u0026r-\u003emisa, GDB_REGNO_MISA);"},{"line_number":281,"context_line":"\tif (res !\u003d ERROR_OK)"},{"line_number":282,"context_line":"\t\treturn res;"},{"line_number":283,"context_line":"\treturn check_misa(target);"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"06286757_c7b3a99e","line":280,"updated":"2025-11-27 10:28:48.000000000","message":"I\u0027d suggest reading misa value into a dedicated variable instead of `r-\u003emisa` and assigning it into the `r-\u003emisa` only after all the extensions were detected.\n\nBefore this change, `r-\u003emisa` was only written once. Now it can be written twice (if `r-\u003edetect_misa` is set) and this state in-between the writes is not consistent (e.g. in this state `riscv_supports_extension()` values can be incorrect).\n\nI believe it will be more robust if `r-\u003emisa` is only written once.","commit_id":"2defbdfdaa1d6f47a2e1c8efe2a81d468ffd4097"},{"author":{"_account_id":1002315,"name":"liangzhen","email":"zhen.liang@spacemit.com","username":"liangzhen"},"change_message_id":"4b9e09f4879292a6d46be90a7c89b96aa9d285fe","unresolved":false,"context_lines":[{"line_number":277,"context_line":"\tif (res !\u003d ERROR_OK)"},{"line_number":278,"context_line":"\t\treturn res;"},{"line_number":279,"context_line":""},{"line_number":280,"context_line":"\tres \u003d riscv_reg_get(target, \u0026r-\u003emisa, GDB_REGNO_MISA);"},{"line_number":281,"context_line":"\tif (res !\u003d ERROR_OK)"},{"line_number":282,"context_line":"\t\treturn res;"},{"line_number":283,"context_line":"\treturn check_misa(target);"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"eedc33e7_da9a3c6d","line":280,"in_reply_to":"06286757_c7b3a99e","updated":"2025-11-28 05:50:34.000000000","message":"Done","commit_id":"2defbdfdaa1d6f47a2e1c8efe2a81d468ffd4097"},{"author":{"_account_id":1002047,"name":"Evgeniy Naydanov","email":"eugnay@gmail.com","username":"en-sc"},"change_message_id":"7eaa071707ca796924413ece4e2f360f78ed00a5","unresolved":true,"context_lines":[{"line_number":280,"context_line":"\tres \u003d riscv_reg_get(target, \u0026r-\u003emisa, GDB_REGNO_MISA);"},{"line_number":281,"context_line":"\tif (res !\u003d ERROR_OK)"},{"line_number":282,"context_line":"\t\treturn res;"},{"line_number":283,"context_line":"\treturn check_misa(target);"},{"line_number":284,"context_line":"}"},{"line_number":285,"context_line":""},{"line_number":286,"context_line":"static int examine_mtopi(struct target *target)"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"abdae8aa_79dea056","line":283,"updated":"2025-11-27 10:28:48.000000000","message":"I\u0027d suggest to move the new part related to misa detection into a separate function.\nThis is kind of wierd when a function named `check_...` changes the target.\nMoreover, misa detection does not check anything.","commit_id":"2defbdfdaa1d6f47a2e1c8efe2a81d468ffd4097"},{"author":{"_account_id":1002315,"name":"liangzhen","email":"zhen.liang@spacemit.com","username":"liangzhen"},"change_message_id":"4b9e09f4879292a6d46be90a7c89b96aa9d285fe","unresolved":false,"context_lines":[{"line_number":280,"context_line":"\tres \u003d riscv_reg_get(target, \u0026r-\u003emisa, GDB_REGNO_MISA);"},{"line_number":281,"context_line":"\tif (res !\u003d ERROR_OK)"},{"line_number":282,"context_line":"\t\treturn res;"},{"line_number":283,"context_line":"\treturn check_misa(target);"},{"line_number":284,"context_line":"}"},{"line_number":285,"context_line":""},{"line_number":286,"context_line":"static int examine_mtopi(struct target *target)"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"4e0f975c_9bfec23b","line":283,"in_reply_to":"abdae8aa_79dea056","updated":"2025-11-28 05:50:34.000000000","message":"Done","commit_id":"2defbdfdaa1d6f47a2e1c8efe2a81d468ffd4097"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"adb97dac553e95f9fe80f89c2cc1fd2569acd071","unresolved":true,"context_lines":[{"line_number":251,"context_line":""},{"line_number":252,"context_line":"static int misa_detect_extensions(struct target *target, riscv_reg_t *misa)"},{"line_number":253,"context_line":"{"},{"line_number":254,"context_line":"\tconst riscv_reg_t misa_extensions_mask \u003d (riscv_reg_t)(0x1 \u003c\u003c 25) - 1;"},{"line_number":255,"context_line":"\triscv_reg_t misa_enabled \u003d set_field(*misa, misa_extensions_mask, misa_extensions_mask);"},{"line_number":256,"context_line":"\tif (riscv_reg_set(target, GDB_REGNO_MISA, misa_enabled) !\u003d ERROR_OK)"},{"line_number":257,"context_line":"\t\treturn ERROR_FAIL;"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"bb839a82_7ae37757","line":254,"updated":"2026-01-21 16:56:10.000000000","message":"Please use `... \u003d (riscv_reg_t)GENMASK(24, 0);`","commit_id":"84ac900063ffe44580051904db0055b16469d615"},{"author":{"_account_id":1002315,"name":"liangzhen","email":"zhen.liang@spacemit.com","username":"liangzhen"},"change_message_id":"66aa625771dd92a618ab77f8f002e6a2995ac5fc","unresolved":false,"context_lines":[{"line_number":251,"context_line":""},{"line_number":252,"context_line":"static int misa_detect_extensions(struct target *target, riscv_reg_t *misa)"},{"line_number":253,"context_line":"{"},{"line_number":254,"context_line":"\tconst riscv_reg_t misa_extensions_mask \u003d (riscv_reg_t)(0x1 \u003c\u003c 25) - 1;"},{"line_number":255,"context_line":"\triscv_reg_t misa_enabled \u003d set_field(*misa, misa_extensions_mask, misa_extensions_mask);"},{"line_number":256,"context_line":"\tif (riscv_reg_set(target, GDB_REGNO_MISA, misa_enabled) !\u003d ERROR_OK)"},{"line_number":257,"context_line":"\t\treturn ERROR_FAIL;"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"19541ccd_e9cb061e","line":254,"in_reply_to":"bb839a82_7ae37757","updated":"2026-01-29 02:39:19.000000000","message":"Done","commit_id":"84ac900063ffe44580051904db0055b16469d615"}],"src/target/riscv/riscv.c":[{"author":{"_account_id":1002047,"name":"Evgeniy Naydanov","email":"eugnay@gmail.com","username":"en-sc"},"change_message_id":"7eaa071707ca796924413ece4e2f360f78ed00a5","unresolved":true,"context_lines":[{"line_number":5577,"context_line":"\treturn ERROR_OK;"},{"line_number":5578,"context_line":"}"},{"line_number":5579,"context_line":""},{"line_number":5580,"context_line":"COMMAND_HANDLER(riscv_detect_misa)"},{"line_number":5581,"context_line":"{"},{"line_number":5582,"context_line":"\tstruct target *target \u003d get_current_target(CMD_CTX);"},{"line_number":5583,"context_line":"\tRISCV_INFO(r);"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"8f9f6a9a_ffac7958","line":5580,"updated":"2025-11-27 10:28:48.000000000","message":"I\u0027d suggest making it a configuration (`\u003ctarget_name\u003e config/cget`) parameter instead. See `riscv_jim_configure()`.","commit_id":"2defbdfdaa1d6f47a2e1c8efe2a81d468ffd4097"},{"author":{"_account_id":1002315,"name":"liangzhen","email":"zhen.liang@spacemit.com","username":"liangzhen"},"change_message_id":"4b9e09f4879292a6d46be90a7c89b96aa9d285fe","unresolved":false,"context_lines":[{"line_number":5577,"context_line":"\treturn ERROR_OK;"},{"line_number":5578,"context_line":"}"},{"line_number":5579,"context_line":""},{"line_number":5580,"context_line":"COMMAND_HANDLER(riscv_detect_misa)"},{"line_number":5581,"context_line":"{"},{"line_number":5582,"context_line":"\tstruct target *target \u003d get_current_target(CMD_CTX);"},{"line_number":5583,"context_line":"\tRISCV_INFO(r);"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"eb6e3194_13adc89b","line":5580,"in_reply_to":"8f9f6a9a_ffac7958","updated":"2025-11-28 05:50:34.000000000","message":"Done","commit_id":"2defbdfdaa1d6f47a2e1c8efe2a81d468ffd4097"},{"author":{"_account_id":1002047,"name":"Evgeniy Naydanov","email":"eugnay@gmail.com","username":"en-sc"},"change_message_id":"7eaa071707ca796924413ece4e2f360f78ed00a5","unresolved":true,"context_lines":[{"line_number":6067,"context_line":"\treturn ERROR_OK;"},{"line_number":6068,"context_line":"}"},{"line_number":6069,"context_line":""},{"line_number":6070,"context_line":"bool riscv_supports_extension(struct target *target, char letter, bool current)"},{"line_number":6071,"context_line":"{"},{"line_number":6072,"context_line":"\tRISCV_INFO(r);"},{"line_number":6073,"context_line":"\tunsigned int num;"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"c399d05c_cd676444","line":6070,"updated":"2025-11-27 10:28:48.000000000","message":"I\u0027d suggest to make it two different functions.\n1. `bool riscv_supports_extension(const struct target *target, char letter)` -- acts like the current one with `current \u003d false`.\n2. `int riscv_extension_enabled(struct target *target, char letter, bool *is_enabled)` -- `is_enabled` is an output parameter, returns an error when access fails.\n\nThey can both reuse something like `static bool misa_check_extension(riscv_reg_t misa, char letter)` that will implement the logic around converting letter to bit index and returning the bit from the passed misa value.","commit_id":"2defbdfdaa1d6f47a2e1c8efe2a81d468ffd4097"},{"author":{"_account_id":1002315,"name":"liangzhen","email":"zhen.liang@spacemit.com","username":"liangzhen"},"change_message_id":"4b9e09f4879292a6d46be90a7c89b96aa9d285fe","unresolved":false,"context_lines":[{"line_number":6067,"context_line":"\treturn ERROR_OK;"},{"line_number":6068,"context_line":"}"},{"line_number":6069,"context_line":""},{"line_number":6070,"context_line":"bool riscv_supports_extension(struct target *target, char letter, bool current)"},{"line_number":6071,"context_line":"{"},{"line_number":6072,"context_line":"\tRISCV_INFO(r);"},{"line_number":6073,"context_line":"\tunsigned int num;"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"aa833f9e_22ce9044","line":6070,"in_reply_to":"c399d05c_cd676444","updated":"2025-11-28 05:50:34.000000000","message":"Done","commit_id":"2defbdfdaa1d6f47a2e1c8efe2a81d468ffd4097"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"adb97dac553e95f9fe80f89c2cc1fd2569acd071","unresolved":true,"context_lines":[{"line_number":981,"context_line":"\ttdata1 \u003d set_field(tdata1, bpcontrol_r, trigger-\u003eis_read);"},{"line_number":982,"context_line":"\ttdata1 \u003d set_field(tdata1, bpcontrol_w, trigger-\u003eis_write);"},{"line_number":983,"context_line":"\ttdata1 \u003d set_field(tdata1, bpcontrol_x, trigger-\u003eis_execute);"},{"line_number":984,"context_line":"\ttdata1 \u003d set_field(tdata1, bpcontrol_u, !!(r-\u003emisa \u0026 BIT(\u0027U\u0027 - \u0027A\u0027)));"},{"line_number":985,"context_line":"\ttdata1 \u003d set_field(tdata1, bpcontrol_s, !!(r-\u003emisa \u0026 BIT(\u0027S\u0027 - \u0027A\u0027)));"},{"line_number":986,"context_line":"\ttdata1 \u003d set_field(tdata1, bpcontrol_h, !!(r-\u003emisa \u0026 BIT(\u0027H\u0027 - \u0027A\u0027)));"},{"line_number":987,"context_line":"\ttdata1 \u003d set_field(tdata1, bpcontrol_m, 1);"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"908750ab_fca81396","line":984,"updated":"2026-01-21 16:56:10.000000000","message":"Is it correct to use here the old misa value?","commit_id":"84ac900063ffe44580051904db0055b16469d615"},{"author":{"_account_id":1002315,"name":"liangzhen","email":"zhen.liang@spacemit.com","username":"liangzhen"},"change_message_id":"66aa625771dd92a618ab77f8f002e6a2995ac5fc","unresolved":false,"context_lines":[{"line_number":981,"context_line":"\ttdata1 \u003d set_field(tdata1, bpcontrol_r, trigger-\u003eis_read);"},{"line_number":982,"context_line":"\ttdata1 \u003d set_field(tdata1, bpcontrol_w, trigger-\u003eis_write);"},{"line_number":983,"context_line":"\ttdata1 \u003d set_field(tdata1, bpcontrol_x, trigger-\u003eis_execute);"},{"line_number":984,"context_line":"\ttdata1 \u003d set_field(tdata1, bpcontrol_u, !!(r-\u003emisa \u0026 BIT(\u0027U\u0027 - \u0027A\u0027)));"},{"line_number":985,"context_line":"\ttdata1 \u003d set_field(tdata1, bpcontrol_s, !!(r-\u003emisa \u0026 BIT(\u0027S\u0027 - \u0027A\u0027)));"},{"line_number":986,"context_line":"\ttdata1 \u003d set_field(tdata1, bpcontrol_h, !!(r-\u003emisa \u0026 BIT(\u0027H\u0027 - \u0027A\u0027)));"},{"line_number":987,"context_line":"\ttdata1 \u003d set_field(tdata1, bpcontrol_m, 1);"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"f4c47b94_047492a8","line":984,"in_reply_to":"908750ab_fca81396","updated":"2026-01-29 02:39:19.000000000","message":"Done","commit_id":"84ac900063ffe44580051904db0055b16469d615"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"adb97dac553e95f9fe80f89c2cc1fd2569acd071","unresolved":true,"context_lines":[{"line_number":1231,"context_line":"\tstruct match_triggers_tdata1_fields *fields)"},{"line_number":1232,"context_line":"{"},{"line_number":1233,"context_line":"\tbool misa_s, misa_u, misa_h;"},{"line_number":1234,"context_line":"\tif (riscv_extension_enabled(target, \u0027S\u0027, \u0026misa_s) !\u003d ERROR_OK)"},{"line_number":1235,"context_line":"\t\treturn ERROR_FAIL;"},{"line_number":1236,"context_line":""},{"line_number":1237,"context_line":"\tif (riscv_extension_enabled(target, \u0027U\u0027, \u0026misa_u) !\u003d ERROR_OK)"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"c4f31187_a364edf7","line":1234,"updated":"2026-01-21 16:56:10.000000000","message":"Every call to `riscv_extension_enabled()` cause re-reading\n`riscv_reg_get(target, \u0026misa, GDB_REGNO_MISA)`\nCan this be optimized?\n\nAlso, in OpenOCD we should propagate the error code. This and the other similar places in this patch should become:\n```\nint retval \u003d riscv_extension_enabled(...);\nif (retval !\u003d ERROR_OK)\n    return retval;\n```","commit_id":"84ac900063ffe44580051904db0055b16469d615"},{"author":{"_account_id":1002315,"name":"liangzhen","email":"zhen.liang@spacemit.com","username":"liangzhen"},"change_message_id":"66aa625771dd92a618ab77f8f002e6a2995ac5fc","unresolved":false,"context_lines":[{"line_number":1231,"context_line":"\tstruct match_triggers_tdata1_fields *fields)"},{"line_number":1232,"context_line":"{"},{"line_number":1233,"context_line":"\tbool misa_s, misa_u, misa_h;"},{"line_number":1234,"context_line":"\tif (riscv_extension_enabled(target, \u0027S\u0027, \u0026misa_s) !\u003d ERROR_OK)"},{"line_number":1235,"context_line":"\t\treturn ERROR_FAIL;"},{"line_number":1236,"context_line":""},{"line_number":1237,"context_line":"\tif (riscv_extension_enabled(target, \u0027U\u0027, \u0026misa_u) !\u003d ERROR_OK)"}],"source_content_type":"text/x-csrc","patch_set":4,"id":"9320db16_0ad81f85","line":1234,"in_reply_to":"c4f31187_a364edf7","updated":"2026-01-29 02:39:19.000000000","message":"\u003e Every call to riscv_extension_enabled() cause re-reading\n\u003e riscv_reg_get(target, \u0026misa, GDB_REGNO_MISA)\n\u003e Can this be optimized?\n\nIt seems that optimization isn\u0027t feasible in this case, as we need to retrieve the current actual value of the misa register each time. This is essential to ensure that we have the most up-to-date information regarding the supported extensions.\n\n\u003e Also, in OpenOCD we should propagate the error code. This and the other similar places in this patch should become:\n\nDone","commit_id":"84ac900063ffe44580051904db0055b16469d615"},{"author":{"_account_id":1002047,"name":"Evgeniy Naydanov","email":"eugnay@gmail.com","username":"en-sc"},"change_message_id":"061b2fc5c5fe6bb43da1bbeeee223e97559444da","unresolved":true,"context_lines":[{"line_number":1508,"context_line":"\t\t\tbreak;"},{"line_number":1509,"context_line":""},{"line_number":1510,"context_line":"\t\tstruct match_triggers_tdata1_fields fields_t2;"},{"line_number":1511,"context_line":"\t\tret \u003d fill_match_triggers_tdata1_fields_t2(target, trigger, \u0026fields_t2);"},{"line_number":1512,"context_line":"\t\tif (ret !\u003d ERROR_OK)"},{"line_number":1513,"context_line":"\t\t\treturn ret;"},{"line_number":1514,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":4,"id":"f0f0d9ef_418e06a5","line":1511,"updated":"2026-01-21 12:56:56.000000000","message":"[optional]\nPerhaps moving the detection of misa fields out of `fill_match_triggers_tdata1_fields_*()` will make code a bit cleaner:\n```\nunsigned int xlen \u003d riscv_xlen(target);\nbool misa_s, misa_u;\nif (riscv_extension_enabled(target, \u0027S\u0027, \u0026misa_s) !\u003d ERROR_OK)\n\treturn ERROR_FAIL;\n\nif (riscv_extension_enabled(target, \u0027U\u0027, \u0026misa_u) !\u003d ERROR_OK)\n\treturn ERROR_FAIL;\n\t\t\nret \u003d maybe_add_trigger_t2_t6(target, trigger,\n\t\tfill_match_triggers_tdata1_fields_t2(trigger, xlen, misa_s, misa_u));\n```","commit_id":"84ac900063ffe44580051904db0055b16469d615"},{"author":{"_account_id":1002315,"name":"liangzhen","email":"zhen.liang@spacemit.com","username":"liangzhen"},"change_message_id":"66aa625771dd92a618ab77f8f002e6a2995ac5fc","unresolved":false,"context_lines":[{"line_number":1508,"context_line":"\t\t\tbreak;"},{"line_number":1509,"context_line":""},{"line_number":1510,"context_line":"\t\tstruct match_triggers_tdata1_fields fields_t2;"},{"line_number":1511,"context_line":"\t\tret \u003d fill_match_triggers_tdata1_fields_t2(target, trigger, \u0026fields_t2);"},{"line_number":1512,"context_line":"\t\tif (ret !\u003d ERROR_OK)"},{"line_number":1513,"context_line":"\t\t\treturn ret;"},{"line_number":1514,"context_line":""}],"source_content_type":"text/x-csrc","patch_set":4,"id":"2275ed7c_1bc807b1","line":1511,"in_reply_to":"f0f0d9ef_418e06a5","updated":"2026-01-29 02:39:19.000000000","message":"Done","commit_id":"84ac900063ffe44580051904db0055b16469d615"}],"src/target/riscv/riscv_reg.c":[{"author":{"_account_id":1002047,"name":"Evgeniy Naydanov","email":"eugnay@gmail.com","username":"en-sc"},"change_message_id":"7eaa071707ca796924413ece4e2f360f78ed00a5","unresolved":true,"context_lines":[{"line_number":259,"context_line":"\t\t(regno \u003e\u003d GDB_REGNO_FPR0 \u0026\u0026 regno \u003c\u003d GDB_REGNO_FPR31);"},{"line_number":260,"context_line":"}"},{"line_number":261,"context_line":""},{"line_number":262,"context_line":"static struct reg_data_type *gdb_regno_reg_data_type(struct target *target,"},{"line_number":263,"context_line":"\t\tuint32_t regno)"},{"line_number":264,"context_line":"{"},{"line_number":265,"context_line":"\tif (regno \u003e\u003d GDB_REGNO_FPR0 \u0026\u0026 regno \u003c\u003d GDB_REGNO_FPR31) {"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"1d715788_8010bbe5","line":262,"updated":"2025-11-27 10:28:48.000000000","message":"This change will be avoided if `riscv_supports_extension()` is split in two. See the comment above.","commit_id":"2defbdfdaa1d6f47a2e1c8efe2a81d468ffd4097"},{"author":{"_account_id":1002315,"name":"liangzhen","email":"zhen.liang@spacemit.com","username":"liangzhen"},"change_message_id":"4b9e09f4879292a6d46be90a7c89b96aa9d285fe","unresolved":false,"context_lines":[{"line_number":259,"context_line":"\t\t(regno \u003e\u003d GDB_REGNO_FPR0 \u0026\u0026 regno \u003c\u003d GDB_REGNO_FPR31);"},{"line_number":260,"context_line":"}"},{"line_number":261,"context_line":""},{"line_number":262,"context_line":"static struct reg_data_type *gdb_regno_reg_data_type(struct target *target,"},{"line_number":263,"context_line":"\t\tuint32_t regno)"},{"line_number":264,"context_line":"{"},{"line_number":265,"context_line":"\tif (regno \u003e\u003d GDB_REGNO_FPR0 \u0026\u0026 regno \u003c\u003d GDB_REGNO_FPR31) {"}],"source_content_type":"text/x-csrc","patch_set":1,"id":"b3692f2e_3268cb7e","line":262,"in_reply_to":"1d715788_8010bbe5","updated":"2025-11-28 05:50:34.000000000","message":"Done","commit_id":"2defbdfdaa1d6f47a2e1c8efe2a81d468ffd4097"}]}