)]}'
{"/PATCHSET_LEVEL":[{"author":{"_account_id":1002047,"name":"Evgeniy Naydanov","email":"eugnay@gmail.com","username":"en-sc"},"change_message_id":"db95613a54a5a2a67e266f2bdc16f76c587c201a","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"06cd6fc4_9899b838","updated":"2026-06-30 09:50:48.000000000","message":"Thank you for the patch!\nSorry for taking so long to review.","commit_id":"93a75d9187d84046e6d2585125ea463c45e305ca"}],"doc/openocd.texi":[{"author":{"_account_id":1002047,"name":"Evgeniy Naydanov","email":"eugnay@gmail.com","username":"en-sc"},"change_message_id":"db95613a54a5a2a67e266f2bdc16f76c587c201a","unresolved":true,"context_lines":[{"line_number":11676,"context_line":""},{"line_number":11677,"context_line":"@itemize"},{"line_number":11678,"context_line":"@item @code{-sba-flush-cache} @option{off}|@option{on} -- determines whether"},{"line_number":11679,"context_line":"OpenOCD will automatically execute RISC-V CMO instructions (@var{cbo.flush})"},{"line_number":11680,"context_line":"when write memory via RISC-V Debug System Bus interface. Defaults to @option{on}."},{"line_number":11681,"context_line":""},{"line_number":11682,"context_line":"@itemize"}],"source_content_type":"text/x-texinfo","patch_set":2,"id":"3951fdb0_1fc7a447","line":11679,"updated":"2026-06-30 09:50:48.000000000","message":"I don\u0027t quite get this.\nShouldn\u0027t the cache be invalidated on SBA write instead of flushing?","commit_id":"93a75d9187d84046e6d2585125ea463c45e305ca"},{"author":{"_account_id":1002315,"name":"liangzhen","email":"zhen.liang@spacemit.com","username":"liangzhen"},"change_message_id":"140c2f9fa43892d73adec381b81793728be79199","unresolved":true,"context_lines":[{"line_number":11676,"context_line":""},{"line_number":11677,"context_line":"@itemize"},{"line_number":11678,"context_line":"@item @code{-sba-flush-cache} @option{off}|@option{on} -- determines whether"},{"line_number":11679,"context_line":"OpenOCD will automatically execute RISC-V CMO instructions (@var{cbo.flush})"},{"line_number":11680,"context_line":"when write memory via RISC-V Debug System Bus interface. Defaults to @option{on}."},{"line_number":11681,"context_line":""},{"line_number":11682,"context_line":"@itemize"}],"source_content_type":"text/x-texinfo","patch_set":2,"id":"bee98471_d52040e5","line":11679,"in_reply_to":"3951fdb0_1fc7a447","updated":"2026-06-30 10:48:19.000000000","message":"Thank you for reviewing this patch.\n\ncbo.flush is a cache block operation that cleans and invalidates a specific cache line. Is it inaccurate to use cbo.inval without a write back operation?","commit_id":"93a75d9187d84046e6d2585125ea463c45e305ca"},{"author":{"_account_id":1002315,"name":"liangzhen","email":"zhen.liang@spacemit.com","username":"liangzhen"},"change_message_id":"3faa1199f684e9a38e0c10c912d229aad8f94971","unresolved":true,"context_lines":[{"line_number":11676,"context_line":""},{"line_number":11677,"context_line":"@itemize"},{"line_number":11678,"context_line":"@item @code{-sba-flush-cache} @option{off}|@option{on} -- determines whether"},{"line_number":11679,"context_line":"OpenOCD will automatically execute RISC-V CMO instructions (@var{cbo.flush})"},{"line_number":11680,"context_line":"when write memory via RISC-V Debug System Bus interface. Defaults to @option{on}."},{"line_number":11681,"context_line":""},{"line_number":11682,"context_line":"@itemize"}],"source_content_type":"text/x-texinfo","patch_set":2,"id":"0efc5438_988e391c","line":11679,"in_reply_to":"bee98471_d52040e5","updated":"2026-06-30 14:23:27.000000000","message":"Is it unreasonable if cbo.invalid succeeds but SBA write fails?","commit_id":"93a75d9187d84046e6d2585125ea463c45e305ca"}],"src/target/riscv/opcodes.h":[{"author":{"_account_id":1002047,"name":"Evgeniy Naydanov","email":"eugnay@gmail.com","username":"en-sc"},"change_message_id":"db95613a54a5a2a67e266f2bdc16f76c587c201a","unresolved":true,"context_lines":[{"line_number":446,"context_line":"\treturn (vm ? (1u \u003c\u003c 25) : 0u) | inst_rs2(vs2) | inst_rs1(rs1) | inst_rd(vd) | MATCH_VSLIDE1DOWN_VX;"},{"line_number":447,"context_line":"}"},{"line_number":448,"context_line":""},{"line_number":449,"context_line":"static uint32_t cbo_flush(unsigned int rs1) __attribute__((unused));"},{"line_number":450,"context_line":"static uint32_t cbo_flush(unsigned int rs1)"},{"line_number":451,"context_line":"{"},{"line_number":452,"context_line":"\tassert(rs1 \u003c\u003d MAX_GPR_NUM);"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"1945e89c_63c89f9d","line":449,"updated":"2026-06-30 09:50:48.000000000","message":"IMHO, this is a peculiar usage of `__attribute__((unused))`.\n\nPlease, consider `static inline` insted.\n\nI\u0027ve created https://review.openocd.org/c/openocd/+/9320 to address other cases.","commit_id":"93a75d9187d84046e6d2585125ea463c45e305ca"},{"author":{"_account_id":1002315,"name":"liangzhen","email":"zhen.liang@spacemit.com","username":"liangzhen"},"change_message_id":"3faa1199f684e9a38e0c10c912d229aad8f94971","unresolved":false,"context_lines":[{"line_number":446,"context_line":"\treturn (vm ? (1u \u003c\u003c 25) : 0u) | inst_rs2(vs2) | inst_rs1(rs1) | inst_rd(vd) | MATCH_VSLIDE1DOWN_VX;"},{"line_number":447,"context_line":"}"},{"line_number":448,"context_line":""},{"line_number":449,"context_line":"static uint32_t cbo_flush(unsigned int rs1) __attribute__((unused));"},{"line_number":450,"context_line":"static uint32_t cbo_flush(unsigned int rs1)"},{"line_number":451,"context_line":"{"},{"line_number":452,"context_line":"\tassert(rs1 \u003c\u003d MAX_GPR_NUM);"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"dbe2be25_9ba6b9dc","line":449,"in_reply_to":"1945e89c_63c89f9d","updated":"2026-06-30 14:23:27.000000000","message":"Done","commit_id":"93a75d9187d84046e6d2585125ea463c45e305ca"}],"src/target/riscv/riscv-013.c":[{"author":{"_account_id":1002047,"name":"Evgeniy Naydanov","email":"eugnay@gmail.com","username":"en-sc"},"change_message_id":"db95613a54a5a2a67e266f2bdc16f76c587c201a","unresolved":true,"context_lines":[{"line_number":3119,"context_line":"\t\tif (riscv_program_insert(\u0026program, cbo_flush(GDB_REGNO_S0)) !\u003d ERROR_OK)"},{"line_number":3120,"context_line":"\t\t\treturn ERROR_FAIL;"},{"line_number":3121,"context_line":""},{"line_number":3122,"context_line":"\t\tif (riscv_program_addi(\u0026program, GDB_REGNO_S0, GDB_REGNO_S0, CACHE_LINE_SIZE) !\u003d ERROR_OK)"},{"line_number":3123,"context_line":"\t\t\treturn ERROR_FAIL;"},{"line_number":3124,"context_line":""},{"line_number":3125,"context_line":"\t\tif (riscv_program_ebreak(\u0026program) !\u003d ERROR_OK)"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"f247b61a_b3113363","line":3122,"updated":"2026-06-30 09:50:48.000000000","message":"I believe by default the stride should be 32-bytes, since it is the minimum cache line size. It would be great for a user to have a parameter that configures the cache line size, but this can be done in a separate patch.","commit_id":"93a75d9187d84046e6d2585125ea463c45e305ca"},{"author":{"_account_id":1002047,"name":"Evgeniy Naydanov","email":"eugnay@gmail.com","username":"en-sc"},"change_message_id":"9730ab36ff3a85b6284ba40defa5c0a32dc397b2","unresolved":false,"context_lines":[{"line_number":3119,"context_line":"\t\tif (riscv_program_insert(\u0026program, cbo_flush(GDB_REGNO_S0)) !\u003d ERROR_OK)"},{"line_number":3120,"context_line":"\t\t\treturn ERROR_FAIL;"},{"line_number":3121,"context_line":""},{"line_number":3122,"context_line":"\t\tif (riscv_program_addi(\u0026program, GDB_REGNO_S0, GDB_REGNO_S0, CACHE_LINE_SIZE) !\u003d ERROR_OK)"},{"line_number":3123,"context_line":"\t\t\treturn ERROR_FAIL;"},{"line_number":3124,"context_line":""},{"line_number":3125,"context_line":"\t\tif (riscv_program_ebreak(\u0026program) !\u003d ERROR_OK)"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"81141609_a558ea08","line":3122,"in_reply_to":"f247b61a_b3113363","updated":"2026-06-30 09:57:09.000000000","message":"Oh, sorry, I\u0027m wrong. The spec does not limit the block size. Therefore 64 is a sensible default.","commit_id":"93a75d9187d84046e6d2585125ea463c45e305ca"},{"author":{"_account_id":1002047,"name":"Evgeniy Naydanov","email":"eugnay@gmail.com","username":"en-sc"},"change_message_id":"db95613a54a5a2a67e266f2bdc16f76c587c201a","unresolved":true,"context_lines":[{"line_number":4720,"context_line":"\triscv_addr_t t_addr \u003d 0;"},{"line_number":4721,"context_line":"\tconst uint8_t *t_buffer \u003d args.write_buffer + offset;"},{"line_number":4722,"context_line":""},{"line_number":4723,"context_line":"\tflush_cache(target, args.address, args.count * args.size);"},{"line_number":4724,"context_line":""},{"line_number":4725,"context_line":"\t/* B.8 Writing Memory, single write check if we write in one go */"},{"line_number":4726,"context_line":"\tif (args.count \u003d\u003d 1) { /* count is in bytes here */"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"e3b6e034_c82a895a","line":4723,"updated":"2026-06-30 09:50:48.000000000","message":"Please don\u0027t ignore the return code.","commit_id":"93a75d9187d84046e6d2585125ea463c45e305ca"},{"author":{"_account_id":1002315,"name":"liangzhen","email":"zhen.liang@spacemit.com","username":"liangzhen"},"change_message_id":"3faa1199f684e9a38e0c10c912d229aad8f94971","unresolved":false,"context_lines":[{"line_number":4720,"context_line":"\triscv_addr_t t_addr \u003d 0;"},{"line_number":4721,"context_line":"\tconst uint8_t *t_buffer \u003d args.write_buffer + offset;"},{"line_number":4722,"context_line":""},{"line_number":4723,"context_line":"\tflush_cache(target, args.address, args.count * args.size);"},{"line_number":4724,"context_line":""},{"line_number":4725,"context_line":"\t/* B.8 Writing Memory, single write check if we write in one go */"},{"line_number":4726,"context_line":"\tif (args.count \u003d\u003d 1) { /* count is in bytes here */"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"7d15835c_bc0f853b","line":4723,"in_reply_to":"e3b6e034_c82a895a","updated":"2026-06-30 14:23:27.000000000","message":"Done","commit_id":"93a75d9187d84046e6d2585125ea463c45e305ca"}],"src/target/riscv/riscv.c":[{"author":{"_account_id":1002047,"name":"Evgeniy Naydanov","email":"eugnay@gmail.com","username":"en-sc"},"change_message_id":"db95613a54a5a2a67e266f2bdc16f76c587c201a","unresolved":true,"context_lines":[{"line_number":486,"context_line":"\tfor (unsigned int i \u003d 0; i \u003c ARRAY_SIZE(config-\u003edcsr_ebreak_fields); ++i)"},{"line_number":487,"context_line":"\t\tconfig-\u003edcsr_ebreak_fields[i] \u003d true;"},{"line_number":488,"context_line":""},{"line_number":489,"context_line":"\tconfig-\u003esba_flush_cache \u003d true;"},{"line_number":490,"context_line":""},{"line_number":491,"context_line":"\treturn config;"},{"line_number":492,"context_line":"}"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"1183aedb_d43ddf72","line":489,"updated":"2026-06-30 09:50:48.000000000","message":"I\u0027d suggest to preserve the default behavior and make it `false` here.","commit_id":"93a75d9187d84046e6d2585125ea463c45e305ca"},{"author":{"_account_id":1002315,"name":"liangzhen","email":"zhen.liang@spacemit.com","username":"liangzhen"},"change_message_id":"3faa1199f684e9a38e0c10c912d229aad8f94971","unresolved":false,"context_lines":[{"line_number":486,"context_line":"\tfor (unsigned int i \u003d 0; i \u003c ARRAY_SIZE(config-\u003edcsr_ebreak_fields); ++i)"},{"line_number":487,"context_line":"\t\tconfig-\u003edcsr_ebreak_fields[i] \u003d true;"},{"line_number":488,"context_line":""},{"line_number":489,"context_line":"\tconfig-\u003esba_flush_cache \u003d true;"},{"line_number":490,"context_line":""},{"line_number":491,"context_line":"\treturn config;"},{"line_number":492,"context_line":"}"}],"source_content_type":"text/x-csrc","patch_set":2,"id":"e066107c_38baf3f2","line":489,"in_reply_to":"1183aedb_d43ddf72","updated":"2026-06-30 14:23:27.000000000","message":"Done","commit_id":"93a75d9187d84046e6d2585125ea463c45e305ca"}]}