)]}'
{"/PATCHSET_LEVEL":[{"author":{"_account_id":1000853,"name":"Marc Schink","display_name":"Marc Schink","email":"dev@zapb.de","username":"zapb"},"change_message_id":"836572e2635e0b9b6741858ba3d19e36092dbcaa","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"233e914f_4ea02011","updated":"2026-01-21 20:40:37.000000000","message":"Thanks for the patch, Nguyen! Can you disclose the actual device you are using? I would like the test it on the same or similar target device.","commit_id":"31834643f49893d7c9b18acf28e45d587bd98f27"},{"author":{"_account_id":1002489,"name":"Nguyen Huy Hoang","email":"huyhoang3082001@gmail.com","username":"hhoang308"},"change_message_id":"9be581db9dae85b815695ff491c7c89a836fb544","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":2,"id":"195e26e7_4a2a5382","in_reply_to":"0c10854f_b7aeb9fb","updated":"2026-01-24 16:44:24.000000000","message":"Thanks for pointing that out. I have updated the rtt_channel struct to use uint64_t. Please let me know if you find any further problems.","commit_id":"31834643f49893d7c9b18acf28e45d587bd98f27"},{"author":{"_account_id":1002489,"name":"Nguyen Huy Hoang","email":"huyhoang3082001@gmail.com","username":"hhoang308"},"change_message_id":"7f932dc98b653741f44b3e57dc85589f1fa831a3","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"17c64087_b749db9c","in_reply_to":"195e26e7_4a2a5382","updated":"2026-01-30 01:09:26.000000000","message":"Done","commit_id":"31834643f49893d7c9b18acf28e45d587bd98f27"},{"author":{"_account_id":1002489,"name":"Nguyen Huy Hoang","email":"huyhoang3082001@gmail.com","username":"hhoang308"},"change_message_id":"612b97661a3aee7f01348a412eb07daf22d85482","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":2,"id":"5762f251_b39a961f","in_reply_to":"233e914f_4ea02011","updated":"2026-01-22 02:21:15.000000000","message":"The actual target I am using is a custom FPGA implementation of a RISC-V 64-bit core running Zephyr RTOS. I also applied the patch from https://review.openocd.org/c/openocd/+/8234 to enable RTT support for RISC-V on my build.\n\nHowever, I think this issue is not specific to my hardware. It is strictly an architectural mismatch caused by the LP64 data model (8-byte pointers) used in 64-bit RISC-V, whereas OpenOCD currently hardcodes ILP32 (32-bit) offsets.\n\nI have verified this by building the Zephyr RTT sample for both `qemu_riscv32` and `qemu_riscv64` and inspecting the `SEGGER_RTT_BUFFER_UP` struct layout using GDB. The offset mismatch for `RdOff` (which causes the corruption) is evident:\n\n1. On 32-bit (qemu_riscv32) - RdOff is at offset 16 (0x10):\n```\n(gdb) ptype /o SEGGER_RTT_BUFFER_UP\ntype \u003d struct {\n/* 0      |      4 */    const char *sName;\n/* 4      |      4 */    char *pBuffer;\n/* 8      |      4 */    unsigned int SizeOfBuffer;\n/* 12      |      4 */    unsigned int WrOff;\n/* 16      |      4 */    volatile unsigned int RdOff;\n/* 20      |      4 */    unsigned int Flags;\n                              /* total size (bytes):   24 */\n                            }\n```\n\n2. On 64-bit (qemu_riscv64, and also my FPGA) - RdOff is at offset 24 (0x18):\n```\n(gdb) ptype /o SEGGER_RTT_BUFFER_UP\ntype \u003d struct {\n/* 0      |      8 */    const char *sName;\n/* 8      |      8 */    char *pBuffer;\n/* 16      |      4 */    unsigned int SizeOfBuffer;\n/* 20      |      4 */    unsigned int WrOff;\n/* 24      |      4 */    volatile unsigned int RdOff;\n/* 28      |      4 */    unsigned int Flags;\n                              /* total size (bytes):   32 */\n                            }\n```\n\nSince this is a standard alignment issue, I think it should be able to reproduced on any standard 64-bit RISC-V target, but I dont have another one here, so it would be great if you verify it for me.\n\nPlease let me know if you need any further information.","commit_id":"31834643f49893d7c9b18acf28e45d587bd98f27"},{"author":{"_account_id":1000853,"name":"Marc Schink","display_name":"Marc Schink","email":"dev@zapb.de","username":"zapb"},"change_message_id":"ebb2620de03f62482db06d7a6676d2a427ba954d","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":2,"id":"0c10854f_b7aeb9fb","in_reply_to":"5762f251_b39a961f","updated":"2026-01-23 08:34:52.000000000","message":"I understand your point of view. I only asked about your target because I need a board for testing. I found a board — I just need some time to get firmware with RTT running on it.\n\nAnyway, one problem with your patch is that you still read only 32-bit addresses, right? I assume that this works in your case because you do not exceed the 32-bit address space.","commit_id":"31834643f49893d7c9b18acf28e45d587bd98f27"}],"src/rtt/rtt.h":[{"author":{"_account_id":1000853,"name":"Marc Schink","display_name":"Marc Schink","email":"dev@zapb.de","username":"zapb"},"change_message_id":"156b96da78357fe1c3bd74f647f976a8abebb360","unresolved":true,"context_lines":[{"line_number":47,"context_line":"\t/** Channel structure address on the target. */"},{"line_number":48,"context_line":"\ttarget_addr_t address;"},{"line_number":49,"context_line":"\t/** Channel name address on the target. */"},{"line_number":50,"context_line":"\tuint64_t name_addr;"},{"line_number":51,"context_line":"\t/** Buffer address on the target. */"},{"line_number":52,"context_line":"\tuint64_t buffer_addr;"},{"line_number":53,"context_line":"\t/** Channel buffer size in bytes. */"}],"source_content_type":"text/x-csrc","patch_set":3,"id":"02eb3d19_616401c1","line":50,"updated":"2026-01-26 20:32:05.000000000","message":"This should be `target_addr_t`.","commit_id":"3580d027b8edc9d5789a49e63e37d5a10019bafb"},{"author":{"_account_id":1002489,"name":"Nguyen Huy Hoang","email":"huyhoang3082001@gmail.com","username":"hhoang308"},"change_message_id":"99bed3deb43e6324ff562dc8c529fabac5e18fbc","unresolved":false,"context_lines":[{"line_number":47,"context_line":"\t/** Channel structure address on the target. */"},{"line_number":48,"context_line":"\ttarget_addr_t address;"},{"line_number":49,"context_line":"\t/** Channel name address on the target. */"},{"line_number":50,"context_line":"\tuint64_t name_addr;"},{"line_number":51,"context_line":"\t/** Buffer address on the target. */"},{"line_number":52,"context_line":"\tuint64_t buffer_addr;"},{"line_number":53,"context_line":"\t/** Channel buffer size in bytes. */"}],"source_content_type":"text/x-csrc","patch_set":3,"id":"a6755ec9_482a276c","line":50,"in_reply_to":"02eb3d19_616401c1","updated":"2026-01-27 17:09:43.000000000","message":"Done","commit_id":"3580d027b8edc9d5789a49e63e37d5a10019bafb"},{"author":{"_account_id":1000853,"name":"Marc Schink","display_name":"Marc Schink","email":"dev@zapb.de","username":"zapb"},"change_message_id":"156b96da78357fe1c3bd74f647f976a8abebb360","unresolved":true,"context_lines":[{"line_number":49,"context_line":"\t/** Channel name address on the target. */"},{"line_number":50,"context_line":"\tuint64_t name_addr;"},{"line_number":51,"context_line":"\t/** Buffer address on the target. */"},{"line_number":52,"context_line":"\tuint64_t buffer_addr;"},{"line_number":53,"context_line":"\t/** Channel buffer size in bytes. */"},{"line_number":54,"context_line":"\tuint32_t size;"},{"line_number":55,"context_line":"\t/**  Write position within the buffer in bytes. */"}],"source_content_type":"text/x-csrc","patch_set":3,"id":"aec69e16_6604b7ad","line":52,"updated":"2026-01-26 20:32:05.000000000","message":"This also `target_addr_t`.","commit_id":"3580d027b8edc9d5789a49e63e37d5a10019bafb"},{"author":{"_account_id":1002489,"name":"Nguyen Huy Hoang","email":"huyhoang3082001@gmail.com","username":"hhoang308"},"change_message_id":"99bed3deb43e6324ff562dc8c529fabac5e18fbc","unresolved":false,"context_lines":[{"line_number":49,"context_line":"\t/** Channel name address on the target. */"},{"line_number":50,"context_line":"\tuint64_t name_addr;"},{"line_number":51,"context_line":"\t/** Buffer address on the target. */"},{"line_number":52,"context_line":"\tuint64_t buffer_addr;"},{"line_number":53,"context_line":"\t/** Channel buffer size in bytes. */"},{"line_number":54,"context_line":"\tuint32_t size;"},{"line_number":55,"context_line":"\t/**  Write position within the buffer in bytes. */"}],"source_content_type":"text/x-csrc","patch_set":3,"id":"3236dad4_a40aeab1","line":52,"in_reply_to":"aec69e16_6604b7ad","updated":"2026-01-27 17:09:43.000000000","message":"Done","commit_id":"3580d027b8edc9d5789a49e63e37d5a10019bafb"},{"author":{"_account_id":1000853,"name":"Marc Schink","display_name":"Marc Schink","email":"dev@zapb.de","username":"zapb"},"change_message_id":"156b96da78357fe1c3bd74f647f976a8abebb360","unresolved":true,"context_lines":[{"line_number":53,"context_line":"\t/** Channel buffer size in bytes. */"},{"line_number":54,"context_line":"\tuint32_t size;"},{"line_number":55,"context_line":"\t/**  Write position within the buffer in bytes. */"},{"line_number":56,"context_line":"\tuint64_t write_pos;"},{"line_number":57,"context_line":"\t/** Read position within the buffer in bytes. */"},{"line_number":58,"context_line":"\tuint64_t read_pos;"},{"line_number":59,"context_line":"\t/**"}],"source_content_type":"text/x-csrc","patch_set":3,"id":"6f83e827_22c14d8e","line":56,"updated":"2026-01-26 20:32:05.000000000","message":"Why are you using 64 bits here now? As you already mentioned, the read and write offset is 4 bytes on 32 and 64-bit targets.","commit_id":"3580d027b8edc9d5789a49e63e37d5a10019bafb"},{"author":{"_account_id":1002489,"name":"Nguyen Huy Hoang","email":"huyhoang3082001@gmail.com","username":"hhoang308"},"change_message_id":"99bed3deb43e6324ff562dc8c529fabac5e18fbc","unresolved":false,"context_lines":[{"line_number":53,"context_line":"\t/** Channel buffer size in bytes. */"},{"line_number":54,"context_line":"\tuint32_t size;"},{"line_number":55,"context_line":"\t/**  Write position within the buffer in bytes. */"},{"line_number":56,"context_line":"\tuint64_t write_pos;"},{"line_number":57,"context_line":"\t/** Read position within the buffer in bytes. */"},{"line_number":58,"context_line":"\tuint64_t read_pos;"},{"line_number":59,"context_line":"\t/**"}],"source_content_type":"text/x-csrc","patch_set":3,"id":"4e0e27e0_d38a81da","line":56,"in_reply_to":"6f83e827_22c14d8e","updated":"2026-01-27 17:09:43.000000000","message":"My mistake, I missed that while editing. I\u0027ve reverted it back to `uint32_t` now. Thanks!","commit_id":"3580d027b8edc9d5789a49e63e37d5a10019bafb"}],"src/target/rtt.c":[{"author":{"_account_id":1000853,"name":"Marc Schink","display_name":"Marc Schink","email":"dev@zapb.de","username":"zapb"},"change_message_id":"156b96da78357fe1c3bd74f647f976a8abebb360","unresolved":true,"context_lines":[{"line_number":75,"context_line":"\t\treturn ret;"},{"line_number":76,"context_line":""},{"line_number":77,"context_line":"\tchannel-\u003eaddress \u003d address;"},{"line_number":78,"context_line":"\tchannel-\u003ename_addr \u003d target_buffer_get_u32(target, buf + 0);"},{"line_number":79,"context_line":"\tchannel-\u003ebuffer_addr \u003d target_buffer_get_u32(target, buf + params-\u003ebuffer_addr_offset);"},{"line_number":80,"context_line":"\tchannel-\u003esize \u003d target_buffer_get_u32(target, buf + params-\u003esize_offset);"},{"line_number":81,"context_line":"\tchannel-\u003ewrite_pos \u003d target_buffer_get_u32(target, buf + params-\u003ewrite_pos_offset);"}],"source_content_type":"text/x-csrc","patch_set":3,"id":"f3f80c56_dbdb7a3b","line":78,"updated":"2026-01-26 20:32:05.000000000","message":"You still read only 32 bit from the channel struct on the target. This should be `target_buffer_get_u64()`, depending on the target address bits.","commit_id":"3580d027b8edc9d5789a49e63e37d5a10019bafb"},{"author":{"_account_id":1002489,"name":"Nguyen Huy Hoang","email":"huyhoang3082001@gmail.com","username":"hhoang308"},"change_message_id":"99bed3deb43e6324ff562dc8c529fabac5e18fbc","unresolved":false,"context_lines":[{"line_number":75,"context_line":"\t\treturn ret;"},{"line_number":76,"context_line":""},{"line_number":77,"context_line":"\tchannel-\u003eaddress \u003d address;"},{"line_number":78,"context_line":"\tchannel-\u003ename_addr \u003d target_buffer_get_u32(target, buf + 0);"},{"line_number":79,"context_line":"\tchannel-\u003ebuffer_addr \u003d target_buffer_get_u32(target, buf + params-\u003ebuffer_addr_offset);"},{"line_number":80,"context_line":"\tchannel-\u003esize \u003d target_buffer_get_u32(target, buf + params-\u003esize_offset);"},{"line_number":81,"context_line":"\tchannel-\u003ewrite_pos \u003d target_buffer_get_u32(target, buf + params-\u003ewrite_pos_offset);"}],"source_content_type":"text/x-csrc","patch_set":3,"id":"d0cd04b1_c5c26a2a","line":78,"in_reply_to":"f3f80c56_dbdb7a3b","updated":"2026-01-27 17:09:43.000000000","message":"Done","commit_id":"3580d027b8edc9d5789a49e63e37d5a10019bafb"},{"author":{"_account_id":1000853,"name":"Marc Schink","display_name":"Marc Schink","email":"dev@zapb.de","username":"zapb"},"change_message_id":"156b96da78357fe1c3bd74f647f976a8abebb360","unresolved":true,"context_lines":[{"line_number":76,"context_line":""},{"line_number":77,"context_line":"\tchannel-\u003eaddress \u003d address;"},{"line_number":78,"context_line":"\tchannel-\u003ename_addr \u003d target_buffer_get_u32(target, buf + 0);"},{"line_number":79,"context_line":"\tchannel-\u003ebuffer_addr \u003d target_buffer_get_u32(target, buf + params-\u003ebuffer_addr_offset);"},{"line_number":80,"context_line":"\tchannel-\u003esize \u003d target_buffer_get_u32(target, buf + params-\u003esize_offset);"},{"line_number":81,"context_line":"\tchannel-\u003ewrite_pos \u003d target_buffer_get_u32(target, buf + params-\u003ewrite_pos_offset);"},{"line_number":82,"context_line":"\tchannel-\u003eread_pos \u003d target_buffer_get_u32(target, buf + params-\u003eread_pos_offset);"}],"source_content_type":"text/x-csrc","patch_set":3,"id":"c2d70434_9dcf91ac","line":79,"updated":"2026-01-26 20:32:05.000000000","message":"Same here.","commit_id":"3580d027b8edc9d5789a49e63e37d5a10019bafb"},{"author":{"_account_id":1002489,"name":"Nguyen Huy Hoang","email":"huyhoang3082001@gmail.com","username":"hhoang308"},"change_message_id":"99bed3deb43e6324ff562dc8c529fabac5e18fbc","unresolved":false,"context_lines":[{"line_number":76,"context_line":""},{"line_number":77,"context_line":"\tchannel-\u003eaddress \u003d address;"},{"line_number":78,"context_line":"\tchannel-\u003ename_addr \u003d target_buffer_get_u32(target, buf + 0);"},{"line_number":79,"context_line":"\tchannel-\u003ebuffer_addr \u003d target_buffer_get_u32(target, buf + params-\u003ebuffer_addr_offset);"},{"line_number":80,"context_line":"\tchannel-\u003esize \u003d target_buffer_get_u32(target, buf + params-\u003esize_offset);"},{"line_number":81,"context_line":"\tchannel-\u003ewrite_pos \u003d target_buffer_get_u32(target, buf + params-\u003ewrite_pos_offset);"},{"line_number":82,"context_line":"\tchannel-\u003eread_pos \u003d target_buffer_get_u32(target, buf + params-\u003eread_pos_offset);"}],"source_content_type":"text/x-csrc","patch_set":3,"id":"5dd0b59e_6f11a529","line":79,"in_reply_to":"c2d70434_9dcf91ac","updated":"2026-01-27 17:09:43.000000000","message":"Done","commit_id":"3580d027b8edc9d5789a49e63e37d5a10019bafb"}]}