)]}'
{"/COMMIT_MSG":[{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"f21bc86b6906def073a213b695c2af01d08d2961","unresolved":true,"context_lines":[{"line_number":10,"context_line":"on Core Reset). The standard SYSRESETREQ also resets the debug interface,"},{"line_number":11,"context_line":"causing the core to exit reset before OpenOCD can set up vector catch."},{"line_number":12,"context_line":""},{"line_number":13,"context_line":"Add a custom reset procedure using the Flash Patch and Breakpoint (FPB)"},{"line_number":14,"context_line":"unit."},{"line_number":15,"context_line":"    1. Halt the core via direct DHCSR access"},{"line_number":16,"context_line":"    2. Read the reset vector from flash"},{"line_number":17,"context_line":"    3. Set an FPB breakpoint at the reset vector"},{"line_number":18,"context_line":"    4. Issue SYSRESETREQ"},{"line_number":19,"context_line":"    5. Core halts when it hits the breakpoint at reset vector"},{"line_number":20,"context_line":""},{"line_number":21,"context_line":"[I still have several issues with this patch. I send it to get some"},{"line_number":22,"context_line":"feedback, but it is not ready for merge]"},{"line_number":23,"context_line":""},{"line_number":24,"context_line":"Signed-off-by: Jérôme Pouiller \u003cjerome.pouiller@silabs.com\u003e"},{"line_number":25,"context_line":"Change-Id: I056397f33737ff1ccee0fd702c2edf992512c01f"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":8,"id":"6e5d9c85_cdb58b96","line":22,"range":{"start_line":13,"start_character":0,"end_line":22,"end_character":40},"updated":"2026-02-07 17:04:56.000000000","message":"Please update","commit_id":"b4f58e90bede9abf016585873432d82278cf4720"}],"/PATCHSET_LEVEL":[{"author":{"_account_id":1002493,"name":"Jérôme Pouiller","email":"jerome.pouiller@silabs.com","username":"jerome-pouiller"},"change_message_id":"4ca8bf6c816c757283fbb133c020a82593f291c5","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":9,"id":"ccdc04e1_9f6cf8bb","updated":"2026-02-10 12:59:44.000000000","message":"FYI, I have not modified this patch. I would like to focus on the integration of the first patches. I will see later if I still have time to take care about this one.","commit_id":"9be0519ba27a8c2a2d1f4984a1ea5b759273cafb"}],"tcl/target/efr32xg27.cfg":[{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"7ffbf174beb9463c2bc7e2d212ae36421cb01f71","unresolved":true,"context_lines":[{"line_number":17,"context_line":"   set dap [$target cget -dap]"},{"line_number":18,"context_line":""},{"line_number":19,"context_line":"   # Configure CSW for 32-bit access, auto-increment off"},{"line_number":20,"context_line":"   $dap apreg 0 0x00 0x23000002"},{"line_number":21,"context_line":""},{"line_number":22,"context_line":"   # Halt core by writing to DHCSR (0xE000EDF0)"},{"line_number":23,"context_line":"   set halt_cmd [expr {0xA05F0000 | 0x3}]  ;# DBGKEY | C_DEBUGEN | C_HALT"}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"0e1a139a_830696e9","line":20,"updated":"2026-01-25 15:54:41.000000000","message":"Any reason why bp setting takes place on the lowest level of DAP registers?\nIt\u0027s not possible to simply use OpenOCD `bp` command? E.g. target/max32675.cfg\nand target/max32690.cfg do something similar but way simpler...\n\nAnyway it\u0027s very sad to see such workaround. If the code programmed in the flash makes a nasty error that blocks DAP debugging, then the device is probably irreversibly bricked as there is no way to halt it and set the bp. Or am I wrong?","commit_id":"e537fe3105e0a6d137713ae8dec1782e07f9649f"},{"author":{"_account_id":1002493,"name":"Jérôme Pouiller","email":"jerome.pouiller@silabs.com","username":"jerome-pouiller"},"change_message_id":"a4f6d0ba546ebae57bc4faeb1e64aebdfdf1ffb7","unresolved":true,"context_lines":[{"line_number":17,"context_line":"   set dap [$target cget -dap]"},{"line_number":18,"context_line":""},{"line_number":19,"context_line":"   # Configure CSW for 32-bit access, auto-increment off"},{"line_number":20,"context_line":"   $dap apreg 0 0x00 0x23000002"},{"line_number":21,"context_line":""},{"line_number":22,"context_line":"   # Halt core by writing to DHCSR (0xE000EDF0)"},{"line_number":23,"context_line":"   set halt_cmd [expr {0xA05F0000 | 0x3}]  ;# DBGKEY | C_DEBUGEN | C_HALT"}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"bfc3fd8d_cc24c288","line":20,"in_reply_to":"0e1a139a_830696e9","updated":"2026-02-04 16:41:39.000000000","message":"I have indeed noticed some issues with this patch. I will probably won\u0027t have time to fix it in the near future. I post it in case someone would continue the work.","commit_id":"e537fe3105e0a6d137713ae8dec1782e07f9649f"}],"tcl/target/silabs/series2.cfg":[{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"f21bc86b6906def073a213b695c2af01d08d2961","unresolved":true,"context_lines":[{"line_number":76,"context_line":""},{"line_number":77,"context_line":"proc silabs_s2_reset_assert_pre {flashbase do_halt} {"},{"line_number":78,"context_line":"   global _silabs_s2_bp_addr"},{"line_number":79,"context_line":"   global _TARGETNAME"},{"line_number":80,"context_line":""},{"line_number":81,"context_line":"   if {!$do_halt} {"},{"line_number":82,"context_line":"      return"}],"source_content_type":"text/x-ttcn-cfg","patch_set":8,"id":"2a1b6cc1_ed1d1f10","line":79,"updated":"2026-02-07 17:04:56.000000000","message":"Don\u0027t use global _TARGETNAME. The event infrastructure ensures that\nthe target the event being invoked on is the current target during\nevent servicing.","commit_id":"b4f58e90bede9abf016585873432d82278cf4720"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"f21bc86b6906def073a213b695c2af01d08d2961","unresolved":true,"context_lines":[{"line_number":80,"context_line":""},{"line_number":81,"context_line":"   if {!$do_halt} {"},{"line_number":82,"context_line":"      return"},{"line_number":83,"context_line":"   }"},{"line_number":84,"context_line":""},{"line_number":85,"context_line":"   # Read reset vector from flash (vector table at flashbase + 4)"},{"line_number":86,"context_line":"   set vector_addr [expr {$flashbase + 4}]"}],"source_content_type":"text/x-ttcn-cfg","patch_set":8,"id":"4268a07e_a522f65f","line":83,"updated":"2026-02-07 17:04:56.000000000","message":"Works nicely for `reset_config none`.\n\nWhen HW RESETn signal is used (`reset_config srst_only`)\n`reset run` is little bit too verbose but works:\n```\n\u003e reset\nSWD DPIDR 0x6ba02477\n[efm32.cpu] Polling failed, trying to reexamine\nSWD DPIDR 0x6ba02477\nSWD DPIDR 0x6ba02477\nFailed to read memory at 0xe000ed00\n[efm32.cpu] Examination failed\nSuccessfully connected to DCI\nDCI WPENDING bit set, retrying\nDCI SESTATUS response:\nDebug lock (config): Disabled\nDevice erase: Enabled\nSecure debug: Disabled\nDebug lock (hw status): Disabled\n[efm32.cpu] Examination failed, GDB will be halted. Polling again in 100ms\n[efm32.cpu] external reset detected\n[efm32.cpu] Polling failed, trying to reexamine\n[efm32.cpu] Cortex-M33 r0p4 processor detected\n[efm32.cpu] target has 8 breakpoints, 4 watchpoints\n[efm32.cpu] Examination succeed\n```\nThe rubbish above may depend on used adapter - I\u0027m on RPI5 gpiod bitbang.\n\nUnfortunately \u0027reset halt\u0027 does not halt in `reset_config srst_only`.\nI\u0027m afraid it\u0027s the Series-2 hardware limitation - if so then the devices are\nprobably liable to bricking when the flashed app does something nasty what breaks SWD communication (stops clocks, reassigns SWD GPIO). Or is some\nway to directly halt CPU after RESETn signal?\n\nIf there is no way to accomplish it then I would recommend adding something like:\n```\nset reset_config_options [reset_config]\nif {[string match {srst_only *} $reset_config_options]\n        || [string match {srst_and_trst *} $reset_config_options]} {\n    echo \"Warn : Halting on HW reset not possible due to the device limitation\"\n    echo \"Info : Reconfigure to \u0027reset_config none\u0027\"\n    return\n}\n```","commit_id":"b4f58e90bede9abf016585873432d82278cf4720"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"f21bc86b6906def073a213b695c2af01d08d2961","unresolved":true,"context_lines":[{"line_number":84,"context_line":""},{"line_number":85,"context_line":"   # Read reset vector from flash (vector table at flashbase + 4)"},{"line_number":86,"context_line":"   set vector_addr [expr {$flashbase + 4}]"},{"line_number":87,"context_line":"   set reset_vector 0x[lindex [$_TARGETNAME mdw $vector_addr] 1]"},{"line_number":88,"context_line":""},{"line_number":89,"context_line":"   if {$reset_vector \u003d\u003d 0xFFFFFFFF || $reset_vector \u003d\u003d 0} {"},{"line_number":90,"context_line":"      echo \"Warning: Could not read reset vector\""}],"source_content_type":"text/x-ttcn-cfg","patch_set":8,"id":"7ed203bc_25f4d632","line":87,"range":{"start_line":87,"start_character":20,"end_line":87,"end_character":64},"updated":"2026-02-07 17:04:56.000000000","message":"`set reset_vector [read_memory $vector_addr 32 1]`","commit_id":"b4f58e90bede9abf016585873432d82278cf4720"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"f21bc86b6906def073a213b695c2af01d08d2961","unresolved":true,"context_lines":[{"line_number":100,"context_line":""},{"line_number":101,"context_line":"proc silabs_s2_reset_deassert_post {do_halt} {"},{"line_number":102,"context_line":"   global _silabs_s2_bp_addr"},{"line_number":103,"context_line":"   global _TARGETNAME"},{"line_number":104,"context_line":""},{"line_number":105,"context_line":"   if {!$do_halt} {"},{"line_number":106,"context_line":"      return"}],"source_content_type":"text/x-ttcn-cfg","patch_set":8,"id":"7104127e_456302bf","line":103,"updated":"2026-02-07 17:04:56.000000000","message":"Don\u0027t use global _TARGETNAME, see above","commit_id":"b4f58e90bede9abf016585873432d82278cf4720"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"f21bc86b6906def073a213b695c2af01d08d2961","unresolved":true,"context_lines":[{"line_number":101,"context_line":"proc silabs_s2_reset_deassert_post {do_halt} {"},{"line_number":102,"context_line":"   global _silabs_s2_bp_addr"},{"line_number":103,"context_line":"   global _TARGETNAME"},{"line_number":104,"context_line":""},{"line_number":105,"context_line":"   if {!$do_halt} {"},{"line_number":106,"context_line":"      return"},{"line_number":107,"context_line":"   }"}],"source_content_type":"text/x-ttcn-cfg","patch_set":8,"id":"c2c56942_803969ee","line":104,"updated":"2026-02-07 17:04:56.000000000","message":"If halting after HW reset is not possible, insert something like:\n```\nset target [target current]\nset reset_config_options [reset_config]\nif {[string match {srst_only *} $reset_config_options]\n        || [string match {srst_and_trst *} $reset_config_options]} {\n     # Wait till debug port is re-enabled\n     sleep 15\n\n     if {!$do_halt} {\n         return\n     }\n\n     $target arp_examine\n     $target arp_halt\n     echo \"Warn : Program run after reset\"\n     return\n}\n```\n\nThe short sleep avoids logging lot of errors in case of `reset run`@`reset_config srst_only` as commented above. No sure if different sleep time is needed on other devices.","commit_id":"b4f58e90bede9abf016585873432d82278cf4720"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"e1772c3849bc95a513b3c015f14911b4d1b0c7c3","unresolved":true,"context_lines":[{"line_number":101,"context_line":"proc silabs_s2_reset_deassert_post {do_halt} {"},{"line_number":102,"context_line":"   global _silabs_s2_bp_addr"},{"line_number":103,"context_line":"   global _TARGETNAME"},{"line_number":104,"context_line":""},{"line_number":105,"context_line":"   if {!$do_halt} {"},{"line_number":106,"context_line":"      return"},{"line_number":107,"context_line":"   }"}],"source_content_type":"text/x-ttcn-cfg","patch_set":8,"id":"1b4b7278_c944798d","line":104,"in_reply_to":"c2c56942_803969ee","updated":"2026-02-07 17:41:29.000000000","message":"Instead of `sleep 15` in this event handler better set at least:\n```\nadapter srst delay 20\n```\nin the main device config - should be same - please add the comment.\n\nThe code needs a simplification:\n```\nif {!$do_halt} {\n    return\n}\n\nset target [target current]\nset reset_config_options [reset_config]\nif {[string match {srst_only *} $reset_config_options]\n        || [string match {srst_and_trst *} $reset_config_options]} {\n      $target arp_examine\n     $target arp_halt\n     echo \"Warn : Program run after reset\"\n     return\n}\n```","commit_id":"b4f58e90bede9abf016585873432d82278cf4720"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"f21bc86b6906def073a213b695c2af01d08d2961","unresolved":true,"context_lines":[{"line_number":111,"context_line":"   }"},{"line_number":112,"context_line":""},{"line_number":113,"context_line":"   # Poll target and halt"},{"line_number":114,"context_line":"   catch {$_TARGETNAME arp_poll}"},{"line_number":115,"context_line":"   catch {$_TARGETNAME arp_poll}"},{"line_number":116,"context_line":"   catch {$_TARGETNAME arp_halt}"},{"line_number":117,"context_line":""},{"line_number":118,"context_line":"   # Remove breakpoint"},{"line_number":119,"context_line":"   catch {rbp $_silabs_s2_bp_addr}"},{"line_number":120,"context_line":"   set _silabs_s2_bp_addr 0"}],"source_content_type":"text/x-ttcn-cfg","patch_set":8,"id":"43b675c4_be5028e9","line":117,"range":{"start_line":114,"start_character":3,"end_line":117,"end_character":0},"updated":"2026-02-07 17:04:56.000000000","message":"Better just\n`catch {$target arp_waitstate halted 1000 }`","commit_id":"b4f58e90bede9abf016585873432d82278cf4720"}]}