)]}'
{"/PATCHSET_LEVEL":[{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"30c6872910531901b96a9b092a51e70846f12239","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":1,"id":"af22d26d_ae3bae96","updated":"2026-04-14 09:40:54.000000000","message":"Hi Leo, Dinesh,\nMay worth looking at this for our MPUs support.\nThanks a lot","commit_id":"c63d8abf59a0ca9cfa24cedf0bc241caaf651856"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"a3fc4aaf1d80ae4ce2c8ce3bbc0cd25872c5d275","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":1,"id":"f6b8d454_d2b0d71c","updated":"2026-04-10 08:53:36.000000000","message":"Hi Thomas,\nIt seems you are looking at new target support. \nMay I ask you to review mine please?","commit_id":"c63d8abf59a0ca9cfa24cedf0bc241caaf651856"},{"author":{"_account_id":1000853,"name":"zapb","display_name":"Marc Schink","email":"dev@zapb.de","username":"zapb"},"change_message_id":"e322f9275efddd3efdcb32a7dbf21782ff41031f","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":1,"id":"3103af6e_461b2b0e","updated":"2026-04-15 08:58:57.000000000","message":"Name the file `sama7g54-ek.cfg` (`_` -\u003e `-`), please (see config style guide).","commit_id":"c63d8abf59a0ca9cfa24cedf0bc241caaf651856"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"38c2b116d060a5d1e349f185929066bad8b5edfe","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":1,"id":"cb71eba7_8036fdea","in_reply_to":"3103af6e_461b2b0e","updated":"2026-04-15 11:28:28.000000000","message":"Hi Marc,\nIt should be good now.\nCould you approve it?","commit_id":"c63d8abf59a0ca9cfa24cedf0bc241caaf651856"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"28fb8db9277fcb99ae3aca7df9e5bc4844563353","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":1,"id":"52718cbe_9cd5d4f0","in_reply_to":"6c9ba0af_b01d1f6e","updated":"2026-04-22 08:55:38.000000000","message":"Hi Marc,\nThis is correct. The reason is because I did test using a J-Link.\nBut I will update this comment by keeping it general.","commit_id":"c63d8abf59a0ca9cfa24cedf0bc241caaf651856"},{"author":{"_account_id":1000853,"name":"zapb","display_name":"Marc Schink","email":"dev@zapb.de","username":"zapb"},"change_message_id":"187cabd47c7f19ddec2c1df11082f2b63f742aea","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":1,"id":"6c9ba0af_b01d1f6e","in_reply_to":"cb71eba7_8036fdea","updated":"2026-04-16 07:12:11.000000000","message":"Hi Frederic,\n\n\u003e Supports J-Link and CMSIS-DAP debug probes.\n\nWhat does this mean? The board has only a connector for an external debug adapter and no onboard adapter, right? It should support every (external) debug adapter not only J-Link and CMSIS-DAP.","commit_id":"c63d8abf59a0ca9cfa24cedf0bc241caaf651856"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"75c6419d3883024d147ab50884a034dceaa01aba","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"99cf2300_c42e4b29","updated":"2026-04-16 11:27:13.000000000","message":"Thanks for contributing to OpenOCD","commit_id":"91ac90c3feaf8b5c1b81bc4611c94e0fb39dec44"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"a77ba0f44fe967096f09e2359eccaa6c4b6a46eb","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":9,"id":"0dee10bb_024d666a","updated":"2026-04-22 13:42:40.000000000","message":"Dear Reviewers,\nI\u0027ve applied all requested improvements.\nCan you please review/approve?","commit_id":"b0d6cc22d7489c0fa31760df27e7ed939b23bf75"},{"author":{"_account_id":1000853,"name":"zapb","display_name":"Marc Schink","email":"dev@zapb.de","username":"zapb"},"change_message_id":"aa50f1cf2d52eaf65baa8f27555fb319ad2d0f2c","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":9,"id":"4a3bb0de_e878a221","in_reply_to":"0dee10bb_024d666a","updated":"2026-04-23 06:18:20.000000000","message":"You commit message is not updated, it still says:\n\n\u003e Supports J-Link and CMSIS-DAP debug probes.","commit_id":"b0d6cc22d7489c0fa31760df27e7ed939b23bf75"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"d790f5eed25a6084196a0fde52e7c9427805b26a","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":10,"id":"7f96e01e_83288334","updated":"2026-04-28 14:56:59.000000000","message":"Could someone please approve the pull request if all is good?","commit_id":"0bf63313e0cc209a1a885bacfb532674a72e8933"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"d878ef14dd492410ad5ee50e9fcf73eebf9e1e29","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":10,"id":"0e1f705f_e8baa398","updated":"2026-04-24 15:16:24.000000000","message":"Dear Reviewers,\nLet me know if we are good with this one 😊","commit_id":"0bf63313e0cc209a1a885bacfb532674a72e8933"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"ec3426b9caaa6556fd6b98ba3206d52b3c996a15","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":10,"id":"348724d5_f6d0037c","updated":"2026-05-12 08:15:33.000000000","message":"Hi Mark et al,\nAny reasons we can\u0027t merge this PR?","commit_id":"0bf63313e0cc209a1a885bacfb532674a72e8933"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"40219b88f76585b09a92df6701dd89de8265398e","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":11,"id":"5f059e51_9ed09368","updated":"2026-07-06 12:24:11.000000000","message":"Hi Antonio, Marc,\nIt has been now near 3 months this one is waiting for some conclusion.\nI would really need this PR to be merged at some point.\nYou did merge quickly our new OpenOCD probe but not the boards which connect to...\nCan you please advise?","commit_id":"c91cb889c959a42cb8a5970b959173be57817e9c"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"e433ff2b8c36f99bb2590afa0fbe449a29b08b83","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":11,"id":"5ba921e0_f20d1c1c","updated":"2026-06-04 09:09:22.000000000","message":"Hi Antonio, Tomas, Marc,\nWhat are the remaining steps to move forward on this pull request please?\nPlease let me know.","commit_id":"c91cb889c959a42cb8a5970b959173be57817e9c"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"310474b2cdc6b0a429ebd9714b0f10d3488fc9e0","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":11,"id":"9924019b_983f3378","updated":"2026-06-01 11:47:17.000000000","message":"Hi Tomas,\n\nhere is a better answer ;)","commit_id":"c91cb889c959a42cb8a5970b959173be57817e9c"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"d0c86a6500b7165c084e034ce912195142194007","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":11,"id":"e4d5f1e2_2712a253","updated":"2026-06-01 08:06:06.000000000","message":"Hi Tomas,\nPlease see my comment. We should be good on this as it was approved on the other PR.","commit_id":"c91cb889c959a42cb8a5970b959173be57817e9c"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"8ed7bf21bb2e881695fe08c122b933f5159c482f","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":11,"id":"47e252b9_16ea1e98","updated":"2026-05-20 13:55:32.000000000","message":"Hi all,\nAny reasons it is taking so long to merge this pull request?\nI don\u0027t understand.\nCan you please comment?","commit_id":"c91cb889c959a42cb8a5970b959173be57817e9c"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"47cf08d3482fa7cd2685bd1fe0485aa0613ecf1d","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":11,"id":"2e72ae94_95dc1fa0","updated":"2026-05-29 12:45:36.000000000","message":"Tomas, Antonio,\nCan you please approve too?","commit_id":"c91cb889c959a42cb8a5970b959173be57817e9c"}],"tcl/board/microchip/sama7d65-curiosity.cfg":[{"author":{"_account_id":1000853,"name":"zapb","display_name":"Marc Schink","email":"dev@zapb.de","username":"zapb"},"change_message_id":"187cabd47c7f19ddec2c1df11082f2b63f742aea","unresolved":true,"context_lines":[{"line_number":41,"context_line":"#           -f board/microchip/sama7d65-curiosity.cfg"},{"line_number":42,"context_line":""},{"line_number":43,"context_line":"# Default to JTAG -- silently ignored if already selected"},{"line_number":44,"context_line":"catch { transport select jtag }"},{"line_number":45,"context_line":""},{"line_number":46,"context_line":"# Target configuration (supports both JTAG and SWD)"},{"line_number":47,"context_line":"source [find target/microchip/sama7d6.cfg]"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"43d7be7e_508ee22a","line":44,"updated":"2026-04-16 07:12:11.000000000","message":"Remove this catch, if transport is already selected there is an error in your setup and should be fixed.","commit_id":"91ac90c3feaf8b5c1b81bc4611c94e0fb39dec44"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"28fb8db9277fcb99ae3aca7df9e5bc4844563353","unresolved":false,"context_lines":[{"line_number":41,"context_line":"#           -f board/microchip/sama7d65-curiosity.cfg"},{"line_number":42,"context_line":""},{"line_number":43,"context_line":"# Default to JTAG -- silently ignored if already selected"},{"line_number":44,"context_line":"catch { transport select jtag }"},{"line_number":45,"context_line":""},{"line_number":46,"context_line":"# Target configuration (supports both JTAG and SWD)"},{"line_number":47,"context_line":"source [find target/microchip/sama7d6.cfg]"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"6978f1e6_5b880cac","line":44,"in_reply_to":"43d7be7e_508ee22a","updated":"2026-04-22 08:55:38.000000000","message":"Thanks, OK I will Remove transport select entirely so that users select transport via interface config or -c flag","commit_id":"91ac90c3feaf8b5c1b81bc4611c94e0fb39dec44"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"75c6419d3883024d147ab50884a034dceaa01aba","unresolved":true,"context_lines":[{"line_number":56,"context_line":"# on the 20-pin JTAG header."},{"line_number":57,"context_line":"# NTRST (PC22) has an internal pull-up -- safe to connect."},{"line_number":58,"context_line":"#"},{"line_number":59,"context_line":"# srst_nogate: SRST is not gated by the JTAG state machine --"},{"line_number":60,"context_line":"#   required because NRST resets the entire chip including debug logic."},{"line_number":61,"context_line":"#"},{"line_number":62,"context_line":"# For probes with only SRST wired (no TRST), use instead:"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"0d50a3e7_f5cdc5f5","line":59,"updated":"2026-04-16 11:27:13.000000000","message":"This means that when SRST (pin 15/NRST) is asserted you can still access the target\u0027s debug register through JTAG or SWD.\nThis looks strange to me, as you said that JTAG/SWD debug port is opened after the reset by the ROM. Are you sure that `srst_nogate` is working?\n\nSince the debug port is not immediately available, you can check if using\n`adapter srst delay 500`\ncan help reducing the connection errors. It tells OpenOCD to wait 500ms after the reset pulse before attaching to the target.","commit_id":"91ac90c3feaf8b5c1b81bc4611c94e0fb39dec44"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"28fb8db9277fcb99ae3aca7df9e5bc4844563353","unresolved":false,"context_lines":[{"line_number":56,"context_line":"# on the 20-pin JTAG header."},{"line_number":57,"context_line":"# NTRST (PC22) has an internal pull-up -- safe to connect."},{"line_number":58,"context_line":"#"},{"line_number":59,"context_line":"# srst_nogate: SRST is not gated by the JTAG state machine --"},{"line_number":60,"context_line":"#   required because NRST resets the entire chip including debug logic."},{"line_number":61,"context_line":"#"},{"line_number":62,"context_line":"# For probes with only SRST wired (no TRST), use instead:"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"ef82510a_c91d7f6e","line":59,"in_reply_to":"0d50a3e7_f5cdc5f5","updated":"2026-04-22 08:55:38.000000000","message":"You are correct. \nThe reset_config line has been removed from the board configuration.\nI didn\u0027t see any differences with or without the extra delay. I will not add it for now.","commit_id":"91ac90c3feaf8b5c1b81bc4611c94e0fb39dec44"},{"author":{"_account_id":1000853,"name":"zapb","display_name":"Marc Schink","email":"dev@zapb.de","username":"zapb"},"change_message_id":"aa50f1cf2d52eaf65baa8f27555fb319ad2d0f2c","unresolved":true,"context_lines":[{"line_number":18,"context_line":""},{"line_number":19,"context_line":"source [find target/microchip/sama7d6.cfg]"},{"line_number":20,"context_line":""},{"line_number":21,"context_line":"# Conservative initial speed — increases after reset-init"},{"line_number":22,"context_line":"adapter speed 1000"}],"source_content_type":"text/x-ttcn-cfg","patch_set":9,"id":"2a9b4b80_5ad0a45f","line":21,"updated":"2026-04-23 06:18:20.000000000","message":"Please use a regular `-`","commit_id":"b0d6cc22d7489c0fa31760df27e7ed939b23bf75"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"ba75bf74475a44331c75cb65a3d7144d96389f59","unresolved":false,"context_lines":[{"line_number":18,"context_line":""},{"line_number":19,"context_line":"source [find target/microchip/sama7d6.cfg]"},{"line_number":20,"context_line":""},{"line_number":21,"context_line":"# Conservative initial speed — increases after reset-init"},{"line_number":22,"context_line":"adapter speed 1000"}],"source_content_type":"text/x-ttcn-cfg","patch_set":9,"id":"dea4a916_1208fb0a","line":21,"in_reply_to":"2a9b4b80_5ad0a45f","updated":"2026-04-23 14:21:14.000000000","message":"Thanks!\nI\u0027m updating now and will send a new patch","commit_id":"b0d6cc22d7489c0fa31760df27e7ed939b23bf75"}],"tcl/target/microchip/sama7d6.cfg":[{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"75c6419d3883024d147ab50884a034dceaa01aba","unresolved":true,"context_lines":[{"line_number":74,"context_line":"#"},{"line_number":75,"context_line":"# JTAG or SWD configuration"},{"line_number":76,"context_line":"#"},{"line_number":77,"context_line":"if { [using_jtag] } {"},{"line_number":78,"context_line":"    jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID"},{"line_number":79,"context_line":"} else {"},{"line_number":80,"context_line":"    swd newdap $_CHIPNAME cpu -expected-id $_DAP_TAPID"},{"line_number":81,"context_line":"}"},{"line_number":82,"context_line":""},{"line_number":83,"context_line":"#"},{"line_number":84,"context_line":"# DAP (Debug Access Port) -- required for Cortex-A targets"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"58990561_eaf42c02","line":81,"range":{"start_line":77,"start_character":0,"end_line":81,"end_character":1},"updated":"2026-04-16 11:27:13.000000000","message":"This can be simplified by adding on top\n`source [find target/swj-dp.tcl]`\nand here\n`swj_newdap $_CHIPNAME tap -expected-id $_CPUTAPID -irlen 4`\nbut you need somehow to collapse `_CPUTAPID` and `_DAP_TAPID` in a single variable. If this is not possible, then allow both with:\n`swj_newdap $_CHIPNAME tap -expected-id $_CPUTAPID -expected-id $_DAP_TAPID -irlen 4`","commit_id":"91ac90c3feaf8b5c1b81bc4611c94e0fb39dec44"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"28fb8db9277fcb99ae3aca7df9e5bc4844563353","unresolved":false,"context_lines":[{"line_number":74,"context_line":"#"},{"line_number":75,"context_line":"# JTAG or SWD configuration"},{"line_number":76,"context_line":"#"},{"line_number":77,"context_line":"if { [using_jtag] } {"},{"line_number":78,"context_line":"    jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID"},{"line_number":79,"context_line":"} else {"},{"line_number":80,"context_line":"    swd newdap $_CHIPNAME cpu -expected-id $_DAP_TAPID"},{"line_number":81,"context_line":"}"},{"line_number":82,"context_line":""},{"line_number":83,"context_line":"#"},{"line_number":84,"context_line":"# DAP (Debug Access Port) -- required for Cortex-A targets"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"11d284ce_1965b163","line":81,"range":{"start_line":77,"start_character":0,"end_line":81,"end_character":1},"in_reply_to":"58990561_eaf42c02","updated":"2026-04-22 08:55:38.000000000","message":"Thank you for the suggestion. I\u0027ve updated the target config to use\nswj_newdap with both expected IDs since the JTAG-DP IDCODE (0x6BA00477)\nand SW-DP DPIDR (0x6BA02477) differ in the PART NUMBER field","commit_id":"91ac90c3feaf8b5c1b81bc4611c94e0fb39dec44"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"75c6419d3883024d147ab50884a034dceaa01aba","unresolved":true,"context_lines":[{"line_number":89,"context_line":"# Target: Cortex-A7 (single core)"},{"line_number":90,"context_line":"#"},{"line_number":91,"context_line":"set _TARGETNAME $_CHIPNAME.cpu.0"},{"line_number":92,"context_line":"target create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap -endian $_ENDIAN -coreid 0"},{"line_number":93,"context_line":""},{"line_number":94,"context_line":"#"},{"line_number":95,"context_line":"# SRAM: 128KB at 0x00100000"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"a1295476_765eb70f","line":92,"updated":"2026-04-16 11:27:13.000000000","message":"`-coreid` is only for SMP. Here it\u0027s a single core, so it can be dropped.\nAlso, OpenOCD is quite slow at parsing the ROM table to find the base address of the Cortex-A. To speed-up the startup, I suggest you to add the flags `-ap-num` and `-dbgbase` with the appropriate values.","commit_id":"91ac90c3feaf8b5c1b81bc4611c94e0fb39dec44"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"28fb8db9277fcb99ae3aca7df9e5bc4844563353","unresolved":false,"context_lines":[{"line_number":89,"context_line":"# Target: Cortex-A7 (single core)"},{"line_number":90,"context_line":"#"},{"line_number":91,"context_line":"set _TARGETNAME $_CHIPNAME.cpu.0"},{"line_number":92,"context_line":"target create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap -endian $_ENDIAN -coreid 0"},{"line_number":93,"context_line":""},{"line_number":94,"context_line":"#"},{"line_number":95,"context_line":"# SRAM: 128KB at 0x00100000"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"cd75150c_1f707b0c","line":92,"in_reply_to":"a1295476_765eb70f","updated":"2026-04-22 08:55:38.000000000","message":"You are correct — removed -coreid since SAMA7G54 is a single-core\nCortex-A7.\n\nAdded -ap-num 0 and -dbgbase 0x80030000 based on the CoreSight debug\nROM table documented in DS60001765 Section 17.5.8:\n  Cortex-A7 DBG at debugger address 0x80030000\n\ntarget create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap -endian $_ENDIAN -ap-num 0 -dbgbase 0x80030000","commit_id":"91ac90c3feaf8b5c1b81bc4611c94e0fb39dec44"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"75c6419d3883024d147ab50884a034dceaa01aba","unresolved":false,"context_lines":[{"line_number":100,"context_line":"#   - After AT91Bootstrap: SRAM contains bootstrap code"},{"line_number":101,"context_line":"#   - Set -work-area-backup 1 if you need to preserve SRAM contents"},{"line_number":102,"context_line":"#"},{"line_number":103,"context_line":"$_TARGETNAME configure -work-area-phys 0x00100000 -work-area-size 0x20000 -work-area-backup 0"},{"line_number":104,"context_line":""},{"line_number":105,"context_line":"#"},{"line_number":106,"context_line":"# Event handlers"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"d4578c0c_112719b4","line":103,"updated":"2026-04-16 11:27:13.000000000","message":"Today we don\u0027t have any algorithm running on Cortex-A, so this would not be used. Anyway, it\u0027s good to keep it for future reference.","commit_id":"91ac90c3feaf8b5c1b81bc4611c94e0fb39dec44"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"28fb8db9277fcb99ae3aca7df9e5bc4844563353","unresolved":false,"context_lines":[{"line_number":100,"context_line":"#   - After AT91Bootstrap: SRAM contains bootstrap code"},{"line_number":101,"context_line":"#   - Set -work-area-backup 1 if you need to preserve SRAM contents"},{"line_number":102,"context_line":"#"},{"line_number":103,"context_line":"$_TARGETNAME configure -work-area-phys 0x00100000 -work-area-size 0x20000 -work-area-backup 0"},{"line_number":104,"context_line":""},{"line_number":105,"context_line":"#"},{"line_number":106,"context_line":"# Event handlers"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"91569ef6_751dc6c0","line":103,"in_reply_to":"d4578c0c_112719b4","updated":"2026-04-22 08:55:38.000000000","message":"OK let\u0027s keep it then","commit_id":"91ac90c3feaf8b5c1b81bc4611c94e0fb39dec44"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"75c6419d3883024d147ab50884a034dceaa01aba","unresolved":false,"context_lines":[{"line_number":128,"context_line":"    catch { $_TARGETNAME arp_waitstate halted 1000 }"},{"line_number":129,"context_line":"}"},{"line_number":130,"context_line":""},{"line_number":131,"context_line":"$_TARGETNAME configure -event gdb-attach {"},{"line_number":132,"context_line":"    # Halt CPU when debugger connects"},{"line_number":133,"context_line":"    halt"},{"line_number":134,"context_line":"}"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"f54a42bf_dc196b39","line":131,"updated":"2026-04-16 11:27:13.000000000","message":"This is the same as the default handler. I personally find confusing adding it, but I let you chose if you prefer to keep it here.","commit_id":"91ac90c3feaf8b5c1b81bc4611c94e0fb39dec44"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"28fb8db9277fcb99ae3aca7df9e5bc4844563353","unresolved":false,"context_lines":[{"line_number":128,"context_line":"    catch { $_TARGETNAME arp_waitstate halted 1000 }"},{"line_number":129,"context_line":"}"},{"line_number":130,"context_line":""},{"line_number":131,"context_line":"$_TARGETNAME configure -event gdb-attach {"},{"line_number":132,"context_line":"    # Halt CPU when debugger connects"},{"line_number":133,"context_line":"    halt"},{"line_number":134,"context_line":"}"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"fe6fd925_a6c938a7","line":131,"in_reply_to":"f54a42bf_dc196b39","updated":"2026-04-22 08:55:38.000000000","message":"You are correct — gdb-attach with halt is the default behavior.\nI will remove it to avoid confusion.","commit_id":"91ac90c3feaf8b5c1b81bc4611c94e0fb39dec44"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"75c6419d3883024d147ab50884a034dceaa01aba","unresolved":true,"context_lines":[{"line_number":135,"context_line":""},{"line_number":136,"context_line":"$_TARGETNAME configure -event gdb-detach {"},{"line_number":137,"context_line":"    # Resume CPU when debugger disconnects"},{"line_number":138,"context_line":"    resume"},{"line_number":139,"context_line":"}"},{"line_number":140,"context_line":""},{"line_number":141,"context_line":"$_TARGETNAME configure -event reset-start {"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"d15bcf20_b025f1ed","line":138,"updated":"2026-04-16 11:27:13.000000000","message":"This has been debated for long time. We have sometimes GDB crashing during a debug session, thus detected by OpenOCD as a disconnection!\nHaving OpenOCD that restarts the target will destroy the on-going debug session.\nIn STMicroelectronics ST-CubeIDE this event handler is added by the IDE, not part of OpenOCD upstream script.\nIs it really relevant having it in this script?","commit_id":"91ac90c3feaf8b5c1b81bc4611c94e0fb39dec44"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"28fb8db9277fcb99ae3aca7df9e5bc4844563353","unresolved":false,"context_lines":[{"line_number":135,"context_line":""},{"line_number":136,"context_line":"$_TARGETNAME configure -event gdb-detach {"},{"line_number":137,"context_line":"    # Resume CPU when debugger disconnects"},{"line_number":138,"context_line":"    resume"},{"line_number":139,"context_line":"}"},{"line_number":140,"context_line":""},{"line_number":141,"context_line":"$_TARGETNAME configure -event reset-start {"}],"source_content_type":"text/x-ttcn-cfg","patch_set":2,"id":"56036f34_e867f604","line":138,"in_reply_to":"d15bcf20_b025f1ed","updated":"2026-04-22 08:55:38.000000000","message":"You are correct. The gdb-detach handler with resume is problematic\nbecause OpenOCD cannot distinguish between an intentional GDB\ndisconnect and a GDB crash. In the crash case, auto-resuming the\ntarget destroys the debug session state.\n\nFollowing the STMicroelectronics approach, this behavior should\nbe controlled by the IDE/debug tool, not the target script.\n\nRemoved gdb-detach handler from the target configuration.","commit_id":"91ac90c3feaf8b5c1b81bc4611c94e0fb39dec44"},{"author":{"_account_id":1000853,"name":"zapb","display_name":"Marc Schink","email":"dev@zapb.de","username":"zapb"},"change_message_id":"d1b63991d8d54b90f87a55861e79e78ea0d777f3","unresolved":true,"context_lines":[{"line_number":57,"context_line":""},{"line_number":58,"context_line":"$_TARGETNAME configure -event examine-end {"},{"line_number":59,"context_line":"    if { [catch { $_TARGETNAME arp_halt }] } {"},{"line_number":60,"context_line":"        echo \"Warning: Could not halt target — JTAG may not be enabled yet.\""},{"line_number":61,"context_line":"    }"},{"line_number":62,"context_line":"    catch { $_TARGETNAME arp_waitstate halted 1000 }"},{"line_number":63,"context_line":"}"}],"source_content_type":"text/x-ttcn-cfg","patch_set":10,"id":"4787d888_9245a34a","line":60,"updated":"2026-05-12 20:25:09.000000000","message":"Remove non-ascii chars (dash) and the period at the end.","commit_id":"0bf63313e0cc209a1a885bacfb532674a72e8933"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"b42398ad51f8600616b7ed0b8404cbed6065abad","unresolved":false,"context_lines":[{"line_number":57,"context_line":""},{"line_number":58,"context_line":"$_TARGETNAME configure -event examine-end {"},{"line_number":59,"context_line":"    if { [catch { $_TARGETNAME arp_halt }] } {"},{"line_number":60,"context_line":"        echo \"Warning: Could not halt target — JTAG may not be enabled yet.\""},{"line_number":61,"context_line":"    }"},{"line_number":62,"context_line":"    catch { $_TARGETNAME arp_waitstate halted 1000 }"},{"line_number":63,"context_line":"}"}],"source_content_type":"text/x-ttcn-cfg","patch_set":10,"id":"25a1dfa0_63d0a2bf","line":60,"in_reply_to":"4787d888_9245a34a","updated":"2026-05-13 07:15:38.000000000","message":"Hi Marc,\n\nAll files have been fixed.\nWe are good to go 😊","commit_id":"0bf63313e0cc209a1a885bacfb532674a72e8933"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"00b6320bcb155457247a4ae3f4a1d06b4e10d60b","unresolved":true,"context_lines":[{"line_number":56,"context_line":"}"},{"line_number":57,"context_line":""},{"line_number":58,"context_line":"$_TARGETNAME configure -event examine-end {"},{"line_number":59,"context_line":"    if { [catch { $_TARGETNAME arp_halt }] } {"},{"line_number":60,"context_line":"        echo \"Warning: Could not halt target - JTAG may not be enabled yet\""},{"line_number":61,"context_line":"    }"},{"line_number":62,"context_line":"    catch { $_TARGETNAME arp_waitstate halted 1000 }"}],"source_content_type":"text/x-ttcn-cfg","patch_set":11,"id":"ea6b43fd_58a03f26","line":59,"updated":"2026-05-29 15:49:41.000000000","message":"Perhaps I\u0027m not the right person to review an Cortex-A device...\nI don\u0027t understand why the target is halted at the end of examine?\nAny reasons to do this?\nAlso be aware that re-examination takes place in communication error recovery - after failed poll. Is it correct to halt the core after such error?","commit_id":"c91cb889c959a42cb8a5970b959173be57817e9c"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"310474b2cdc6b0a429ebd9714b0f10d3488fc9e0","unresolved":false,"context_lines":[{"line_number":56,"context_line":"}"},{"line_number":57,"context_line":""},{"line_number":58,"context_line":"$_TARGETNAME configure -event examine-end {"},{"line_number":59,"context_line":"    if { [catch { $_TARGETNAME arp_halt }] } {"},{"line_number":60,"context_line":"        echo \"Warning: Could not halt target - JTAG may not be enabled yet\""},{"line_number":61,"context_line":"    }"},{"line_number":62,"context_line":"    catch { $_TARGETNAME arp_waitstate halted 1000 }"}],"source_content_type":"text/x-ttcn-cfg","patch_set":11,"id":"16c6aaf2_518d31f7","line":59,"in_reply_to":"68c94622_1c5b6c1b","updated":"2026-06-01 11:47:17.000000000","message":"Hi Tomas — apologies, I misread your question and pointed you to the wrong (ASCII) thread. Let me answer properly.\n\nWe halt at examine-end because [hardware-specific reason — e.g. the boot ROM leaves the core running TF-A and we need it halted to configure X before debug is usable].\n\nYou raise a good point about re-examination during error recovery. [Either: \"We\u0027ll guard the halt so it only runs on the initial examine and not on recovery re-examines\" — or — \"Could you advise the preferred way to distinguish first examine from a recovery re-examine?\n\nCould be:\n\n_TARGETNAME configure -event examine-end {\n    # only halt on the very first examine, not on error-recovery re-examines\n    if { ![info exists ::examine_done($_TARGETNAME)] } {\n        set ::examine_done($_TARGETNAME) 1\n        if { [catch { _TARGETNAME arp_halt }] } {\n            echo \"Warning: Could not halt target - JTAG may not be enabled yet\"\n        }\n        catch { $_TARGETNAME arp_waitstate halted 1000 }\n    }\n}","commit_id":"c91cb889c959a42cb8a5970b959173be57817e9c"},{"author":{"_account_id":1000687,"name":"Tomas Vanek","display_name":"Tomas Vanek","email":"vanekt@fbl.cz","username":"vanekt"},"change_message_id":"67205e51e48f599c8d867d49b1290ea6e86493d6","unresolved":true,"context_lines":[{"line_number":56,"context_line":"}"},{"line_number":57,"context_line":""},{"line_number":58,"context_line":"$_TARGETNAME configure -event examine-end {"},{"line_number":59,"context_line":"    if { [catch { $_TARGETNAME arp_halt }] } {"},{"line_number":60,"context_line":"        echo \"Warning: Could not halt target - JTAG may not be enabled yet\""},{"line_number":61,"context_line":"    }"},{"line_number":62,"context_line":"    catch { $_TARGETNAME arp_waitstate halted 1000 }"}],"source_content_type":"text/x-ttcn-cfg","patch_set":11,"id":"68c94622_1c5b6c1b","line":59,"in_reply_to":"860b1e70_731997d6","updated":"2026-06-01 10:47:05.000000000","message":"Are you joking? Marc commented non-ASCII characters, this is now fixed.\nBut the score +1 from him means somebody else must approve.\nSo if you want positive score from me, please explain why the target is halted at the end of examine. This is quite unusual practice in OpenOCD. Or wait for Antonio, he works with Cortex-A devices more than I do.","commit_id":"c91cb889c959a42cb8a5970b959173be57817e9c"},{"author":{"_account_id":1002508,"name":"fboyer-mchp","email":"frederic.boyer@microchip.com","username":"fboyer-mchp"},"change_message_id":"d0c86a6500b7165c084e034ce912195142194007","unresolved":false,"context_lines":[{"line_number":56,"context_line":"}"},{"line_number":57,"context_line":""},{"line_number":58,"context_line":"$_TARGETNAME configure -event examine-end {"},{"line_number":59,"context_line":"    if { [catch { $_TARGETNAME arp_halt }] } {"},{"line_number":60,"context_line":"        echo \"Warning: Could not halt target - JTAG may not be enabled yet\""},{"line_number":61,"context_line":"    }"},{"line_number":62,"context_line":"    catch { $_TARGETNAME arp_waitstate halted 1000 }"}],"source_content_type":"text/x-ttcn-cfg","patch_set":11,"id":"860b1e70_731997d6","line":59,"in_reply_to":"ea6b43fd_58a03f26","updated":"2026-06-01 08:06:06.000000000","message":"Hi Tomas,\nTHis was already reviewed / commented by Marc \u0026 fiwed on the other PR (and this one), so we should be good:\n\nhttps://review.openocd.org/c/openocd/+/9524/10..11/tcl/target/microchip/sama7g5.cfg#b60","commit_id":"c91cb889c959a42cb8a5970b959173be57817e9c"}]}