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This occurs when MCLK is\nsourced from HSCLK (SYSPLL/HFXT), i.e. MCLK \u003e 32 MHz.\n\nThis affects OpenOCD reads (via DAP AHB-AP) in mspm0_read_part_info().\n\nFix this by checking SYSCTL_MCLKCFG before reading FACTORYREGION. If\nUSEHSCLK is set and FLASHWAIT \u003d\u003d 2, temporarily switch MCLK to SYSOSC\n(≤ 32 MHz), perform the reads (DID, TRACEID, USERID, SRAMFLASH), and\nthen restore the original MCLK configuration. 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This occurs when MCLK is\nsourced from HSCLK (SYSPLL/HFXT), i.e. MCLK \u003e 32 MHz.\n\nThis affects OpenOCD reads (via DAP AHB-AP) in mspm0_read_part_info().\n\nFix this by checking SYSCTL_MCLKCFG before reading FACTORYREGION. If\nUSEHSCLK is set and FLASHWAIT \u003d\u003d 2, temporarily switch MCLK to SYSOSC\n(≤ 32 MHz), perform the reads (DID, TRACEID, USERID, SRAMFLASH), and\nthen restore the original MCLK configuration. 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