)]}'
{"tcl/board/st/nucleo-u575zi-q.cfg":[{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"624df98ffdcd59a3ef5d36cf70b825e4045f66a0","unresolved":true,"context_lines":[{"line_number":10,"context_line":"source [find target/stm32u5x.cfg]"},{"line_number":11,"context_line":""},{"line_number":12,"context_line":"# Use hardware reset."},{"line_number":13,"context_line":"reset_config srst_only srst_nogate"}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"7b138398_0ac9b8ca","line":13,"updated":"2026-06-18 15:59:51.000000000","message":"I think this is what Paul F mentioned in IRC.\n\n`srst_nogate` is already present in the target file `target/stm32x5x_common.cfg` and that is the right place as it is a SoC feature/issue.\nThe board file should only add what the board proposes or limits, that is `srst_only` in this case (together with SWD only above)","commit_id":"34c3d9710abe3006b40071c46520d314c7b46649"},{"author":{"_account_id":1000853,"name":"zapb","display_name":"Marc Schink","email":"dev@zapb.de","username":"zapb"},"change_message_id":"aa5d6dce3997882db99a392a56fbe57e2c59c3dd","unresolved":false,"context_lines":[{"line_number":10,"context_line":"source [find target/stm32u5x.cfg]"},{"line_number":11,"context_line":""},{"line_number":12,"context_line":"# Use hardware reset."},{"line_number":13,"context_line":"reset_config srst_only srst_nogate"}],"source_content_type":"text/x-ttcn-cfg","patch_set":1,"id":"b9308ca3_ca14c07d","line":13,"in_reply_to":"7b138398_0ac9b8ca","updated":"2026-06-19 13:40:16.000000000","message":"Thank you for the explanation, Antonio. Reset handling has always been a tricky topic for me :D","commit_id":"34c3d9710abe3006b40071c46520d314c7b46649"}]}