)]}'
{"/COMMIT_MSG":[{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"ea42ab34cc37752499623811e30323cf478875f4","unresolved":true,"context_lines":[{"line_number":6,"context_line":""},{"line_number":7,"context_line":"target/riscv: add reset method command support"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"Add a new \u0027riscv reset_method\u0027 command that allows users to select"},{"line_number":10,"context_line":"a method for resetting harts:"},{"line_number":11,"context_line":""},{"line_number":12,"context_line":"- ndmreset (default): resets the entire hardware platform except for"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":2,"id":"05127924_6c8dcc69","line":9,"updated":"2026-07-22 09:56:41.000000000","message":"We have already the command `cortex_m reset_config`.\nMaybe we could keep some uniformity in OpenOCD by naming this `riscv reset_config` too?\n\nThen we have the command `soft_reset_halt` to reset a single target. Maybe the `hartreset` should be implemented as part of `soft_reset_halt` and not in `reset` command","commit_id":"e94073c330ef102a6dc54a86c82c82e7d3a794d4"},{"author":{"_account_id":1002315,"name":"liangzhen","email":"zhen.liang@spacemit.com","username":"liangzhen"},"change_message_id":"f7245bcec3d8a2276e1ab2245cdea509d859e2bf","unresolved":true,"context_lines":[{"line_number":6,"context_line":""},{"line_number":7,"context_line":"target/riscv: add reset method command support"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"Add a new \u0027riscv reset_method\u0027 command that allows users to select"},{"line_number":10,"context_line":"a method for resetting harts:"},{"line_number":11,"context_line":""},{"line_number":12,"context_line":"- ndmreset (default): resets the entire hardware platform except for"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":2,"id":"0febea17_0fc8d49f","line":9,"in_reply_to":"05127924_6c8dcc69","updated":"2026-07-22 11:25:04.000000000","message":"\u003e We have already the command cortex_m reset_config.\n\u003e Maybe we could keep some uniformity in OpenOCD by naming this riscv reset_config \u003e too?\n\nDone\n\n\u003e Then we have the command soft_reset_halt to reset a single target. Maybe the \n\u003e hartreset should be implemented as part of soft_reset_halt and not in reset \n\u003e command\n\nthe riscv implementation of soft_deset_halt, please see: https://review.openocd.org/c/openocd/+/9790\n\nThe `reset` command iterates through all created targets and executes `assert_reset` and `deassert_reset`. Therefore, I believe it is reasonable to use `hartreset` in `assert_reset`.","commit_id":"e94073c330ef102a6dc54a86c82c82e7d3a794d4"}],"/PATCHSET_LEVEL":[{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"478bd295a3efb282afa100419a7d19564784228a","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":2,"id":"ae5bf1f2_71a0e769","updated":"2026-07-22 09:57:39.000000000","message":"Please notice that new commands should be documented in `doc/openocd.texi`","commit_id":"e94073c330ef102a6dc54a86c82c82e7d3a794d4"},{"author":{"_account_id":1002315,"name":"liangzhen","email":"zhen.liang@spacemit.com","username":"liangzhen"},"change_message_id":"f7245bcec3d8a2276e1ab2245cdea509d859e2bf","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":2,"id":"4fa86860_577371ff","in_reply_to":"ae5bf1f2_71a0e769","updated":"2026-07-22 11:25:04.000000000","message":"Done","commit_id":"e94073c330ef102a6dc54a86c82c82e7d3a794d4"},{"author":{"_account_id":1000021,"name":"Antonio Borneo","email":"borneo.antonio@gmail.com","username":"borneoa"},"change_message_id":"aec5d0c165ced3f5cc8d9bbe2a7ee5fc994927e2","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":3,"id":"761c0657_d94b0b30","updated":"2026-07-22 15:09:33.000000000","message":"It\u0027s at least since 2016 that we are discussing about fixing the reset framework of OpenOCD. See\nhttps://review.openocd.org/q/topic:reset\nbut we have not got a result.\nThis patch is trying to fix in riscv code what is broken in OpenOCD.\n\nIn OpenOCD we have the command `reset` that runs a system/platform initialization. To reset a single core we use the command `soft_reset_halt`.\n\nIt\u0027s not correct to add the single core reset in the `reset` framework that uses `assert_reset()` and `deassert_reset()`, as it will not reset the platform.\n\nBut since the reset framework is broken, running `reset` on a multi target device is a nightmare.\n\nI invite you to check if you can get something working by overloading the event `reset-assert`, like I have done in `tcl/target/st/stm32mp25x.cfg`\n`$_CHIPNAME.m33 configure -event reset-assert { }`\nI know it\u0027s ugly, but I prefer having such workaround in the config script instead of accumulating bad code in each target C file.\nIn `stm32mp25x.cfg` I bypass the broken reset framework by declaring:\n- the event `reset-assert` so the `assert_reset()` does nothing.\n- the event `reset-assert-post` to run `adapter assert srst`. You could use the ndmreset if you don\u0027t have a NRST pin\n- the event `reset-deassert-pre` to run `adapter deassert srst`\n\nIn your case you could declare `reset-assert` on all cores but one. The only core without the event will reset the platform.\n\nThen, adding the command `soft_reset_halt` to reset a single hart is a welcomed improvement.","commit_id":"bbe3a3cecf714027a005c259916c411ff2e26f16"},{"author":{"_account_id":1002315,"name":"liangzhen","email":"zhen.liang@spacemit.com","username":"liangzhen"},"change_message_id":"2caa1876897cb0d6dd01567bb3dac6832a8ea2cb","unresolved":true,"context_lines":[],"source_content_type":"","patch_set":3,"id":"88a96d6f_77635c51","in_reply_to":"761c0657_d94b0b30","updated":"2026-07-23 02:59:36.000000000","message":"Thank you very much for your detailed description.\n\n\u003e In OpenOCD we have the command reset that runs a system/platform \n\u003e initialization. To reset a single core we use the command soft_reset_halt.\n\u003e\n\u003e It\u0027s not correct to add the single core reset in the reset framework that uses  \n\u003e assert_reset() and deassert_reset(), as it will not reset the platform.\n\nI misunderstood it because the help description for the `reset` command is \"Reset all targets\", and in `riscv-011.c`, the single core reset is added in `assert_reset()`.\n\n\u003e I invite you to check if you can get something working by overloading the \n\u003e event reset-assert, like I have done in tcl/target/st/stm32mp25x.cfg\n\u003e $_CHIPNAME.m33 configure -event reset-assert { }\n\nThank you very much. This is of great help to me. I understand how to use `reset` event to reset the platform.","commit_id":"bbe3a3cecf714027a005c259916c411ff2e26f16"}]}