1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
6 * drivers/mtd/nand_ids.c *
8 * Copyright (C) 2002 Thomas Gleixner (tglx@linutronix.de) *
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
24 ***************************************************************************/
29 #include "replacements.h"
40 #include "time_support.h"
44 int nand_register_commands(struct command_context_s
*cmd_ctx
);
45 int handle_nand_list_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
46 int handle_nand_probe_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
47 int handle_nand_check_bad_blocks_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
48 int handle_nand_info_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
49 int handle_nand_copy_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
50 int handle_nand_write_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
51 int handle_nand_dump_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
52 int handle_nand_erase_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
54 int handle_nand_raw_access_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
56 int nand_read_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
57 int nand_read_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
58 int nand_read_plain(struct nand_device_s
*device
, u32 address
, u8
*data
, u32 data_size
);
60 int nand_write_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
61 int nand_write_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
63 /* NAND flash controller
65 extern nand_flash_controller_t lpc3180_nand_controller
;
66 /* extern nand_flash_controller_t s3c2410_nand_controller; */
67 /* extern nand_flash_controller_t boundary_scan_nand_controller; */
69 nand_flash_controller_t
*nand_flash_controllers
[] =
71 &lpc3180_nand_controller
,
72 /* &s3c2410_nand_controller, */
73 /* &boundary_scan_nand_controller, */
77 /* configured NAND devices and NAND Flash command handler */
78 nand_device_t
*nand_devices
= NULL
;
79 static command_t
*nand_cmd
;
83 * Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
86 * Pagesize; 0, 256, 512
87 * 0 get this information from the extended chip ID
88 * 256 256 Byte page size
89 * 512 512 Byte page size
91 nand_info_t nand_flash_ids
[] =
93 {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
94 {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
95 {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
96 {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
97 {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
98 {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
99 {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
100 {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
101 {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
102 {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
104 {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
105 {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
106 {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
107 {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
109 {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
110 {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
111 {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
112 {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
114 {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
115 {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
116 {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
117 {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
119 {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
120 {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
121 {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
122 {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
124 {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
125 {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
126 {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
127 {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
128 {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
129 {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
130 {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
132 {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
134 {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS
},
135 {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS
},
136 {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16
},
137 {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16
},
139 {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS
},
140 {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS
},
141 {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16
},
142 {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16
},
144 {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS
},
145 {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS
},
146 {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16
},
147 {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16
},
149 {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS
},
150 {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS
},
151 {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16
},
152 {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16
},
154 {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS
},
155 {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS
},
156 {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16
},
157 {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16
},
159 {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS
},
160 {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS
},
161 {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16
},
162 {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16
},
167 /* Manufacturer ID list
169 nand_manufacturer_t nand_manuf_ids
[] =
172 {NAND_MFR_TOSHIBA
, "Toshiba"},
173 {NAND_MFR_SAMSUNG
, "Samsung"},
174 {NAND_MFR_FUJITSU
, "Fujitsu"},
175 {NAND_MFR_NATIONAL
, "National"},
176 {NAND_MFR_RENESAS
, "Renesas"},
177 {NAND_MFR_STMICRO
, "ST Micro"},
178 {NAND_MFR_HYNIX
, "Hynix"},
182 /* nand device <nand_controller> [controller options]
184 int handle_nand_device_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
191 WARNING("incomplete flash device nand configuration");
192 return ERROR_FLASH_BANK_INVALID
;
195 for (i
= 0; nand_flash_controllers
[i
]; i
++)
197 nand_device_t
*p
, *c
;
199 if (strcmp(args
[0], nand_flash_controllers
[i
]->name
) == 0)
201 /* register flash specific commands */
202 if (nand_flash_controllers
[i
]->register_commands(cmd_ctx
) != ERROR_OK
)
204 ERROR("couldn't register '%s' commands", args
[0]);
208 c
= malloc(sizeof(nand_device_t
));
210 c
->controller
= nand_flash_controllers
[i
];
211 c
->controller_priv
= NULL
;
212 c
->manufacturer
= NULL
;
215 c
->address_cycles
= 0;
220 if ((retval
= nand_flash_controllers
[i
]->nand_device_command(cmd_ctx
, cmd
, args
, argc
, c
)) != ERROR_OK
)
222 ERROR("'%s' driver rejected nand flash", c
->controller
->name
);
227 /* put NAND device in linked list */
230 /* find last flash device */
231 for (p
= nand_devices
; p
&& p
->next
; p
= p
->next
);
244 /* no valid NAND controller was found (i.e. the configuration option,
245 * didn't match one of the compiled-in controllers)
247 ERROR("No valid NAND flash controller found (%s)", args
[0]);
248 ERROR("compiled-in NAND flash controllers:");
249 for (i
= 0; nand_flash_controllers
[i
]; i
++)
251 ERROR("%i: %s", i
, nand_flash_controllers
[i
]->name
);
257 int nand_register_commands(struct command_context_s
*cmd_ctx
)
259 nand_cmd
= register_command(cmd_ctx
, NULL
, "nand", NULL
, COMMAND_ANY
, NULL
);
261 register_command(cmd_ctx
, nand_cmd
, "device", handle_nand_device_command
, COMMAND_CONFIG
, NULL
);
266 int nand_init(struct command_context_s
*cmd_ctx
)
270 register_command(cmd_ctx
, nand_cmd
, "list", handle_nand_list_command
, COMMAND_EXEC
,
271 "list configured NAND flash devices");
272 register_command(cmd_ctx
, nand_cmd
, "info", handle_nand_info_command
, COMMAND_EXEC
,
273 "print info about NAND flash device <num>");
274 register_command(cmd_ctx
, nand_cmd
, "probe", handle_nand_probe_command
, COMMAND_EXEC
,
275 "identify NAND flash device <num>");
276 register_command(cmd_ctx
, nand_cmd
, "check_bad_blocks", handle_nand_check_bad_blocks_command
, COMMAND_EXEC
,
277 "check NAND flash device <num> for bad blocks [<first> <last>]");
278 register_command(cmd_ctx
, nand_cmd
, "erase", handle_nand_erase_command
, COMMAND_EXEC
,
279 "erase blocks on NAND flash device <num> <first> <last>");
280 register_command(cmd_ctx
, nand_cmd
, "copy", handle_nand_copy_command
, COMMAND_EXEC
,
281 "copy from NAND flash device <num> <offset> <length> <ram-address>");
282 register_command(cmd_ctx
, nand_cmd
, "dump", handle_nand_dump_command
, COMMAND_EXEC
,
283 "dump from NAND flash device <num> <filename> <offset> <size> [options]");
284 register_command(cmd_ctx
, nand_cmd
, "write", handle_nand_write_command
, COMMAND_EXEC
,
285 "write to NAND flash device <num> <filename> <offset> [options]");
286 register_command(cmd_ctx
, nand_cmd
, "raw_access", handle_nand_raw_access_command
, COMMAND_EXEC
,
287 "raw access to NAND flash device <num> ['enable'|'disable']");
293 nand_device_t
*get_nand_device_by_num(int num
)
298 for (p
= nand_devices
; p
; p
= p
->next
)
309 int nand_build_bbt(struct nand_device_s
*device
, int first
, int last
)
317 if ((first
< 0) || (first
>= device
->num_blocks
))
320 if ((last
>= device
->num_blocks
) || (last
== -1))
321 last
= device
->num_blocks
- 1;
323 for (i
= first
; i
< last
; i
++)
325 nand_read_page(device
, page
, NULL
, 0, oob
, 6);
327 if (((device
->device
->options
& NAND_BUSWIDTH_16
) && ((oob
[0] & oob
[1]) != 0xff))
328 || (((device
->page_size
== 512) && (oob
[5] != 0xff)) ||
329 ((device
->page_size
== 2048) && (oob
[0] != 0xff))))
331 WARNING("invalid block: %i", i
);
332 device
->blocks
[i
].is_bad
= 1;
336 device
->blocks
[i
].is_bad
= 0;
339 page
+= (device
->erase_size
/ device
->page_size
);
345 int nand_read_status(struct nand_device_s
*device
, u8
*status
)
348 return ERROR_NAND_DEVICE_NOT_PROBED
;
350 /* Send read status command */
351 device
->controller
->command(device
, NAND_CMD_STATUS
);
356 if (device
->device
->options
& NAND_BUSWIDTH_16
)
359 device
->controller
->read_data(device
, &data
);
360 *status
= data
& 0xff;
364 device
->controller
->read_data(device
, status
);
370 int nand_probe(struct nand_device_s
*device
)
372 u8 manufacturer_id
, device_id
;
376 /* clear device data */
377 device
->device
= NULL
;
378 device
->manufacturer
= NULL
;
380 /* clear device parameters */
381 device
->bus_width
= 0;
382 device
->address_cycles
= 0;
383 device
->page_size
= 0;
384 device
->erase_size
= 0;
386 /* initialize controller (device parameters are zero, use controller default) */
387 if ((retval
= device
->controller
->init(device
) != ERROR_OK
))
391 case ERROR_NAND_OPERATION_FAILED
:
392 DEBUG("controller initialization failed");
393 return ERROR_NAND_OPERATION_FAILED
;
394 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
395 ERROR("BUG: controller reported that it doesn't support default parameters");
396 return ERROR_NAND_OPERATION_FAILED
;
398 ERROR("BUG: unknown controller initialization failure");
399 return ERROR_NAND_OPERATION_FAILED
;
403 device
->controller
->command(device
, NAND_CMD_RESET
);
404 device
->controller
->reset(device
);
406 device
->controller
->command(device
, NAND_CMD_READID
);
407 device
->controller
->address(device
, 0x0);
409 if (device
->bus_width
== 8)
411 device
->controller
->read_data(device
, &manufacturer_id
);
412 device
->controller
->read_data(device
, &device_id
);
417 device
->controller
->read_data(device
, &data_buf
);
418 manufacturer_id
= data_buf
& 0xff;
419 device
->controller
->read_data(device
, &data_buf
);
420 device_id
= data_buf
& 0xff;
423 for (i
= 0; nand_flash_ids
[i
].name
; i
++)
425 if (nand_flash_ids
[i
].id
== device_id
)
427 device
->device
= &nand_flash_ids
[i
];
432 for (i
= 0; nand_manuf_ids
[i
].name
; i
++)
434 if (nand_manuf_ids
[i
].id
== manufacturer_id
)
436 device
->manufacturer
= &nand_manuf_ids
[i
];
441 if (!device
->manufacturer
)
443 device
->manufacturer
= &nand_manuf_ids
[0];
444 device
->manufacturer
->id
= manufacturer_id
;
449 ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
450 manufacturer_id
, device_id
);
451 return ERROR_NAND_OPERATION_FAILED
;
454 DEBUG("found %s (%s)", device
->device
->name
, device
->manufacturer
->name
);
456 /* initialize device parameters */
459 if (device
->device
->options
& NAND_BUSWIDTH_16
)
460 device
->bus_width
= 16;
462 device
->bus_width
= 8;
465 if (device
->device
->page_size
== 0)
467 /* TODO: support reading extended chip id to determine page size */
468 return ERROR_NAND_OPERATION_FAILED
;
470 else if (device
->device
->page_size
== 256)
472 ERROR("NAND flashes with 256 byte pagesize are not supported");
473 return ERROR_NAND_OPERATION_FAILED
;
477 device
->page_size
= device
->device
->page_size
;
480 /* number of address cycles */
481 if (device
->page_size
<= 512)
483 /* small page devices */
484 if (device
->device
->chip_size
<= 32)
485 device
->address_cycles
= 3;
486 else if (device
->device
->chip_size
<= 8*1024)
487 device
->address_cycles
= 4;
490 ERROR("BUG: small page NAND device with more than 8 GiB encountered");
491 device
->address_cycles
= 5;
496 /* large page devices */
497 if (device
->device
->chip_size
<= 128)
498 device
->address_cycles
= 4;
499 else if (device
->device
->chip_size
<= 32*1024)
500 device
->address_cycles
= 5;
503 ERROR("BUG: small page NAND device with more than 32 GiB encountered");
504 device
->address_cycles
= 6;
509 if (device
->device
->erase_size
== 0)
511 /* TODO: support reading extended chip id to determine erase size */
515 device
->erase_size
= device
->device
->erase_size
;
518 /* initialize controller, but leave parameters at the controllers default */
519 if ((retval
= device
->controller
->init(device
) != ERROR_OK
))
523 case ERROR_NAND_OPERATION_FAILED
:
524 DEBUG("controller initialization failed");
525 return ERROR_NAND_OPERATION_FAILED
;
526 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
527 ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
528 device
->bus_width
, device
->address_cycles
, device
->page_size
);
529 return ERROR_NAND_OPERATION_FAILED
;
531 ERROR("BUG: unknown controller initialization failure");
532 return ERROR_NAND_OPERATION_FAILED
;
536 device
->num_blocks
= (device
->device
->chip_size
* 1024) / (device
->erase_size
/ 1024);
537 device
->blocks
= malloc(sizeof(nand_block_t
) * device
->num_blocks
);
539 for (i
= 0; i
< device
->num_blocks
; i
++)
541 device
->blocks
[i
].size
= device
->erase_size
;
542 device
->blocks
[i
].offset
= i
* device
->erase_size
;
543 device
->blocks
[i
].is_erased
= -1;
544 device
->blocks
[i
].is_bad
= -1;
550 int nand_erase(struct nand_device_s
*device
, int first_block
, int last_block
)
558 return ERROR_NAND_DEVICE_NOT_PROBED
;
560 if ((first_block
< 0) || (last_block
> device
->num_blocks
))
561 return ERROR_INVALID_ARGUMENTS
;
563 /* make sure we know if a block is bad before erasing it */
564 for (i
= first_block
; i
<= last_block
; i
++)
566 if (device
->blocks
[i
].is_bad
== -1)
568 nand_build_bbt(device
, i
, last_block
);
573 for (i
= first_block
; i
<= last_block
; i
++)
575 /* Send erase setup command */
576 device
->controller
->command(device
, NAND_CMD_ERASE1
);
578 page
= i
* (device
->erase_size
/ device
->page_size
);
580 /* Send page address */
581 if (device
->page_size
<= 512)
584 device
->controller
->address(device
, page
& 0xff);
585 device
->controller
->address(device
, (page
>> 8) & 0xff);
587 /* 3rd cycle only on devices with more than 32 MiB */
588 if (device
->address_cycles
>= 4)
589 device
->controller
->address(device
, (page
>> 16) & 0xff);
591 /* 4th cycle only on devices with more than 8 GiB */
592 if (device
->address_cycles
>= 5)
593 device
->controller
->address(device
, (page
>> 24) & 0xff);
598 device
->controller
->address(device
, page
& 0xff);
599 device
->controller
->address(device
, (page
>> 8) & 0xff);
601 /* 3rd cycle only on devices with more than 128 MiB */
602 if (device
->address_cycles
>= 5)
603 device
->controller
->address(device
, (page
>> 16) & 0xff);
606 /* Send erase confirm command */
607 device
->controller
->command(device
, NAND_CMD_ERASE2
);
609 if (!device
->controller
->nand_ready(device
, 1000))
611 ERROR("timeout waiting for NAND flash block erase to complete");
612 return ERROR_NAND_OPERATION_TIMEOUT
;
615 if ((retval
= nand_read_status(device
, &status
)) != ERROR_OK
)
617 ERROR("couldn't read status");
618 return ERROR_NAND_OPERATION_FAILED
;
623 ERROR("erase operation didn't pass, status: 0x%2.2x", status
);
624 return ERROR_NAND_OPERATION_FAILED
;
631 int nand_read_plain(struct nand_device_s
*device
, u32 address
, u8
*data
, u32 data_size
)
636 return ERROR_NAND_DEVICE_NOT_PROBED
;
638 if (address
% device
->page_size
)
640 ERROR("reads need to be page aligned");
641 return ERROR_NAND_OPERATION_FAILED
;
644 page
= malloc(device
->page_size
);
646 while (data_size
> 0 )
648 u32 thisrun_size
= (data_size
> device
->page_size
) ? device
->page_size
: data_size
;
652 page_address
= address
/ device
->page_size
;
654 nand_read_page(device
, page_address
, page
, device
->page_size
, NULL
, 0);
656 memcpy(data
, page
, thisrun_size
);
658 address
+= thisrun_size
;
659 data
+= thisrun_size
;
660 data_size
-= thisrun_size
;
668 int nand_write_plain(struct nand_device_s
*device
, u32 address
, u8
*data
, u32 data_size
)
673 return ERROR_NAND_DEVICE_NOT_PROBED
;
675 if (address
% device
->page_size
)
677 ERROR("writes need to be page aligned");
678 return ERROR_NAND_OPERATION_FAILED
;
681 page
= malloc(device
->page_size
);
683 while (data_size
> 0 )
685 u32 thisrun_size
= (data_size
> device
->page_size
) ? device
->page_size
: data_size
;
688 memset(page
, 0xff, device
->page_size
);
689 memcpy(page
, data
, thisrun_size
);
691 page_address
= address
/ device
->page_size
;
693 nand_write_page(device
, page_address
, page
, device
->page_size
, NULL
, 0);
695 address
+= thisrun_size
;
696 data
+= thisrun_size
;
697 data_size
-= thisrun_size
;
705 int nand_write_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
708 return ERROR_NAND_DEVICE_NOT_PROBED
;
711 return nand_write_page_raw(device
, page
, data
, data_size
, oob
, oob_size
);
713 return device
->controller
->write_page(device
, page
, data
, data_size
, oob
, oob_size
);
716 int nand_read_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
719 return ERROR_NAND_DEVICE_NOT_PROBED
;
722 return nand_read_page_raw(device
, page
, data
, data_size
, oob
, oob_size
);
724 return device
->controller
->read_page(device
, page
, data
, data_size
, oob
, oob_size
);
727 int nand_read_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
732 return ERROR_NAND_DEVICE_NOT_PROBED
;
734 if (device
->page_size
<= 512)
736 /* small page device */
738 device
->controller
->command(device
, NAND_CMD_READ0
);
740 device
->controller
->command(device
, NAND_CMD_READOOB
);
742 /* column (always 0, we start at the beginning of a page/OOB area) */
743 device
->controller
->address(device
, 0x0);
746 device
->controller
->address(device
, page
& 0xff);
747 device
->controller
->address(device
, (page
>> 8) & 0xff);
749 /* 4th cycle only on devices with more than 32 MiB */
750 if (device
->address_cycles
>= 4)
751 device
->controller
->address(device
, (page
>> 16) & 0xff);
753 /* 5th cycle only on devices with more than 8 GiB */
754 if (device
->address_cycles
>= 5)
755 device
->controller
->address(device
, (page
>> 24) & 0xff);
759 /* large page device */
760 device
->controller
->command(device
, NAND_CMD_READ0
);
762 /* column (0 when we start at the beginning of a page,
763 * or 2048 for the beginning of OOB area)
765 device
->controller
->address(device
, 0x0);
766 device
->controller
->address(device
, 0x8);
769 device
->controller
->address(device
, page
& 0xff);
770 device
->controller
->address(device
, (page
>> 8) & 0xff);
772 /* 5th cycle only on devices with more than 128 MiB */
773 if (device
->address_cycles
>= 5)
774 device
->controller
->address(device
, (page
>> 16) & 0xff);
776 /* large page devices need a start command */
777 device
->controller
->command(device
, NAND_CMD_READSTART
);
780 if (!device
->controller
->nand_ready(device
, 100))
781 return ERROR_NAND_OPERATION_TIMEOUT
;
785 for (i
= 0; i
< data_size
;)
787 if (device
->device
->options
& NAND_BUSWIDTH_16
)
789 device
->controller
->read_data(device
, data
);
795 device
->controller
->read_data(device
, data
);
804 for (i
= 0; i
< oob_size
;)
806 if (device
->device
->options
& NAND_BUSWIDTH_16
)
808 device
->controller
->read_data(device
, oob
);
814 device
->controller
->read_data(device
, oob
);
824 int nand_write_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
831 return ERROR_NAND_DEVICE_NOT_PROBED
;
833 device
->controller
->command(device
, NAND_CMD_SEQIN
);
835 if (device
->page_size
<= 512)
837 /* column (always 0, we start at the beginning of a page/OOB area) */
838 device
->controller
->address(device
, 0x0);
841 device
->controller
->address(device
, page
& 0xff);
842 device
->controller
->address(device
, (page
>> 8) & 0xff);
844 /* 4th cycle only on devices with more than 32 MiB */
845 if (device
->address_cycles
>= 4)
846 device
->controller
->address(device
, (page
>> 16) & 0xff);
848 /* 5th cycle only on devices with more than 8 GiB */
849 if (device
->address_cycles
>= 5)
850 device
->controller
->address(device
, (page
>> 24) & 0xff);
854 /* column (0 when we start at the beginning of a page,
855 * or 2048 for the beginning of OOB area)
857 device
->controller
->address(device
, 0x0);
858 device
->controller
->address(device
, 0x8);
861 device
->controller
->address(device
, page
& 0xff);
862 device
->controller
->address(device
, (page
>> 8) & 0xff);
864 /* 5th cycle only on devices with more than 128 MiB */
865 if (device
->address_cycles
>= 5)
866 device
->controller
->address(device
, (page
>> 16) & 0xff);
871 for (i
= 0; i
< data_size
;)
873 if (device
->device
->options
& NAND_BUSWIDTH_16
)
875 u16 data_buf
= le_to_h_u16(data
);
876 device
->controller
->write_data(device
, data_buf
);
882 device
->controller
->write_data(device
, *data
);
891 for (i
= 0; i
< oob_size
;)
893 if (device
->device
->options
& NAND_BUSWIDTH_16
)
895 u16 oob_buf
= le_to_h_u16(data
);
896 device
->controller
->write_data(device
, oob_buf
);
902 device
->controller
->write_data(device
, *oob
);
909 device
->controller
->command(device
, NAND_CMD_PAGEPROG
);
911 if (!device
->controller
->nand_ready(device
, 100))
912 return ERROR_NAND_OPERATION_TIMEOUT
;
914 if ((retval
= nand_read_status(device
, &status
)) != ERROR_OK
)
916 ERROR("couldn't read status");
917 return ERROR_NAND_OPERATION_FAILED
;
920 if (status
& NAND_STATUS_FAIL
)
922 ERROR("write operation didn't pass, status: 0x%2.2x", status
);
923 return ERROR_NAND_OPERATION_FAILED
;
929 int handle_nand_list_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
936 command_print(cmd_ctx
, "no NAND flash devices configured");
940 for (p
= nand_devices
; p
; p
= p
->next
)
943 command_print(cmd_ctx
, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
944 i
++, p
->device
->name
, p
->manufacturer
->name
, p
->page_size
, p
->bus_width
, p
->erase_size
);
946 command_print(cmd_ctx
, "#%i: not probed");
952 int handle_nand_info_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
960 if ((argc
< 1) || (argc
> 3))
962 command_print(cmd_ctx
, "usage: nand info <num> [<first> <last>]");
968 first
= last
= strtoul(args
[1], NULL
, 0);
972 first
= strtoul(args
[1], NULL
, 0);
973 last
= strtoul(args
[2], NULL
, 0);
976 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
981 if (first
>= p
->num_blocks
)
982 first
= p
->num_blocks
- 1;
984 if (last
>= p
->num_blocks
)
985 last
= p
->num_blocks
- 1;
987 command_print(cmd_ctx
, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
988 i
++, p
->device
->name
, p
->manufacturer
->name
, p
->page_size
, p
->bus_width
, p
->erase_size
);
990 for (j
= first
; j
<= last
; j
++)
992 char *erase_state
, *bad_state
;
994 if (p
->blocks
[j
].is_erased
== 0)
995 erase_state
= "not erased";
996 else if (p
->blocks
[j
].is_erased
== 1)
997 erase_state
= "erased";
999 erase_state
= "erase state unknown";
1001 if (p
->blocks
[j
].is_bad
== 0)
1003 else if (p
->blocks
[j
].is_bad
== 1)
1004 bad_state
= " (marked bad)";
1006 bad_state
= " (block condition unknown)";
1008 command_print(cmd_ctx
, "\t#%i: 0x%8.8x (0x%xkB) %s%s",
1009 j
, p
->blocks
[j
].offset
, p
->blocks
[j
].size
/ 1024,
1010 erase_state
, bad_state
);
1015 command_print(cmd_ctx
, "#%i: not probed");
1022 int handle_nand_probe_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1029 command_print(cmd_ctx
, "usage: nand probe <num>");
1033 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1036 if ((retval
= nand_probe(p
)) == ERROR_OK
)
1038 command_print(cmd_ctx
, "NAND flash device '%s' found", p
->device
->name
);
1040 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1042 command_print(cmd_ctx
, "probing failed for NAND flash device");
1046 command_print(cmd_ctx
, "unknown error when probing NAND flash device");
1051 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1057 int handle_nand_erase_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1064 command_print(cmd_ctx
, "usage: nand erase <num> <first> <last>");
1068 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1071 int first
= strtoul(args
[1], NULL
, 0);
1072 int last
= strtoul(args
[2], NULL
, 0);
1074 if ((retval
= nand_erase(p
, first
, last
)) == ERROR_OK
)
1076 command_print(cmd_ctx
, "successfully erased blocks %i to %i on NAND flash device '%s'", first
, last
, p
->device
->name
);
1078 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1080 command_print(cmd_ctx
, "erase failed");
1084 command_print(cmd_ctx
, "unknown error when erasing NAND flash device");
1089 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1095 int handle_nand_check_bad_blocks_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1102 if ((argc
< 1) || (argc
> 3) || (argc
== 2))
1104 command_print(cmd_ctx
, "usage: nand check_bad_blocks <num> [<first> <last>]");
1110 first
= strtoul(args
[1], NULL
, 0);
1111 last
= strtoul(args
[2], NULL
, 0);
1114 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1117 if ((retval
= nand_build_bbt(p
, first
, last
)) == ERROR_OK
)
1119 command_print(cmd_ctx
, "checked NAND flash device for bad blocks, use \"nand info\" command to list blocks", p
->device
->name
);
1121 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1123 command_print(cmd_ctx
, "error when checking for bad blocks on NAND flash device");
1127 command_print(cmd_ctx
, "unknown error when checking for bad blocks on NAND flash device");
1132 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1138 int handle_nand_copy_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1144 command_print(cmd_ctx
, "usage: nand copy <num> <offset> <length> <ram-address>");
1148 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1155 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1161 int handle_nand_write_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1166 enum oob_formats oob_format
= NAND_OOB_NONE
;
1170 duration_t duration
;
1171 char *duration_text
;
1177 command_print(cmd_ctx
, "usage: nand write <num> <file> <offset> [options]");
1181 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1189 duration_start_measure(&duration
);
1190 offset
= strtoul(args
[2], NULL
, 0);
1195 for (i
= 3; i
< argc
; i
++)
1197 if (!strcmp(args
[i
], "oob_raw"))
1198 oob_format
|= NAND_OOB_RAW
;
1199 else if (!strcmp(args
[i
], "oob_only"))
1200 oob_format
|= NAND_OOB_RAW
| NAND_OOB_ONLY
;
1203 command_print(cmd_ctx
, "unknown option: %s", args
[i
]);
1208 if (fileio_open(&fileio
, args
[1], FILEIO_READ
, FILEIO_BINARY
) != ERROR_OK
)
1210 command_print(cmd_ctx
, "file open error: %s", fileio
.error_str
);
1214 buf_cnt
= binary_size
= fileio
.size
;
1216 if (!(oob_format
& NAND_OOB_ONLY
))
1218 page_size
= p
->page_size
;
1219 page
= malloc(p
->page_size
);
1222 if (oob_format
& NAND_OOB_RAW
)
1224 if (p
->page_size
== 512)
1226 else if (p
->page_size
== 2048)
1228 oob
= malloc(oob_size
);
1231 if (offset
% p
->page_size
)
1233 command_print(cmd_ctx
, "only page size aligned offsets and sizes are supported");
1243 fileio_read(&fileio
, page_size
, page
, &size_read
);
1244 buf_cnt
-= size_read
;
1245 if (size_read
< page_size
)
1247 memset(page
+ size_read
, 0xff, page_size
- size_read
);
1253 fileio_read(&fileio
, oob_size
, oob
, &size_read
);
1254 buf_cnt
-= size_read
;
1255 if (size_read
< oob_size
)
1257 memset(oob
+ size_read
, 0xff, oob_size
- size_read
);
1261 if (nand_write_page(p
, offset
/ p
->page_size
, page
, page_size
, oob
, oob_size
) != ERROR_OK
)
1263 command_print(cmd_ctx
, "failed writing file %s to NAND flash %s at offset 0x%8.8x",
1264 args
[1], args
[0], offset
);
1267 offset
+= page_size
;
1270 fileio_close(&fileio
);
1272 duration_stop_measure(&duration
, &duration_text
);
1273 command_print(cmd_ctx
, "wrote file %s to NAND flash %s at offset 0x%8.8x in %s",
1274 args
[1], args
[0], offset
, duration_text
);
1275 free(duration_text
);
1279 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1285 int handle_nand_dump_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1291 command_print(cmd_ctx
, "usage: nand dump <num> <filename> <address> <size> [options]");
1295 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1301 duration_t duration
;
1302 char *duration_text
;
1309 u32 address
= strtoul(args
[2], NULL
, 0);
1310 u32 size
= strtoul(args
[3], NULL
, 0);
1312 enum oob_formats oob_format
= NAND_OOB_NONE
;
1317 for (i
= 4; i
< argc
; i
++)
1319 if (!strcmp(args
[i
], "oob_raw"))
1320 oob_format
|= NAND_OOB_RAW
;
1321 else if (!strcmp(args
[i
], "oob_only"))
1322 oob_format
|= NAND_OOB_RAW
| NAND_OOB_ONLY
;
1324 command_print(cmd_ctx
, "unknown option: '%s'", args
[i
]);
1328 if ((address
% p
->page_size
) || (size
% p
->page_size
))
1330 command_print(cmd_ctx
, "only page size aligned addresses and sizes are supported");
1334 if (!(oob_format
& NAND_OOB_ONLY
))
1336 page_size
= p
->page_size
;
1337 page
= malloc(p
->page_size
);
1340 if (oob_format
& NAND_OOB_RAW
)
1342 if (p
->page_size
== 512)
1344 else if (p
->page_size
== 2048)
1346 oob
= malloc(oob_size
);
1349 if (fileio_open(&fileio
, args
[1], FILEIO_WRITE
, FILEIO_BINARY
) != ERROR_OK
)
1351 command_print(cmd_ctx
, "dump_image error: %s", fileio
.error_str
);
1355 duration_start_measure(&duration
);
1360 if ((retval
= nand_read_page(p
, address
/ p
->page_size
, page
, page_size
, oob
, oob_size
)) != ERROR_OK
)
1362 command_print(cmd_ctx
, "reading NAND flash page failed");
1368 fileio_write(&fileio
, page_size
, page
, &size_written
);
1369 bytes_done
+= page_size
;
1374 fileio_write(&fileio
, oob_size
, oob
, &size_written
);
1375 bytes_done
+= oob_size
;
1378 size
-= p
->page_size
;
1379 address
+= p
->page_size
;
1388 fileio_close(&fileio
);
1390 duration_stop_measure(&duration
, &duration_text
);
1391 command_print(cmd_ctx
, "dumped %"PRIi64
" byte in %s", fileio
.size
, duration_text
);
1392 free(duration_text
);
1396 command_print(cmd_ctx
, "#%i: not probed");
1401 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1407 int handle_nand_raw_access_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1411 if ((argc
< 1) || (argc
> 2))
1413 command_print(cmd_ctx
, "usage: nand raw_access <num> ['enable'|'disable']");
1417 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1424 if (strcmp("enable", args
[1]) == 0)
1428 else if (strcmp("disable", args
[1]) == 0)
1434 command_print(cmd_ctx
, "usage: nand raw_access ['enable'|disable']");
1438 command_print(cmd_ctx
, "raw access is %s", (p
->use_raw
) ? "enabled" : "disabled");
1442 command_print(cmd_ctx
, "#%i: not probed");
1447 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
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