1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
8 * Copyright (C) 2011 by Erik Botö
9 * erik.boto@pelagicore.com
11 * This program is free software; you can redistribute it and/or modify *
12 * it under the terms of the GNU General Public License as published by *
13 * the Free Software Foundation; either version 2 of the License, or *
14 * (at your option) any later version. *
16 * This program is distributed in the hope that it will be useful, *
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19 * GNU General Public License for more details. *
21 * You should have received a copy of the GNU General Public License *
22 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
23 ***************************************************************************/
30 #include <helper/binarybuffer.h>
31 #include <target/algorithm.h>
32 #include <target/armv7m.h>
34 /* em357 register locations */
36 #define EM357_FLASH_ACR 0x40008000
37 #define EM357_FLASH_KEYR 0x40008004
38 #define EM357_FLASH_OPTKEYR 0x40008008
39 #define EM357_FLASH_SR 0x4000800C
40 #define EM357_FLASH_CR 0x40008010
41 #define EM357_FLASH_AR 0x40008014
42 #define EM357_FLASH_OBR 0x4000801C
43 #define EM357_FLASH_WRPR 0x40008020
45 #define EM357_FPEC_CLK 0x4000402c
46 /* option byte location */
48 #define EM357_OB_RDP 0x08040800
49 #define EM357_OB_WRP0 0x08040808
50 #define EM357_OB_WRP1 0x0804080A
51 #define EM357_OB_WRP2 0x0804080C
53 /* FLASH_CR register bits */
55 #define FLASH_PG (1 << 0)
56 #define FLASH_PER (1 << 1)
57 #define FLASH_MER (1 << 2)
58 #define FLASH_OPTPG (1 << 4)
59 #define FLASH_OPTER (1 << 5)
60 #define FLASH_STRT (1 << 6)
61 #define FLASH_LOCK (1 << 7)
62 #define FLASH_OPTWRE (1 << 9)
64 /* FLASH_SR register bits */
66 #define FLASH_BSY (1 << 0)
67 #define FLASH_PGERR (1 << 2)
68 #define FLASH_WRPRTERR (1 << 4)
69 #define FLASH_EOP (1 << 5)
71 /* EM357_FLASH_OBR bit definitions (reading) */
76 /* register unlock keys */
78 #define KEY1 0x45670123
79 #define KEY2 0xCDEF89AB
81 struct em357_options
{
83 uint16_t user_options
;
84 uint16_t protection
[3];
87 struct em357_flash_bank
{
88 struct em357_options option_bytes
;
93 static int em357_mass_erase(struct flash_bank
*bank
);
95 /* flash bank em357 <base> <size> 0 0 <target#>
97 FLASH_BANK_COMMAND_HANDLER(em357_flash_bank_command
)
99 struct em357_flash_bank
*em357_info
;
102 return ERROR_COMMAND_SYNTAX_ERROR
;
104 em357_info
= malloc(sizeof(struct em357_flash_bank
));
105 bank
->driver_priv
= em357_info
;
107 em357_info
->probed
= 0;
112 static inline int em357_get_flash_status(struct flash_bank
*bank
, uint32_t *status
)
114 struct target
*target
= bank
->target
;
115 return target_read_u32(target
, EM357_FLASH_SR
, status
);
118 static int em357_wait_status_busy(struct flash_bank
*bank
, int timeout
)
120 struct target
*target
= bank
->target
;
122 int retval
= ERROR_OK
;
124 /* wait for busy to clear */
126 retval
= em357_get_flash_status(bank
, &status
);
127 if (retval
!= ERROR_OK
)
129 LOG_DEBUG("status: 0x%" PRIx32
"", status
);
130 if ((status
& FLASH_BSY
) == 0)
132 if (timeout
-- <= 0) {
133 LOG_ERROR("timed out waiting for flash");
139 if (status
& FLASH_WRPRTERR
) {
140 LOG_ERROR("em357 device protected");
144 if (status
& FLASH_PGERR
) {
145 LOG_ERROR("em357 device programming failed");
149 /* Clear but report errors */
150 if (status
& (FLASH_WRPRTERR
| FLASH_PGERR
)) {
151 /* If this operation fails, we ignore it and report the original
154 target_write_u32(target
, EM357_FLASH_SR
, FLASH_WRPRTERR
| FLASH_PGERR
);
159 static int em357_read_options(struct flash_bank
*bank
)
162 struct em357_flash_bank
*em357_info
= NULL
;
163 struct target
*target
= bank
->target
;
165 em357_info
= bank
->driver_priv
;
167 /* read current option bytes */
168 int retval
= target_read_u32(target
, EM357_FLASH_OBR
, &optiondata
);
169 if (retval
!= ERROR_OK
)
172 em357_info
->option_bytes
.user_options
= (uint16_t)0xFFFC | ((optiondata
>> 2) & 0x03);
173 em357_info
->option_bytes
.RDP
= (optiondata
& (1 << OPT_READOUT
)) ? 0xFFFF : 0x5AA5;
175 if (optiondata
& (1 << OPT_READOUT
))
176 LOG_INFO("Device Security Bit Set");
178 /* each bit refers to a 4bank protection */
179 retval
= target_read_u32(target
, EM357_FLASH_WRPR
, &optiondata
);
180 if (retval
!= ERROR_OK
)
183 em357_info
->option_bytes
.protection
[0] = (uint16_t)optiondata
;
184 em357_info
->option_bytes
.protection
[1] = (uint16_t)(optiondata
>> 8);
185 em357_info
->option_bytes
.protection
[2] = (uint16_t)(optiondata
>> 16);
190 static int em357_erase_options(struct flash_bank
*bank
)
192 struct em357_flash_bank
*em357_info
= NULL
;
193 struct target
*target
= bank
->target
;
195 em357_info
= bank
->driver_priv
;
197 /* read current options */
198 em357_read_options(bank
);
200 /* unlock flash registers */
201 int retval
= target_write_u32(target
, EM357_FLASH_KEYR
, KEY1
);
202 if (retval
!= ERROR_OK
)
205 retval
= target_write_u32(target
, EM357_FLASH_KEYR
, KEY2
);
206 if (retval
!= ERROR_OK
)
209 /* unlock option flash registers */
210 retval
= target_write_u32(target
, EM357_FLASH_OPTKEYR
, KEY1
);
211 if (retval
!= ERROR_OK
)
213 retval
= target_write_u32(target
, EM357_FLASH_OPTKEYR
, KEY2
);
214 if (retval
!= ERROR_OK
)
217 /* erase option bytes */
218 retval
= target_write_u32(target
, EM357_FLASH_CR
, FLASH_OPTER
| FLASH_OPTWRE
);
219 if (retval
!= ERROR_OK
)
221 retval
= target_write_u32(target
, EM357_FLASH_CR
, FLASH_OPTER
| FLASH_STRT
| FLASH_OPTWRE
);
222 if (retval
!= ERROR_OK
)
225 retval
= em357_wait_status_busy(bank
, 10);
226 if (retval
!= ERROR_OK
)
229 /* clear readout protection and complementary option bytes
230 * this will also force a device unlock if set */
231 em357_info
->option_bytes
.RDP
= 0x5AA5;
236 static int em357_write_options(struct flash_bank
*bank
)
238 struct em357_flash_bank
*em357_info
= NULL
;
239 struct target
*target
= bank
->target
;
241 em357_info
= bank
->driver_priv
;
243 /* unlock flash registers */
244 int retval
= target_write_u32(target
, EM357_FLASH_KEYR
, KEY1
);
245 if (retval
!= ERROR_OK
)
247 retval
= target_write_u32(target
, EM357_FLASH_KEYR
, KEY2
);
248 if (retval
!= ERROR_OK
)
251 /* unlock option flash registers */
252 retval
= target_write_u32(target
, EM357_FLASH_OPTKEYR
, KEY1
);
253 if (retval
!= ERROR_OK
)
255 retval
= target_write_u32(target
, EM357_FLASH_OPTKEYR
, KEY2
);
256 if (retval
!= ERROR_OK
)
259 /* program option bytes */
260 retval
= target_write_u32(target
, EM357_FLASH_CR
, FLASH_OPTPG
| FLASH_OPTWRE
);
261 if (retval
!= ERROR_OK
)
264 retval
= em357_wait_status_busy(bank
, 10);
265 if (retval
!= ERROR_OK
)
268 /* write protection byte 1 */
269 retval
= target_write_u16(target
, EM357_OB_WRP0
, em357_info
->option_bytes
.protection
[0]);
270 if (retval
!= ERROR_OK
)
273 retval
= em357_wait_status_busy(bank
, 10);
274 if (retval
!= ERROR_OK
)
277 /* write protection byte 2 */
278 retval
= target_write_u16(target
, EM357_OB_WRP1
, em357_info
->option_bytes
.protection
[1]);
279 if (retval
!= ERROR_OK
)
282 retval
= em357_wait_status_busy(bank
, 10);
283 if (retval
!= ERROR_OK
)
286 /* write protection byte 3 */
287 retval
= target_write_u16(target
, EM357_OB_WRP2
, em357_info
->option_bytes
.protection
[2]);
288 if (retval
!= ERROR_OK
)
291 retval
= em357_wait_status_busy(bank
, 10);
292 if (retval
!= ERROR_OK
)
295 /* write readout protection bit */
296 retval
= target_write_u16(target
, EM357_OB_RDP
, em357_info
->option_bytes
.RDP
);
297 if (retval
!= ERROR_OK
)
300 retval
= em357_wait_status_busy(bank
, 10);
301 if (retval
!= ERROR_OK
)
304 retval
= target_write_u32(target
, EM357_FLASH_CR
, FLASH_LOCK
);
305 if (retval
!= ERROR_OK
)
311 static int em357_protect_check(struct flash_bank
*bank
)
313 struct target
*target
= bank
->target
;
314 struct em357_flash_bank
*em357_info
= bank
->driver_priv
;
321 if (target
->state
!= TARGET_HALTED
) {
322 LOG_ERROR("Target not halted");
323 return ERROR_TARGET_NOT_HALTED
;
326 /* each bit refers to a 4bank protection (bit 0-23) */
327 int retval
= target_read_u32(target
, EM357_FLASH_WRPR
, &protection
);
328 if (retval
!= ERROR_OK
)
331 /* each protection bit is for 4 * 2K pages */
332 num_bits
= (bank
->num_sectors
/ em357_info
->ppage_size
);
334 for (i
= 0; i
< num_bits
; i
++) {
336 if (protection
& (1 << i
))
339 for (s
= 0; s
< em357_info
->ppage_size
; s
++)
340 bank
->sectors
[(i
* em357_info
->ppage_size
) + s
].is_protected
= set
;
346 static int em357_erase(struct flash_bank
*bank
, int first
, int last
)
348 struct target
*target
= bank
->target
;
351 if (bank
->target
->state
!= TARGET_HALTED
) {
352 LOG_ERROR("Target not halted");
353 return ERROR_TARGET_NOT_HALTED
;
356 if ((first
== 0) && (last
== (bank
->num_sectors
- 1)))
357 return em357_mass_erase(bank
);
359 /* Enable FPEC clock */
360 target_write_u32(target
, EM357_FPEC_CLK
, 0x00000001);
362 /* unlock flash registers */
363 int retval
= target_write_u32(target
, EM357_FLASH_KEYR
, KEY1
);
364 if (retval
!= ERROR_OK
)
366 retval
= target_write_u32(target
, EM357_FLASH_KEYR
, KEY2
);
367 if (retval
!= ERROR_OK
)
370 for (i
= first
; i
<= last
; i
++) {
371 retval
= target_write_u32(target
, EM357_FLASH_CR
, FLASH_PER
);
372 if (retval
!= ERROR_OK
)
374 retval
= target_write_u32(target
, EM357_FLASH_AR
,
375 bank
->base
+ bank
->sectors
[i
].offset
);
376 if (retval
!= ERROR_OK
)
378 retval
= target_write_u32(target
, EM357_FLASH_CR
, FLASH_PER
| FLASH_STRT
);
379 if (retval
!= ERROR_OK
)
382 retval
= em357_wait_status_busy(bank
, 100);
383 if (retval
!= ERROR_OK
)
386 bank
->sectors
[i
].is_erased
= 1;
389 retval
= target_write_u32(target
, EM357_FLASH_CR
, FLASH_LOCK
);
390 if (retval
!= ERROR_OK
)
396 static int em357_protect(struct flash_bank
*bank
, int set
, int first
, int last
)
398 struct em357_flash_bank
*em357_info
= NULL
;
399 struct target
*target
= bank
->target
;
400 uint16_t prot_reg
[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
405 em357_info
= bank
->driver_priv
;
407 if (target
->state
!= TARGET_HALTED
) {
408 LOG_ERROR("Target not halted");
409 return ERROR_TARGET_NOT_HALTED
;
412 if ((first
% em357_info
->ppage_size
) != 0) {
413 LOG_WARNING("aligned start protect sector to a %d sector boundary",
414 em357_info
->ppage_size
);
415 first
= first
- (first
% em357_info
->ppage_size
);
417 if (((last
+ 1) % em357_info
->ppage_size
) != 0) {
418 LOG_WARNING("aligned end protect sector to a %d sector boundary",
419 em357_info
->ppage_size
);
421 last
= last
- (last
% em357_info
->ppage_size
);
425 /* each bit refers to a 4bank protection */
426 int retval
= target_read_u32(target
, EM357_FLASH_WRPR
, &protection
);
427 if (retval
!= ERROR_OK
)
430 prot_reg
[0] = (uint16_t)protection
;
431 prot_reg
[1] = (uint16_t)(protection
>> 8);
432 prot_reg
[2] = (uint16_t)(protection
>> 16);
434 for (i
= first
; i
<= last
; i
++) {
435 reg
= (i
/ em357_info
->ppage_size
) / 8;
436 bit
= (i
/ em357_info
->ppage_size
) - (reg
* 8);
438 LOG_WARNING("reg, bit: %d, %d", reg
, bit
);
440 prot_reg
[reg
] &= ~(1 << bit
);
442 prot_reg
[reg
] |= (1 << bit
);
445 status
= em357_erase_options(bank
);
446 if (retval
!= ERROR_OK
)
449 em357_info
->option_bytes
.protection
[0] = prot_reg
[0];
450 em357_info
->option_bytes
.protection
[1] = prot_reg
[1];
451 em357_info
->option_bytes
.protection
[2] = prot_reg
[2];
453 return em357_write_options(bank
);
456 static int em357_write_block(struct flash_bank
*bank
, const uint8_t *buffer
,
457 uint32_t offset
, uint32_t count
)
459 struct target
*target
= bank
->target
;
460 uint32_t buffer_size
= 16384;
461 struct working_area
*write_algorithm
;
462 struct working_area
*source
;
463 uint32_t address
= bank
->base
+ offset
;
464 struct reg_param reg_params
[4];
465 struct armv7m_algorithm armv7m_info
;
466 int retval
= ERROR_OK
;
468 /* see contib/loaders/flash/stm32x.s for src, the same is used here except for
469 * a modified *_FLASH_BASE */
471 static const uint8_t em357_flash_write_code
[] = {
472 /* #define EM357_FLASH_CR_OFFSET 0x10
473 * #define EM357_FLASH_SR_OFFSET 0x0C
475 0x08, 0x4c, /* ldr r4, EM357_FLASH_BASE */
476 0x1c, 0x44, /* add r4, r3 */
477 /* write_half_word: */
478 0x01, 0x23, /* movs r3, #0x01 */
479 0x23, 0x61, /* str r3, [r4,
480 *#EM357_FLASH_CR_OFFSET] */
481 0x30, 0xf8, 0x02, 0x3b, /* ldrh r3, [r0], #0x02 */
482 0x21, 0xf8, 0x02, 0x3b, /* strh r3, [r1], #0x02 */
484 0xe3, 0x68, /* ldr r3, [r4,
485 *#EM357_FLASH_SR_OFFSET] */
486 0x13, 0xf0, 0x01, 0x0f, /* tst r3, #0x01 */
487 0xfb, 0xd0, /* beq busy */
488 0x13, 0xf0, 0x14, 0x0f, /* tst r3, #0x14 */
489 0x01, 0xd1, /* bne exit */
490 0x01, 0x3a, /* subs r2, r2, #0x01 */
491 0xf0, 0xd1, /* bne write_half_word */
493 0x00, 0xbe, /* bkpt #0x00 */
494 0x00, 0x80, 0x00, 0x40, /* EM357_FLASH_BASE: .word 0x40008000 */
497 /* flash write code */
498 if (target_alloc_working_area(target
, sizeof(em357_flash_write_code
),
499 &write_algorithm
) != ERROR_OK
) {
500 LOG_WARNING("no working area available, can't do block memory writes");
501 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
504 retval
= target_write_buffer(target
, write_algorithm
->address
,
505 sizeof(em357_flash_write_code
), em357_flash_write_code
);
506 if (retval
!= ERROR_OK
)
510 while (target_alloc_working_area_try(target
, buffer_size
, &source
) != ERROR_OK
) {
512 if (buffer_size
<= 256) {
513 /* we already allocated the writing code, but failed to get a
514 * buffer, free the algorithm */
515 target_free_working_area(target
, write_algorithm
);
518 "no large enough working area available, can't do block memory writes");
519 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
523 armv7m_info
.common_magic
= ARMV7M_COMMON_MAGIC
;
524 armv7m_info
.core_mode
= ARM_MODE_THREAD
;
526 init_reg_param(®_params
[0], "r0", 32, PARAM_OUT
);
527 init_reg_param(®_params
[1], "r1", 32, PARAM_OUT
);
528 init_reg_param(®_params
[2], "r2", 32, PARAM_OUT
);
529 init_reg_param(®_params
[3], "r3", 32, PARAM_IN_OUT
);
532 uint32_t thisrun_count
= (count
> (buffer_size
/ 2)) ?
533 (buffer_size
/ 2) : count
;
535 retval
= target_write_buffer(target
, source
->address
, thisrun_count
* 2, buffer
);
536 if (retval
!= ERROR_OK
)
539 buf_set_u32(reg_params
[0].value
, 0, 32, source
->address
);
540 buf_set_u32(reg_params
[1].value
, 0, 32, address
);
541 buf_set_u32(reg_params
[2].value
, 0, 32, thisrun_count
);
542 buf_set_u32(reg_params
[3].value
, 0, 32, 0);
544 retval
= target_run_algorithm(target
, 0, NULL
, 4, reg_params
,
545 write_algorithm
->address
, 0, 10000, &armv7m_info
);
546 if (retval
!= ERROR_OK
) {
547 LOG_ERROR("error executing em357 flash write algorithm");
551 if (buf_get_u32(reg_params
[3].value
, 0, 32) & FLASH_PGERR
) {
552 LOG_ERROR("flash memory not erased before writing");
553 /* Clear but report errors */
554 target_write_u32(target
, EM357_FLASH_SR
, FLASH_PGERR
);
559 if (buf_get_u32(reg_params
[3].value
, 0, 32) & FLASH_WRPRTERR
) {
560 LOG_ERROR("flash memory write protected");
561 /* Clear but report errors */
562 target_write_u32(target
, EM357_FLASH_SR
, FLASH_WRPRTERR
);
567 buffer
+= thisrun_count
* 2;
568 address
+= thisrun_count
* 2;
569 count
-= thisrun_count
;
572 target_free_working_area(target
, source
);
573 target_free_working_area(target
, write_algorithm
);
575 destroy_reg_param(®_params
[0]);
576 destroy_reg_param(®_params
[1]);
577 destroy_reg_param(®_params
[2]);
578 destroy_reg_param(®_params
[3]);
583 static int em357_write(struct flash_bank
*bank
, const uint8_t *buffer
,
584 uint32_t offset
, uint32_t count
)
586 struct target
*target
= bank
->target
;
587 uint32_t words_remaining
= (count
/ 2);
588 uint32_t bytes_remaining
= (count
& 0x00000001);
589 uint32_t address
= bank
->base
+ offset
;
590 uint32_t bytes_written
= 0;
593 if (bank
->target
->state
!= TARGET_HALTED
) {
594 LOG_ERROR("Target not halted");
595 return ERROR_TARGET_NOT_HALTED
;
599 LOG_WARNING("offset 0x%" PRIx32
" breaks required 2-byte alignment", offset
);
600 return ERROR_FLASH_DST_BREAKS_ALIGNMENT
;
603 /* unlock flash registers */
604 retval
= target_write_u32(target
, EM357_FLASH_KEYR
, KEY1
);
605 if (retval
!= ERROR_OK
)
607 retval
= target_write_u32(target
, EM357_FLASH_KEYR
, KEY2
);
608 if (retval
!= ERROR_OK
)
611 target_write_u32(target
, EM357_FPEC_CLK
, 0x00000001);
613 /* multiple half words (2-byte) to be programmed? */
614 if (words_remaining
> 0) {
615 /* try using a block write */
616 retval
= em357_write_block(bank
, buffer
, offset
, words_remaining
);
617 if (retval
!= ERROR_OK
) {
618 if (retval
== ERROR_TARGET_RESOURCE_NOT_AVAILABLE
) {
619 /* if block write failed (no sufficient working area),
620 * we use normal (slow) single dword accesses */
622 "couldn't use block writes, falling back to single memory accesses");
625 buffer
+= words_remaining
* 2;
626 address
+= words_remaining
* 2;
631 if ((retval
!= ERROR_OK
) && (retval
!= ERROR_TARGET_RESOURCE_NOT_AVAILABLE
))
634 while (words_remaining
> 0) {
636 memcpy(&value
, buffer
+ bytes_written
, sizeof(uint16_t));
638 retval
= target_write_u32(target
, EM357_FLASH_CR
, FLASH_PG
);
639 if (retval
!= ERROR_OK
)
641 retval
= target_write_u16(target
, address
, value
);
642 if (retval
!= ERROR_OK
)
645 retval
= em357_wait_status_busy(bank
, 5);
646 if (retval
!= ERROR_OK
)
654 if (bytes_remaining
) {
655 uint16_t value
= 0xffff;
656 memcpy(&value
, buffer
+ bytes_written
, bytes_remaining
);
658 retval
= target_write_u32(target
, EM357_FLASH_CR
, FLASH_PG
);
659 if (retval
!= ERROR_OK
)
661 retval
= target_write_u16(target
, address
, value
);
662 if (retval
!= ERROR_OK
)
665 retval
= em357_wait_status_busy(bank
, 5);
666 if (retval
!= ERROR_OK
)
670 return target_write_u32(target
, EM357_FLASH_CR
, FLASH_LOCK
);
673 static int em357_probe(struct flash_bank
*bank
)
675 struct target
*target
= bank
->target
;
676 struct em357_flash_bank
*em357_info
= bank
->driver_priv
;
680 uint32_t base_address
= 0x08000000;
682 em357_info
->probed
= 0;
684 switch (bank
->size
) {
686 /* 64k -- 64 1k pages */
691 /* 128k -- 128 1k pages */
696 /* 192k -- 96 2k pages */
701 /* 256k -- 128 2k pages */
706 /* 512k -- 256 2k pages */
711 LOG_WARNING("No size specified for em357 flash driver, assuming 192k!");
717 /* Enable FPEC CLK */
718 int retval
= target_write_u32(target
, EM357_FPEC_CLK
, 0x00000001);
719 if (retval
!= ERROR_OK
)
722 em357_info
->ppage_size
= 4;
724 LOG_INFO("flash size = %dkbytes", num_pages
*page_size
/1024);
728 bank
->sectors
= NULL
;
731 bank
->base
= base_address
;
732 bank
->size
= (num_pages
* page_size
);
733 bank
->num_sectors
= num_pages
;
734 bank
->sectors
= malloc(sizeof(struct flash_sector
) * num_pages
);
736 for (i
= 0; i
< num_pages
; i
++) {
737 bank
->sectors
[i
].offset
= i
* page_size
;
738 bank
->sectors
[i
].size
= page_size
;
739 bank
->sectors
[i
].is_erased
= -1;
740 bank
->sectors
[i
].is_protected
= 1;
743 em357_info
->probed
= 1;
748 static int em357_auto_probe(struct flash_bank
*bank
)
750 struct em357_flash_bank
*em357_info
= bank
->driver_priv
;
751 if (em357_info
->probed
)
753 return em357_probe(bank
);
756 COMMAND_HANDLER(em357_handle_lock_command
)
758 struct target
*target
= NULL
;
759 struct em357_flash_bank
*em357_info
= NULL
;
762 return ERROR_COMMAND_SYNTAX_ERROR
;
764 struct flash_bank
*bank
;
765 int retval
= CALL_COMMAND_HANDLER(flash_command_get_bank
, 0, &bank
);
766 if (ERROR_OK
!= retval
)
769 em357_info
= bank
->driver_priv
;
771 target
= bank
->target
;
773 if (target
->state
!= TARGET_HALTED
) {
774 LOG_ERROR("Target not halted");
775 return ERROR_TARGET_NOT_HALTED
;
778 if (em357_erase_options(bank
) != ERROR_OK
) {
779 command_print(CMD_CTX
, "em357 failed to erase options");
783 /* set readout protection */
784 em357_info
->option_bytes
.RDP
= 0;
786 if (em357_write_options(bank
) != ERROR_OK
) {
787 command_print(CMD_CTX
, "em357 failed to lock device");
791 command_print(CMD_CTX
, "em357 locked");
796 COMMAND_HANDLER(em357_handle_unlock_command
)
798 struct target
*target
= NULL
;
801 return ERROR_COMMAND_SYNTAX_ERROR
;
803 struct flash_bank
*bank
;
804 int retval
= CALL_COMMAND_HANDLER(flash_command_get_bank
, 0, &bank
);
805 if (ERROR_OK
!= retval
)
808 target
= bank
->target
;
810 if (target
->state
!= TARGET_HALTED
) {
811 LOG_ERROR("Target not halted");
812 return ERROR_TARGET_NOT_HALTED
;
815 if (em357_erase_options(bank
) != ERROR_OK
) {
816 command_print(CMD_CTX
, "em357 failed to unlock device");
820 if (em357_write_options(bank
) != ERROR_OK
) {
821 command_print(CMD_CTX
, "em357 failed to lock device");
825 command_print(CMD_CTX
, "em357 unlocked.\n"
826 "INFO: a reset or power cycle is required "
827 "for the new settings to take effect.");
832 static int em357_mass_erase(struct flash_bank
*bank
)
834 struct target
*target
= bank
->target
;
836 if (target
->state
!= TARGET_HALTED
) {
837 LOG_ERROR("Target not halted");
838 return ERROR_TARGET_NOT_HALTED
;
841 /* Make sure the flash clock is on */
842 target_write_u32(target
, EM357_FPEC_CLK
, 0x00000001);
844 /* unlock option flash registers */
845 int retval
= target_write_u32(target
, EM357_FLASH_KEYR
, KEY1
);
846 if (retval
!= ERROR_OK
)
848 retval
= target_write_u32(target
, EM357_FLASH_KEYR
, KEY2
);
849 if (retval
!= ERROR_OK
)
852 /* mass erase flash memory */
853 retval
= target_write_u32(target
, EM357_FLASH_CR
, FLASH_MER
);
854 if (retval
!= ERROR_OK
)
856 retval
= target_write_u32(target
, EM357_FLASH_CR
, FLASH_MER
| FLASH_STRT
);
857 if (retval
!= ERROR_OK
)
860 retval
= em357_wait_status_busy(bank
, 100);
861 if (retval
!= ERROR_OK
)
864 retval
= target_write_u32(target
, EM357_FLASH_CR
, FLASH_LOCK
);
865 if (retval
!= ERROR_OK
)
871 COMMAND_HANDLER(em357_handle_mass_erase_command
)
876 return ERROR_COMMAND_SYNTAX_ERROR
;
878 struct flash_bank
*bank
;
879 int retval
= CALL_COMMAND_HANDLER(flash_command_get_bank
, 0, &bank
);
880 if (ERROR_OK
!= retval
)
883 retval
= em357_mass_erase(bank
);
884 if (retval
== ERROR_OK
) {
885 /* set all sectors as erased */
886 for (i
= 0; i
< bank
->num_sectors
; i
++)
887 bank
->sectors
[i
].is_erased
= 1;
889 command_print(CMD_CTX
, "em357 mass erase complete");
891 command_print(CMD_CTX
, "em357 mass erase failed");
896 static const struct command_registration em357_exec_command_handlers
[] = {
900 .handler
= em357_handle_lock_command
,
901 .mode
= COMMAND_EXEC
,
902 .help
= "Lock entire flash device.",
907 .handler
= em357_handle_unlock_command
,
908 .mode
= COMMAND_EXEC
,
909 .help
= "Unlock entire protected flash device.",
912 .name
= "mass_erase",
914 .handler
= em357_handle_mass_erase_command
,
915 .mode
= COMMAND_EXEC
,
916 .help
= "Erase entire flash device.",
918 COMMAND_REGISTRATION_DONE
921 static const struct command_registration em357_command_handlers
[] = {
925 .help
= "em357 flash command group",
927 .chain
= em357_exec_command_handlers
,
929 COMMAND_REGISTRATION_DONE
932 struct flash_driver em357_flash
= {
934 .commands
= em357_command_handlers
,
935 .flash_bank_command
= em357_flash_bank_command
,
936 .erase
= em357_erase
,
937 .protect
= em357_protect
,
938 .write
= em357_write
,
939 .read
= default_flash_read
,
940 .probe
= em357_probe
,
941 .auto_probe
= em357_auto_probe
,
942 .erase_check
= default_flash_blank_check
,
943 .protect_check
= em357_protect_check
,
944 .free_driver_priv
= default_flash_free_driver_priv
,
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