1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
20 ***************************************************************************/
27 #include <target/arm7_9_common.h>
31 #define ISC_IDCODE 0xFE
32 #define ISC_MFG_READ 0x4C
33 #define ISC_CONFIGURATION 0x07
34 #define ISC_ENABLE 0x0C
35 #define ISC_DISABLE 0x0F
37 #define ISC_ADDRESS_SHIFT 0x11
38 #define ISC_CLR_STATUS 0x13
39 #define ISC_PROGRAM 0x20
40 #define ISC_PROGRAM_SECURITY 0x22
41 #define ISC_PROGRAM_UC 0x23
42 #define ISC_ERASE 0x30
44 #define ISC_BLANK_CHECK 0x60
46 /* ISC_DEFAULT bit definitions */
48 #define ISC_STATUS_SECURITY 0x40
49 #define ISC_STATUS_INT_ERROR 0x30
50 #define ISC_STATUS_MODE 0x08
51 #define ISC_STATUS_BUSY 0x04
52 #define ISC_STATUS_ERROR 0x03
54 /* Option bytes definitions */
56 #define STR9XPEC_OPT_CSMAPBIT 48
57 #define STR9XPEC_OPT_LVDTHRESBIT 49
58 #define STR9XPEC_OPT_LVDSELBIT 50
59 #define STR9XPEC_OPT_LVDWARNBIT 51
60 #define STR9XPEC_OPT_OTPBIT 63
62 enum str9xpec_status_codes
{
63 STR9XPEC_INVALID_COMMAND
= 1,
64 STR9XPEC_ISC_SUCCESS
= 2,
65 STR9XPEC_ISC_DISABLED
= 3,
66 STR9XPEC_ISC_INTFAIL
= 32,
69 struct str9xpec_flash_controller
{
71 uint32_t *sector_bits
;
77 static int str9xpec_erase_area(struct flash_bank
*bank
, int first
, int last
);
78 static int str9xpec_set_address(struct flash_bank
*bank
, uint8_t sector
);
79 static int str9xpec_write_options(struct flash_bank
*bank
);
81 static int str9xpec_set_instr(struct jtag_tap
*tap
, uint32_t new_instr
, tap_state_t end_state
)
84 return ERROR_TARGET_INVALID
;
86 if (buf_get_u32(tap
->cur_instr
, 0, tap
->ir_length
) != new_instr
) {
87 struct scan_field field
;
89 field
.num_bits
= tap
->ir_length
;
90 void *t
= calloc(DIV_ROUND_UP(field
.num_bits
, 8), 1);
92 buf_set_u32(t
, 0, field
.num_bits
, new_instr
);
93 field
.in_value
= NULL
;
95 jtag_add_ir_scan(tap
, &field
, end_state
);
103 static uint8_t str9xpec_isc_status(struct jtag_tap
*tap
)
105 struct scan_field field
;
108 if (str9xpec_set_instr(tap
, ISC_NOOP
, TAP_IRPAUSE
) != ERROR_OK
)
109 return ISC_STATUS_ERROR
;
112 field
.out_value
= NULL
;
113 field
.in_value
= &status
;
116 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
117 jtag_execute_queue();
119 LOG_DEBUG("status: 0x%2.2x", status
);
121 if (status
& ISC_STATUS_SECURITY
)
122 LOG_INFO("Device Security Bit Set");
127 static int str9xpec_isc_enable(struct flash_bank
*bank
)
130 struct jtag_tap
*tap
;
131 struct str9xpec_flash_controller
*str9xpec_info
= bank
->driver_priv
;
133 tap
= str9xpec_info
->tap
;
135 if (str9xpec_info
->isc_enable
)
139 if (str9xpec_set_instr(tap
, ISC_ENABLE
, TAP_IDLE
) != ERROR_OK
)
140 return ERROR_TARGET_INVALID
;
142 /* check ISC status */
143 status
= str9xpec_isc_status(tap
);
144 if (status
& ISC_STATUS_MODE
) {
145 /* we have entered isc mode */
146 str9xpec_info
->isc_enable
= 1;
147 LOG_DEBUG("ISC_MODE Enabled");
153 static int str9xpec_isc_disable(struct flash_bank
*bank
)
156 struct jtag_tap
*tap
;
157 struct str9xpec_flash_controller
*str9xpec_info
= bank
->driver_priv
;
159 tap
= str9xpec_info
->tap
;
161 if (!str9xpec_info
->isc_enable
)
164 if (str9xpec_set_instr(tap
, ISC_DISABLE
, TAP_IDLE
) != ERROR_OK
)
165 return ERROR_TARGET_INVALID
;
167 /* delay to handle aborts */
170 /* check ISC status */
171 status
= str9xpec_isc_status(tap
);
172 if (!(status
& ISC_STATUS_MODE
)) {
173 /* we have left isc mode */
174 str9xpec_info
->isc_enable
= 0;
175 LOG_DEBUG("ISC_MODE Disabled");
181 static int str9xpec_read_config(struct flash_bank
*bank
)
183 struct scan_field field
;
185 struct jtag_tap
*tap
;
187 struct str9xpec_flash_controller
*str9xpec_info
= bank
->driver_priv
;
189 tap
= str9xpec_info
->tap
;
191 LOG_DEBUG("ISC_CONFIGURATION");
193 /* execute ISC_CONFIGURATION command */
194 str9xpec_set_instr(tap
, ISC_CONFIGURATION
, TAP_IRPAUSE
);
197 field
.out_value
= NULL
;
198 field
.in_value
= str9xpec_info
->options
;
200 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
201 jtag_execute_queue();
203 status
= str9xpec_isc_status(tap
);
208 static int str9xpec_build_block_list(struct flash_bank
*bank
)
210 struct str9xpec_flash_controller
*str9xpec_info
= bank
->driver_priv
;
214 int b0_sectors
= 0, b1_sectors
= 0;
216 int b1_size
= 0x2000;
218 switch (bank
->size
) {
239 LOG_ERROR("BUG: unknown bank->size encountered");
243 num_sectors
= b0_sectors
+ b1_sectors
;
245 bank
->num_sectors
= num_sectors
;
246 bank
->sectors
= malloc(sizeof(struct flash_sector
) * num_sectors
);
247 str9xpec_info
->sector_bits
= malloc(sizeof(uint32_t) * num_sectors
);
251 for (i
= 0; i
< b0_sectors
; i
++) {
252 bank
->sectors
[num_sectors
].offset
= offset
;
253 bank
->sectors
[num_sectors
].size
= 0x10000;
254 offset
+= bank
->sectors
[i
].size
;
255 bank
->sectors
[num_sectors
].is_erased
= -1;
256 bank
->sectors
[num_sectors
].is_protected
= 1;
257 str9xpec_info
->sector_bits
[num_sectors
++] = i
;
260 for (i
= 0; i
< b1_sectors
; i
++) {
261 bank
->sectors
[num_sectors
].offset
= offset
;
262 bank
->sectors
[num_sectors
].size
= b1_size
;
263 offset
+= bank
->sectors
[i
].size
;
264 bank
->sectors
[num_sectors
].is_erased
= -1;
265 bank
->sectors
[num_sectors
].is_protected
= 1;
266 str9xpec_info
->sector_bits
[num_sectors
++] = i
+ 32;
272 /* flash bank str9x <base> <size> 0 0 <target#>
274 FLASH_BANK_COMMAND_HANDLER(str9xpec_flash_bank_command
)
276 struct str9xpec_flash_controller
*str9xpec_info
;
277 struct arm
*arm
= NULL
;
278 struct arm7_9_common
*arm7_9
= NULL
;
279 struct arm_jtag
*jtag_info
= NULL
;
282 return ERROR_COMMAND_SYNTAX_ERROR
;
284 str9xpec_info
= malloc(sizeof(struct str9xpec_flash_controller
));
285 bank
->driver_priv
= str9xpec_info
;
287 /* REVISIT verify that the jtag position of flash controller is
288 * right after *THIS* core, which must be a STR9xx core ...
290 arm
= bank
->target
->arch_info
;
291 arm7_9
= arm
->arch_info
;
292 jtag_info
= &arm7_9
->jtag_info
;
294 /* The core is the next tap after the flash controller in the chain */
295 str9xpec_info
->tap
= jtag_tap_by_position(jtag_info
->tap
->abs_chain_position
- 1);
296 str9xpec_info
->isc_enable
= 0;
298 str9xpec_build_block_list(bank
);
300 /* clear option byte register */
301 buf_set_u32(str9xpec_info
->options
, 0, 64, 0);
306 static int str9xpec_blank_check(struct flash_bank
*bank
, int first
, int last
)
308 struct scan_field field
;
310 struct jtag_tap
*tap
;
312 uint8_t *buffer
= NULL
;
314 struct str9xpec_flash_controller
*str9xpec_info
= bank
->driver_priv
;
316 tap
= str9xpec_info
->tap
;
318 if (!str9xpec_info
->isc_enable
)
319 str9xpec_isc_enable(bank
);
321 if (!str9xpec_info
->isc_enable
)
322 return ERROR_FLASH_OPERATION_FAILED
;
324 buffer
= calloc(DIV_ROUND_UP(64, 8), 1);
326 LOG_DEBUG("blank check: first_bank: %i, last_bank: %i", first
, last
);
328 for (i
= first
; i
<= last
; i
++)
329 buf_set_u32(buffer
, str9xpec_info
->sector_bits
[i
], 1, 1);
331 /* execute ISC_BLANK_CHECK command */
332 str9xpec_set_instr(tap
, ISC_BLANK_CHECK
, TAP_IRPAUSE
);
335 field
.out_value
= buffer
;
336 field
.in_value
= NULL
;
338 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
339 jtag_add_sleep(40000);
341 /* read blank check result */
343 field
.out_value
= NULL
;
344 field
.in_value
= buffer
;
346 jtag_add_dr_scan(tap
, 1, &field
, TAP_IRPAUSE
);
347 jtag_execute_queue();
349 status
= str9xpec_isc_status(tap
);
351 for (i
= first
; i
<= last
; i
++) {
352 if (buf_get_u32(buffer
, str9xpec_info
->sector_bits
[i
], 1))
353 bank
->sectors
[i
].is_erased
= 0;
355 bank
->sectors
[i
].is_erased
= 1;
360 str9xpec_isc_disable(bank
);
362 if ((status
& ISC_STATUS_ERROR
) != STR9XPEC_ISC_SUCCESS
)
363 return ERROR_FLASH_OPERATION_FAILED
;
367 static int str9xpec_protect_check(struct flash_bank
*bank
)
372 struct str9xpec_flash_controller
*str9xpec_info
= bank
->driver_priv
;
374 status
= str9xpec_read_config(bank
);
376 for (i
= 0; i
< bank
->num_sectors
; i
++) {
377 if (buf_get_u32(str9xpec_info
->options
, str9xpec_info
->sector_bits
[i
], 1))
378 bank
->sectors
[i
].is_protected
= 1;
380 bank
->sectors
[i
].is_protected
= 0;
383 if ((status
& ISC_STATUS_ERROR
) != STR9XPEC_ISC_SUCCESS
)
384 return ERROR_FLASH_OPERATION_FAILED
;
388 static int str9xpec_erase_area(struct flash_bank
*bank
, int first
, int last
)
390 struct scan_field field
;
392 struct jtag_tap
*tap
;
394 uint8_t *buffer
= NULL
;
396 struct str9xpec_flash_controller
*str9xpec_info
= bank
->driver_priv
;
398 tap
= str9xpec_info
->tap
;
400 if (!str9xpec_info
->isc_enable
)
401 str9xpec_isc_enable(bank
);
403 if (!str9xpec_info
->isc_enable
)
404 return ISC_STATUS_ERROR
;
406 buffer
= calloc(DIV_ROUND_UP(64, 8), 1);
408 LOG_DEBUG("erase: first_bank: %i, last_bank: %i", first
, last
);
410 /* last bank: 0xFF signals a full erase (unlock complete device) */
411 /* last bank: 0xFE signals a option byte erase */
413 for (i
= 0; i
< 64; i
++)
414 buf_set_u32(buffer
, i
, 1, 1);
415 } else if (last
== 0xFE)
416 buf_set_u32(buffer
, 49, 1, 1);
418 for (i
= first
; i
<= last
; i
++)
419 buf_set_u32(buffer
, str9xpec_info
->sector_bits
[i
], 1, 1);
422 LOG_DEBUG("ISC_ERASE");
424 /* execute ISC_ERASE command */
425 str9xpec_set_instr(tap
, ISC_ERASE
, TAP_IRPAUSE
);
428 field
.out_value
= buffer
;
429 field
.in_value
= NULL
;
431 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
432 jtag_execute_queue();
436 /* wait for erase completion */
437 while (!((status
= str9xpec_isc_status(tap
)) & ISC_STATUS_BUSY
))
442 str9xpec_isc_disable(bank
);
447 static int str9xpec_erase(struct flash_bank
*bank
, int first
, int last
)
451 status
= str9xpec_erase_area(bank
, first
, last
);
453 if ((status
& ISC_STATUS_ERROR
) != STR9XPEC_ISC_SUCCESS
)
454 return ERROR_FLASH_OPERATION_FAILED
;
459 static int str9xpec_lock_device(struct flash_bank
*bank
)
461 struct scan_field field
;
463 struct jtag_tap
*tap
;
464 struct str9xpec_flash_controller
*str9xpec_info
= NULL
;
466 str9xpec_info
= bank
->driver_priv
;
467 tap
= str9xpec_info
->tap
;
469 if (!str9xpec_info
->isc_enable
)
470 str9xpec_isc_enable(bank
);
472 if (!str9xpec_info
->isc_enable
)
473 return ISC_STATUS_ERROR
;
475 /* set security address */
476 str9xpec_set_address(bank
, 0x80);
478 /* execute ISC_PROGRAM command */
479 str9xpec_set_instr(tap
, ISC_PROGRAM_SECURITY
, TAP_IDLE
);
481 str9xpec_set_instr(tap
, ISC_NOOP
, TAP_IRPAUSE
);
485 field
.out_value
= NULL
;
486 field
.in_value
= &status
;
488 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
489 jtag_execute_queue();
491 } while (!(status
& ISC_STATUS_BUSY
));
493 str9xpec_isc_disable(bank
);
498 static int str9xpec_unlock_device(struct flash_bank
*bank
)
502 status
= str9xpec_erase_area(bank
, 0, 255);
507 static int str9xpec_protect(struct flash_bank
*bank
, int set
, int first
, int last
)
512 struct str9xpec_flash_controller
*str9xpec_info
= bank
->driver_priv
;
514 status
= str9xpec_read_config(bank
);
516 if ((status
& ISC_STATUS_ERROR
) != STR9XPEC_ISC_SUCCESS
)
517 return ERROR_FLASH_OPERATION_FAILED
;
519 LOG_DEBUG("protect: first_bank: %i, last_bank: %i", first
, last
);
521 /* last bank: 0xFF signals a full device protect */
524 status
= str9xpec_lock_device(bank
);
526 /* perform full erase to unlock device */
527 status
= str9xpec_unlock_device(bank
);
530 for (i
= first
; i
<= last
; i
++) {
532 buf_set_u32(str9xpec_info
->options
, str9xpec_info
->sector_bits
[i
], 1, 1);
534 buf_set_u32(str9xpec_info
->options
, str9xpec_info
->sector_bits
[i
], 1, 0);
537 status
= str9xpec_write_options(bank
);
540 if ((status
& ISC_STATUS_ERROR
) != STR9XPEC_ISC_SUCCESS
)
541 return ERROR_FLASH_OPERATION_FAILED
;
546 static int str9xpec_set_address(struct flash_bank
*bank
, uint8_t sector
)
548 struct jtag_tap
*tap
;
549 struct scan_field field
;
550 struct str9xpec_flash_controller
*str9xpec_info
= bank
->driver_priv
;
552 tap
= str9xpec_info
->tap
;
554 /* set flash controller address */
555 str9xpec_set_instr(tap
, ISC_ADDRESS_SHIFT
, TAP_IRPAUSE
);
558 field
.out_value
= §or
;
559 field
.in_value
= NULL
;
561 jtag_add_dr_scan(tap
, 1, &field
, TAP_IRPAUSE
);
566 static int str9xpec_write(struct flash_bank
*bank
, const uint8_t *buffer
,
567 uint32_t offset
, uint32_t count
)
569 struct str9xpec_flash_controller
*str9xpec_info
= bank
->driver_priv
;
570 uint32_t dwords_remaining
= (count
/ 8);
571 uint32_t bytes_remaining
= (count
& 0x00000007);
572 uint32_t bytes_written
= 0;
574 uint32_t check_address
= offset
;
575 struct jtag_tap
*tap
;
576 struct scan_field field
;
579 int first_sector
= 0;
582 tap
= str9xpec_info
->tap
;
584 if (!str9xpec_info
->isc_enable
)
585 str9xpec_isc_enable(bank
);
587 if (!str9xpec_info
->isc_enable
)
588 return ERROR_FLASH_OPERATION_FAILED
;
591 LOG_WARNING("offset 0x%" PRIx32
" breaks required 8-byte alignment", offset
);
592 return ERROR_FLASH_DST_BREAKS_ALIGNMENT
;
595 for (i
= 0; i
< bank
->num_sectors
; i
++) {
596 uint32_t sec_start
= bank
->sectors
[i
].offset
;
597 uint32_t sec_end
= sec_start
+ bank
->sectors
[i
].size
;
599 /* check if destination falls within the current sector */
600 if ((check_address
>= sec_start
) && (check_address
< sec_end
)) {
601 /* check if destination ends in the current sector */
602 if (offset
+ count
< sec_end
)
603 check_address
= offset
+ count
;
605 check_address
= sec_end
;
608 if ((offset
>= sec_start
) && (offset
< sec_end
))
611 if ((offset
+ count
>= sec_start
) && (offset
+ count
< sec_end
))
615 if (check_address
!= offset
+ count
)
616 return ERROR_FLASH_DST_OUT_OF_BANK
;
618 LOG_DEBUG("first_sector: %i, last_sector: %i", first_sector
, last_sector
);
620 scanbuf
= calloc(DIV_ROUND_UP(64, 8), 1);
622 LOG_DEBUG("ISC_PROGRAM");
624 for (i
= first_sector
; i
<= last_sector
; i
++) {
625 str9xpec_set_address(bank
, str9xpec_info
->sector_bits
[i
]);
627 dwords_remaining
= dwords_remaining
< (bank
->sectors
[i
].size
/8)
628 ? dwords_remaining
: (bank
->sectors
[i
].size
/8);
630 while (dwords_remaining
> 0) {
631 str9xpec_set_instr(tap
, ISC_PROGRAM
, TAP_IRPAUSE
);
634 field
.out_value
= (buffer
+ bytes_written
);
635 field
.in_value
= NULL
;
637 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
639 /* small delay before polling */
642 str9xpec_set_instr(tap
, ISC_NOOP
, TAP_IRPAUSE
);
646 field
.out_value
= NULL
;
647 field
.in_value
= scanbuf
;
649 jtag_add_dr_scan(tap
, 1, &field
, TAP_IRPAUSE
);
650 jtag_execute_queue();
652 status
= buf_get_u32(scanbuf
, 0, 8);
654 } while (!(status
& ISC_STATUS_BUSY
));
656 if ((status
& ISC_STATUS_ERROR
) != STR9XPEC_ISC_SUCCESS
)
657 return ERROR_FLASH_OPERATION_FAILED
;
659 /* if ((status & ISC_STATUS_INT_ERROR) != STR9XPEC_ISC_INTFAIL)
660 return ERROR_FLASH_OPERATION_FAILED; */
667 if (bytes_remaining
) {
668 uint8_t last_dword
[8] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
670 /* copy the last remaining bytes into the write buffer */
671 memcpy(last_dword
, buffer
+bytes_written
, bytes_remaining
);
673 str9xpec_set_instr(tap
, ISC_PROGRAM
, TAP_IRPAUSE
);
676 field
.out_value
= last_dword
;
677 field
.in_value
= NULL
;
679 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
681 /* small delay before polling */
684 str9xpec_set_instr(tap
, ISC_NOOP
, TAP_IRPAUSE
);
688 field
.out_value
= NULL
;
689 field
.in_value
= scanbuf
;
691 jtag_add_dr_scan(tap
, 1, &field
, TAP_IRPAUSE
);
692 jtag_execute_queue();
694 status
= buf_get_u32(scanbuf
, 0, 8);
696 } while (!(status
& ISC_STATUS_BUSY
));
698 if ((status
& ISC_STATUS_ERROR
) != STR9XPEC_ISC_SUCCESS
)
699 return ERROR_FLASH_OPERATION_FAILED
;
701 /* if ((status & ISC_STATUS_INT_ERROR) != STR9XPEC_ISC_INTFAIL)
702 return ERROR_FLASH_OPERATION_FAILED; */
707 str9xpec_isc_disable(bank
);
712 static int str9xpec_probe(struct flash_bank
*bank
)
717 COMMAND_HANDLER(str9xpec_handle_part_id_command
)
719 struct scan_field field
;
720 uint8_t *buffer
= NULL
;
721 struct jtag_tap
*tap
;
723 struct str9xpec_flash_controller
*str9xpec_info
= NULL
;
726 return ERROR_COMMAND_SYNTAX_ERROR
;
728 struct flash_bank
*bank
;
729 int retval
= CALL_COMMAND_HANDLER(flash_command_get_bank
, 0, &bank
);
730 if (ERROR_OK
!= retval
)
733 str9xpec_info
= bank
->driver_priv
;
734 tap
= str9xpec_info
->tap
;
736 buffer
= calloc(DIV_ROUND_UP(32, 8), 1);
738 str9xpec_set_instr(tap
, ISC_IDCODE
, TAP_IRPAUSE
);
741 field
.out_value
= NULL
;
742 field
.in_value
= buffer
;
744 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
745 jtag_execute_queue();
747 idcode
= buf_get_u32(buffer
, 0, 32);
749 command_print(CMD_CTX
, "str9xpec part id: 0x%8.8" PRIx32
"", idcode
);
756 static int str9xpec_erase_check(struct flash_bank
*bank
)
758 return str9xpec_blank_check(bank
, 0, bank
->num_sectors
- 1);
761 COMMAND_HANDLER(str9xpec_handle_flash_options_read_command
)
764 struct str9xpec_flash_controller
*str9xpec_info
= NULL
;
767 return ERROR_COMMAND_SYNTAX_ERROR
;
769 struct flash_bank
*bank
;
770 int retval
= CALL_COMMAND_HANDLER(flash_command_get_bank
, 0, &bank
);
771 if (ERROR_OK
!= retval
)
774 str9xpec_info
= bank
->driver_priv
;
776 status
= str9xpec_read_config(bank
);
778 if ((status
& ISC_STATUS_ERROR
) != STR9XPEC_ISC_SUCCESS
)
779 return ERROR_FLASH_OPERATION_FAILED
;
782 if (buf_get_u32(str9xpec_info
->options
, STR9XPEC_OPT_CSMAPBIT
, 1))
783 command_print(CMD_CTX
, "CS Map: bank1");
785 command_print(CMD_CTX
, "CS Map: bank0");
788 if (buf_get_u32(str9xpec_info
->options
, STR9XPEC_OPT_OTPBIT
, 1))
789 command_print(CMD_CTX
, "OTP Lock: OTP Locked");
791 command_print(CMD_CTX
, "OTP Lock: OTP Unlocked");
794 if (buf_get_u32(str9xpec_info
->options
, STR9XPEC_OPT_LVDTHRESBIT
, 1))
795 command_print(CMD_CTX
, "LVD Threshold: 2.7v");
797 command_print(CMD_CTX
, "LVD Threshold: 2.4v");
799 /* LVD reset warning */
800 if (buf_get_u32(str9xpec_info
->options
, STR9XPEC_OPT_LVDWARNBIT
, 1))
801 command_print(CMD_CTX
, "LVD Reset Warning: VDD or VDDQ Inputs");
803 command_print(CMD_CTX
, "LVD Reset Warning: VDD Input Only");
805 /* LVD reset select */
806 if (buf_get_u32(str9xpec_info
->options
, STR9XPEC_OPT_LVDSELBIT
, 1))
807 command_print(CMD_CTX
, "LVD Reset Selection: VDD or VDDQ Inputs");
809 command_print(CMD_CTX
, "LVD Reset Selection: VDD Input Only");
814 static int str9xpec_write_options(struct flash_bank
*bank
)
816 struct scan_field field
;
818 struct jtag_tap
*tap
;
819 struct str9xpec_flash_controller
*str9xpec_info
= NULL
;
821 str9xpec_info
= bank
->driver_priv
;
822 tap
= str9xpec_info
->tap
;
824 /* erase config options first */
825 status
= str9xpec_erase_area(bank
, 0xFE, 0xFE);
827 if ((status
& ISC_STATUS_ERROR
) != STR9XPEC_ISC_SUCCESS
)
830 if (!str9xpec_info
->isc_enable
)
831 str9xpec_isc_enable(bank
);
833 if (!str9xpec_info
->isc_enable
)
834 return ISC_STATUS_ERROR
;
836 /* according to data 64th bit has to be set */
837 buf_set_u32(str9xpec_info
->options
, 63, 1, 1);
839 /* set option byte address */
840 str9xpec_set_address(bank
, 0x50);
842 /* execute ISC_PROGRAM command */
843 str9xpec_set_instr(tap
, ISC_PROGRAM
, TAP_IRPAUSE
);
846 field
.out_value
= str9xpec_info
->options
;
847 field
.in_value
= NULL
;
849 jtag_add_dr_scan(tap
, 1, &field
, TAP_IDLE
);
851 /* small delay before polling */
854 str9xpec_set_instr(tap
, ISC_NOOP
, TAP_IRPAUSE
);
858 field
.out_value
= NULL
;
859 field
.in_value
= &status
;
861 jtag_add_dr_scan(tap
, 1, &field
, TAP_IRPAUSE
);
862 jtag_execute_queue();
864 } while (!(status
& ISC_STATUS_BUSY
));
866 str9xpec_isc_disable(bank
);
871 COMMAND_HANDLER(str9xpec_handle_flash_options_write_command
)
876 return ERROR_COMMAND_SYNTAX_ERROR
;
878 struct flash_bank
*bank
;
879 int retval
= CALL_COMMAND_HANDLER(flash_command_get_bank
, 0, &bank
);
880 if (ERROR_OK
!= retval
)
883 status
= str9xpec_write_options(bank
);
885 if ((status
& ISC_STATUS_ERROR
) != STR9XPEC_ISC_SUCCESS
)
886 return ERROR_FLASH_OPERATION_FAILED
;
888 command_print(CMD_CTX
, "str9xpec write options complete.\n"
889 "INFO: a reset or power cycle is required "
890 "for the new settings to take effect.");
895 COMMAND_HANDLER(str9xpec_handle_flash_options_cmap_command
)
897 struct str9xpec_flash_controller
*str9xpec_info
= NULL
;
900 return ERROR_COMMAND_SYNTAX_ERROR
;
902 struct flash_bank
*bank
;
903 int retval
= CALL_COMMAND_HANDLER(flash_command_get_bank
, 0, &bank
);
904 if (ERROR_OK
!= retval
)
907 str9xpec_info
= bank
->driver_priv
;
909 if (strcmp(CMD_ARGV
[1], "bank1") == 0)
910 buf_set_u32(str9xpec_info
->options
, STR9XPEC_OPT_CSMAPBIT
, 1, 1);
912 buf_set_u32(str9xpec_info
->options
, STR9XPEC_OPT_CSMAPBIT
, 1, 0);
917 COMMAND_HANDLER(str9xpec_handle_flash_options_lvdthd_command
)
919 struct str9xpec_flash_controller
*str9xpec_info
= NULL
;
922 return ERROR_COMMAND_SYNTAX_ERROR
;
924 struct flash_bank
*bank
;
925 int retval
= CALL_COMMAND_HANDLER(flash_command_get_bank
, 0, &bank
);
926 if (ERROR_OK
!= retval
)
929 str9xpec_info
= bank
->driver_priv
;
931 if (strcmp(CMD_ARGV
[1], "2.7v") == 0)
932 buf_set_u32(str9xpec_info
->options
, STR9XPEC_OPT_LVDTHRESBIT
, 1, 1);
934 buf_set_u32(str9xpec_info
->options
, STR9XPEC_OPT_LVDTHRESBIT
, 1, 0);
939 COMMAND_HANDLER(str9xpec_handle_flash_options_lvdsel_command
)
941 struct str9xpec_flash_controller
*str9xpec_info
= NULL
;
944 return ERROR_COMMAND_SYNTAX_ERROR
;
946 struct flash_bank
*bank
;
947 int retval
= CALL_COMMAND_HANDLER(flash_command_get_bank
, 0, &bank
);
948 if (ERROR_OK
!= retval
)
951 str9xpec_info
= bank
->driver_priv
;
953 if (strcmp(CMD_ARGV
[1], "vdd_vddq") == 0)
954 buf_set_u32(str9xpec_info
->options
, STR9XPEC_OPT_LVDSELBIT
, 1, 1);
956 buf_set_u32(str9xpec_info
->options
, STR9XPEC_OPT_LVDSELBIT
, 1, 0);
961 COMMAND_HANDLER(str9xpec_handle_flash_options_lvdwarn_command
)
963 struct str9xpec_flash_controller
*str9xpec_info
= NULL
;
966 return ERROR_COMMAND_SYNTAX_ERROR
;
968 struct flash_bank
*bank
;
969 int retval
= CALL_COMMAND_HANDLER(flash_command_get_bank
, 0, &bank
);
970 if (ERROR_OK
!= retval
)
973 str9xpec_info
= bank
->driver_priv
;
975 if (strcmp(CMD_ARGV
[1], "vdd_vddq") == 0)
976 buf_set_u32(str9xpec_info
->options
, STR9XPEC_OPT_LVDWARNBIT
, 1, 1);
978 buf_set_u32(str9xpec_info
->options
, STR9XPEC_OPT_LVDWARNBIT
, 1, 0);
983 COMMAND_HANDLER(str9xpec_handle_flash_lock_command
)
988 return ERROR_COMMAND_SYNTAX_ERROR
;
990 struct flash_bank
*bank
;
991 int retval
= CALL_COMMAND_HANDLER(flash_command_get_bank
, 0, &bank
);
992 if (ERROR_OK
!= retval
)
995 status
= str9xpec_lock_device(bank
);
997 if ((status
& ISC_STATUS_ERROR
) != STR9XPEC_ISC_SUCCESS
)
998 return ERROR_FLASH_OPERATION_FAILED
;
1003 COMMAND_HANDLER(str9xpec_handle_flash_unlock_command
)
1008 return ERROR_COMMAND_SYNTAX_ERROR
;
1010 struct flash_bank
*bank
;
1011 int retval
= CALL_COMMAND_HANDLER(flash_command_get_bank
, 0, &bank
);
1012 if (ERROR_OK
!= retval
)
1015 status
= str9xpec_unlock_device(bank
);
1017 if ((status
& ISC_STATUS_ERROR
) != STR9XPEC_ISC_SUCCESS
)
1018 return ERROR_FLASH_OPERATION_FAILED
;
1020 command_print(CMD_CTX
, "str9xpec unlocked.\n"
1021 "INFO: a reset or power cycle is required "
1022 "for the new settings to take effect.");
1027 COMMAND_HANDLER(str9xpec_handle_flash_enable_turbo_command
)
1029 struct jtag_tap
*tap0
;
1030 struct jtag_tap
*tap1
;
1031 struct jtag_tap
*tap2
;
1032 struct str9xpec_flash_controller
*str9xpec_info
= NULL
;
1035 return ERROR_COMMAND_SYNTAX_ERROR
;
1037 struct flash_bank
*bank
;
1038 int retval
= CALL_COMMAND_HANDLER(flash_command_get_bank
, 0, &bank
);
1039 if (ERROR_OK
!= retval
)
1042 str9xpec_info
= bank
->driver_priv
;
1044 /* remove arm core from chain - enter turbo mode */
1045 tap0
= str9xpec_info
->tap
;
1047 /* things are *WRONG* */
1048 command_print(CMD_CTX
, "**STR9FLASH** (tap0) invalid chain?");
1051 tap1
= tap0
->next_tap
;
1053 /* things are *WRONG* */
1054 command_print(CMD_CTX
, "**STR9FLASH** (tap1) invalid chain?");
1057 tap2
= tap1
->next_tap
;
1059 /* things are *WRONG* */
1060 command_print(CMD_CTX
, "**STR9FLASH** (tap2) invalid chain?");
1064 /* enable turbo mode - TURBO-PROG-ENABLE */
1065 str9xpec_set_instr(tap2
, 0xD, TAP_IDLE
);
1066 retval
= jtag_execute_queue();
1067 if (retval
!= ERROR_OK
)
1070 /* modify scan chain - str9 core has been removed */
1076 COMMAND_HANDLER(str9xpec_handle_flash_disable_turbo_command
)
1078 struct jtag_tap
*tap
;
1079 struct str9xpec_flash_controller
*str9xpec_info
= NULL
;
1082 return ERROR_COMMAND_SYNTAX_ERROR
;
1084 struct flash_bank
*bank
;
1085 int retval
= CALL_COMMAND_HANDLER(flash_command_get_bank
, 0, &bank
);
1086 if (ERROR_OK
!= retval
)
1089 str9xpec_info
= bank
->driver_priv
;
1090 tap
= str9xpec_info
->tap
;
1095 /* exit turbo mode via RESET */
1096 str9xpec_set_instr(tap
, ISC_NOOP
, TAP_IDLE
);
1098 jtag_execute_queue();
1100 /* restore previous scan chain */
1102 tap
->next_tap
->enabled
= 1;
1107 static const struct command_registration str9xpec_config_command_handlers
[] = {
1109 .name
= "enable_turbo",
1111 .handler
= str9xpec_handle_flash_enable_turbo_command
,
1112 .mode
= COMMAND_EXEC
,
1113 .help
= "enable str9xpec turbo mode",
1116 .name
= "disable_turbo",
1118 .handler
= str9xpec_handle_flash_disable_turbo_command
,
1119 .mode
= COMMAND_EXEC
,
1120 .help
= "disable str9xpec turbo mode",
1123 .name
= "options_cmap",
1124 .usage
= "<bank> <bank0 | bank1>",
1125 .handler
= str9xpec_handle_flash_options_cmap_command
,
1126 .mode
= COMMAND_EXEC
,
1127 .help
= "configure str9xpec boot sector",
1130 .name
= "options_lvdthd",
1131 .usage
= "<bank> <2.4v | 2.7v>",
1132 .handler
= str9xpec_handle_flash_options_lvdthd_command
,
1133 .mode
= COMMAND_EXEC
,
1134 .help
= "configure str9xpec lvd threshold",
1137 .name
= "options_lvdsel",
1138 .usage
= "<bank> <vdd | vdd_vddq>",
1139 .handler
= str9xpec_handle_flash_options_lvdsel_command
,
1140 .mode
= COMMAND_EXEC
,
1141 .help
= "configure str9xpec lvd selection",
1144 .name
= "options_lvdwarn",
1145 .usage
= "<bank> <vdd | vdd_vddq>",
1146 .handler
= str9xpec_handle_flash_options_lvdwarn_command
,
1147 .mode
= COMMAND_EXEC
,
1148 .help
= "configure str9xpec lvd warning",
1151 .name
= "options_read",
1153 .handler
= str9xpec_handle_flash_options_read_command
,
1154 .mode
= COMMAND_EXEC
,
1155 .help
= "read str9xpec options",
1158 .name
= "options_write",
1160 .handler
= str9xpec_handle_flash_options_write_command
,
1161 .mode
= COMMAND_EXEC
,
1162 .help
= "write str9xpec options",
1167 .handler
= str9xpec_handle_flash_lock_command
,
1168 .mode
= COMMAND_EXEC
,
1169 .help
= "lock str9xpec device",
1174 .handler
= str9xpec_handle_flash_unlock_command
,
1175 .mode
= COMMAND_EXEC
,
1176 .help
= "unlock str9xpec device",
1180 .handler
= str9xpec_handle_part_id_command
,
1181 .mode
= COMMAND_EXEC
,
1182 .help
= "print part id of str9xpec flash bank <num>",
1184 COMMAND_REGISTRATION_DONE
1187 static const struct command_registration str9xpec_command_handlers
[] = {
1190 .mode
= COMMAND_ANY
,
1191 .help
= "str9xpec flash command group",
1193 .chain
= str9xpec_config_command_handlers
,
1195 COMMAND_REGISTRATION_DONE
1198 struct flash_driver str9xpec_flash
= {
1200 .commands
= str9xpec_command_handlers
,
1201 .flash_bank_command
= str9xpec_flash_bank_command
,
1202 .erase
= str9xpec_erase
,
1203 .protect
= str9xpec_protect
,
1204 .write
= str9xpec_write
,
1205 .read
= default_flash_read
,
1206 .probe
= str9xpec_probe
,
1207 .auto_probe
= str9xpec_probe
,
1208 .erase_check
= str9xpec_erase_check
,
1209 .protect_check
= str9xpec_protect_check
,
1210 .free_driver_priv
= default_flash_free_driver_priv
,