1 /***************************************************************************
2 * Copyright (C) 2006 by Magnus Lundin *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
21 /***************************************************************************
22 * STELLARIS is tested on LM3S811
26 ***************************************************************************/
31 #include "replacements.h"
33 #include "stellaris.h"
34 #include "cortex_m3.h"
39 #include "binarybuffer.h"
46 int stellaris_register_commands(struct command_context_s
*cmd_ctx
);
47 int stellaris_flash_bank_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
, struct flash_bank_s
*bank
);
48 int stellaris_erase(struct flash_bank_s
*bank
, int first
, int last
);
49 int stellaris_protect(struct flash_bank_s
*bank
, int set
, int first
, int last
);
50 int stellaris_write(struct flash_bank_s
*bank
, u8
*buffer
, u32 offset
, u32 count
);
51 int stellaris_probe(struct flash_bank_s
*bank
);
52 int stellaris_erase_check(struct flash_bank_s
*bank
);
53 int stellaris_protect_check(struct flash_bank_s
*bank
);
54 int stellaris_info(struct flash_bank_s
*bank
, char *buf
, int buf_size
);
56 u32
stellaris_get_flash_status(flash_bank_t
*bank
);
57 void stellaris_set_flash_mode(flash_bank_t
*bank
,int mode
);
58 u32
stellaris_wait_status_busy(flash_bank_t
*bank
, u32 waitbits
, int timeout
);
60 flash_driver_t stellaris_flash
=
63 .register_commands
= stellaris_register_commands
,
64 .flash_bank_command
= stellaris_flash_bank_command
,
65 .erase
= stellaris_erase
,
66 .protect
= stellaris_protect
,
67 .write
= stellaris_write
,
68 .probe
= stellaris_probe
,
69 .erase_check
= stellaris_erase_check
,
70 .protect_check
= stellaris_protect_check
,
71 .info
= stellaris_info
129 /***************************************************************************
130 * openocd command interface *
131 ***************************************************************************/
133 int stellaris_flash_bank_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
, struct flash_bank_s
*bank
)
135 stellaris_flash_bank_t
*stellaris_info
;
139 WARNING("incomplete flash_bank stellaris configuration");
140 return ERROR_FLASH_BANK_INVALID
;
143 stellaris_info
= calloc(sizeof(stellaris_flash_bank_t
),1);
145 bank
->driver_priv
= stellaris_info
;
147 stellaris_info
->target_name
="Unknown target";
148 stellaris_info
->target
= get_target_by_num(strtoul(args
[5], NULL
, 0));
149 if (!stellaris_info
->target
)
151 ERROR("no target '%i' configured", args
[5]);
155 /* part wasn't probed for info yet */
156 stellaris_info
->did1
= 0;
158 /* TODO Use an optional main oscillator clock rate in kHz from arg[6] */
162 int stellaris_register_commands(struct command_context_s
*cmd_ctx
)
165 command_t *stellaris_cmd = register_command(cmd_ctx, NULL, "stellaris", NULL, COMMAND_ANY, NULL);
166 register_command(cmd_ctx, stellaris_cmd, "gpnvm", stellaris_handle_gpnvm_command, COMMAND_EXEC,
167 "stellaris gpnvm <num> <bit> set|clear, set or clear stellaris gpnvm bit");
172 int stellaris_info(struct flash_bank_s
*bank
, char *buf
, int buf_size
)
175 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
177 stellaris_read_part_info(bank
);
179 if (stellaris_info
->did1
== 0)
181 printed
= snprintf(buf
, buf_size
, "Cannot identify target as a Stellaris\n");
184 return ERROR_FLASH_OPERATION_FAILED
;
187 printed
= snprintf(buf
, buf_size
, "\nLMI Stellaris information: Chip is class %i %s v%c.%i\n",
188 (stellaris_info
->did0
>>16)&0xff, stellaris_info
->target_name
,
189 'A' + (stellaris_info
->did0
>>8)&0xFF, (stellaris_info
->did0
)&0xFF);
193 printed
= snprintf(buf
, buf_size
, "did1: 0x%8.8x, arch: 0x%4.4x, eproc: %s, ramsize:%ik, flashsize: %ik\n",
194 stellaris_info
->did1
, stellaris_info
->did1
, "ARMV7M", (1+(stellaris_info
->dc0
>>16)&0xFFFF)/4, (1+stellaris_info
->dc0
&0xFFFF)*2);
198 printed
= snprintf(buf
, buf_size
, "master clock(estimated): %ikHz, rcc is 0x%x \n", stellaris_info
->mck_freq
/ 1000, stellaris_info
->rcc
);
202 if (stellaris_info
->num_lockbits
>0) {
203 printed
= snprintf(buf
, buf_size
, "pagesize: %i, lockbits: %i 0x%4.4x, pages in lock region: %i \n", stellaris_info
->pagesize
, stellaris_info
->num_lockbits
, stellaris_info
->lockbits
,stellaris_info
->num_pages
/stellaris_info
->num_lockbits
);
210 /***************************************************************************
211 * chip identification and status *
212 ***************************************************************************/
214 u32
stellaris_get_flash_status(flash_bank_t
*bank
)
216 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
217 target_t
*target
= stellaris_info
->target
;
220 target_read_u32(target
, FLASH_CONTROL_BASE
|FLASH_FMC
, &fmc
);
225 /** Read clock configuration and set stellaris_info->usec_clocks*/
227 void stellaris_read_clock_info(flash_bank_t
*bank
)
229 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
230 target_t
*target
= stellaris_info
->target
;
231 u32 rcc
, pllcfg
, sysdiv
, usesysdiv
, bypass
, oscsrc
;
232 unsigned long tmp
, mainfreq
;
234 target_read_u32(target
, SCB_BASE
|RCC
, &rcc
);
235 DEBUG("Stellaris RCC %x",rcc
);
236 target_read_u32(target
, SCB_BASE
|PLLCFG
, &pllcfg
);
237 DEBUG("Stellaris PLLCFG %x",pllcfg
);
238 stellaris_info
->rcc
= rcc
;
240 sysdiv
= (rcc
>>23)&0xF;
241 usesysdiv
= (rcc
>>22)&0x1;
242 bypass
= (rcc
>>11)&0x1;
243 oscsrc
= (rcc
>>4)&0x3;
244 /* xtal = (rcc>>6)&0xF; */
248 mainfreq
= 6000000; /* Default xtal */
251 mainfreq
= 22500000; /* Internal osc. 15 MHz +- 50% */
254 mainfreq
= 5625000; /* Internal osc. / 4 */
257 WARNING("Invalid oscsrc (3) in rcc register");
263 mainfreq
= 200000000; /* PLL out frec */
266 stellaris_info
->mck_freq
= mainfreq
/(1+sysdiv
);
268 stellaris_info
->mck_freq
= mainfreq
;
270 /* Forget old flash timing */
271 stellaris_set_flash_mode(bank
,0);
274 /* Setup the timimg registers */
275 void stellaris_set_flash_mode(flash_bank_t
*bank
,int mode
)
277 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
278 target_t
*target
= stellaris_info
->target
;
280 u32 usecrl
= (stellaris_info
->mck_freq
/1000000ul-1);
281 DEBUG("usecrl = %i",usecrl
);
282 target_write_u32(target
, SCB_BASE
|USECRL
, usecrl
);
286 u32
stellaris_wait_status_busy(flash_bank_t
*bank
, u32 waitbits
, int timeout
)
290 /* Stellaris waits for cmdbit to clear */
291 while (((status
= stellaris_get_flash_status(bank
)) & waitbits
) && (timeout
-- > 0))
293 DEBUG("status: 0x%x", status
);
297 /* Flash errors are reflected in the FLASH_CRIS register */
303 /* Send one command to the flash controller */
304 int stellaris_flash_command(struct flash_bank_s
*bank
,u8 cmd
,u16 pagen
)
307 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
308 target_t
*target
= stellaris_info
->target
;
310 fmc
= FMC_WRKEY
| cmd
;
311 target_write_u32(target
, FLASH_CONTROL_BASE
|FLASH_FMC
, fmc
);
312 DEBUG("Flash command: 0x%x", fmc
);
314 if (stellaris_wait_status_busy(bank
, cmd
, 100))
316 return ERROR_FLASH_OPERATION_FAILED
;
322 /* Read device id register, main clock frequency register and fill in driver info structure */
323 int stellaris_read_part_info(struct flash_bank_s
*bank
)
325 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
326 target_t
*target
= stellaris_info
->target
;
327 u32 did0
,did1
, ver
, fam
, status
;
330 /* Read and parse chip identification register */
331 target_read_u32(target
, SCB_BASE
|DID0
, &did0
);
332 target_read_u32(target
, SCB_BASE
|DID1
, &did1
);
333 target_read_u32(target
, SCB_BASE
|DC0
, &stellaris_info
->dc0
);
334 target_read_u32(target
, SCB_BASE
|DC1
, &stellaris_info
->dc1
);
335 DEBUG("did0 0x%x, did1 0x%x, dc0 0x%x, dc1 0x%x",did0
, did1
, stellaris_info
->dc0
,stellaris_info
->dc1
);
338 if((ver
!= 0) && (ver
!= 1))
340 WARNING("Unknown did0 version, cannot identify target");
341 return ERROR_FLASH_OPERATION_FAILED
;
346 fam
= (did1
>> 24) & 0xF;
347 if(((ver
!= 0) && (ver
!= 1)) || (fam
!= 0))
349 WARNING("Unknown did1 version/family, cannot positively identify target as a Stellaris");
354 WARNING("Cannot identify target as a Stellaris");
355 return ERROR_FLASH_OPERATION_FAILED
;
358 for (i
=0;StellarisParts
[i
].partno
;i
++)
360 if (StellarisParts
[i
].partno
==((did1
>>16)&0xFF))
364 stellaris_info
->target_name
= StellarisParts
[i
].partname
;
366 stellaris_info
->did0
= did0
;
367 stellaris_info
->did1
= did1
;
369 stellaris_info
->num_lockbits
= 1+stellaris_info
->dc0
&0xFFFF;
370 stellaris_info
->num_pages
= 2*(1+stellaris_info
->dc0
&0xFFFF);
371 stellaris_info
->pagesize
= 1024;
372 bank
->size
= 1024*stellaris_info
->num_pages
;
373 stellaris_info
->pages_in_lockregion
= 2;
374 target_read_u32(target
, SCB_BASE
|FMPPE
, &stellaris_info
->lockbits
);
376 // Read main and master clock freqency register
377 stellaris_read_clock_info(bank
);
379 status
= stellaris_get_flash_status(bank
);
381 WARNING("stellaris flash only tested for LM3S811 series");
386 /***************************************************************************
388 ***************************************************************************/
390 int stellaris_erase_check(struct flash_bank_s
*bank
)
392 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
393 target_t
*target
= stellaris_info
->target
;
401 int stellaris_protect_check(struct flash_bank_s
*bank
)
405 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
406 target_t
*target
= stellaris_info
->target
;
408 if (stellaris_info
->did1
== 0)
410 stellaris_read_part_info(bank
);
413 if (stellaris_info
->did1
== 0)
415 WARNING("Cannot identify target as an AT91SAM");
416 return ERROR_FLASH_OPERATION_FAILED
;
419 status
= stellaris_get_flash_status(bank
);
420 stellaris_info
->lockbits
= status
>> 16;
425 int stellaris_erase(struct flash_bank_s
*bank
, int first
, int last
)
428 u32 flash_fmc
, flash_cris
;
429 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
430 target_t
*target
= stellaris_info
->target
;
432 if (stellaris_info
->target
->state
!= TARGET_HALTED
)
434 return ERROR_TARGET_NOT_HALTED
;
437 if (stellaris_info
->did1
== 0)
439 stellaris_read_part_info(bank
);
442 if (stellaris_info
->did1
== 0)
444 WARNING("Cannot identify target as Stellaris");
445 return ERROR_FLASH_OPERATION_FAILED
;
448 if ((first
< 0) || (last
< first
) || (last
>= stellaris_info
->num_pages
))
450 return ERROR_FLASH_SECTOR_INVALID
;
453 /* Configure the flash controller timing */
454 stellaris_read_clock_info(bank
);
455 stellaris_set_flash_mode(bank
,0);
457 /* Clear and disable flash programming interrupts */
458 target_write_u32(target
, FLASH_CIM
, 0);
459 target_write_u32(target
, FLASH_MISC
, PMISC
|AMISC
);
461 if ((first
== 0) && (last
== (stellaris_info
->num_pages
-1)))
463 target_write_u32(target
, FLASH_FMA
, 0);
464 target_write_u32(target
, FLASH_FMC
, FMC_WRKEY
| FMC_MERASE
);
465 /* Wait until erase complete */
468 target_read_u32(target
, FLASH_FMC
, &flash_fmc
);
470 while(flash_fmc
& FMC_MERASE
);
472 /* if device has > 128k, then second erase cycle is needed */
473 if(stellaris_info
->num_pages
* stellaris_info
->pagesize
> 0x20000)
475 target_write_u32(target
, FLASH_FMA
, 0x20000);
476 target_write_u32(target
, FLASH_FMC
, FMC_WRKEY
| FMC_MERASE
);
477 /* Wait until erase complete */
480 target_read_u32(target
, FLASH_FMC
, &flash_fmc
);
482 while(flash_fmc
& FMC_MERASE
);
488 for (banknr
=first
;banknr
<=last
;banknr
++)
490 /* Address is first word in page */
491 target_write_u32(target
, FLASH_FMA
, banknr
*stellaris_info
->pagesize
);
492 /* Write erase command */
493 target_write_u32(target
, FLASH_FMC
, FMC_WRKEY
| FMC_ERASE
);
494 /* Wait until erase complete */
497 target_read_u32(target
, FLASH_FMC
, &flash_fmc
);
499 while(flash_fmc
& FMC_ERASE
);
501 /* Check acess violations */
502 target_read_u32(target
, FLASH_CRIS
, &flash_cris
);
503 if(flash_cris
& (AMASK
))
505 WARNING("Error erasing flash page %i, flash_cris 0x%x", banknr
, flash_cris
);
506 target_write_u32(target
, FLASH_CRIS
, 0);
507 return ERROR_FLASH_OPERATION_FAILED
;
514 int stellaris_protect(struct flash_bank_s
*bank
, int set
, int first
, int last
)
516 u32 cmd
, fmppe
, flash_fmc
, flash_cris
;
519 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
520 target_t
*target
= stellaris_info
->target
;
522 if (stellaris_info
->target
->state
!= TARGET_HALTED
)
524 return ERROR_TARGET_NOT_HALTED
;
527 if ((first
< 0) || (last
< first
) || (last
>= stellaris_info
->num_lockbits
))
529 return ERROR_FLASH_SECTOR_INVALID
;
532 if (stellaris_info
->did1
== 0)
534 stellaris_read_part_info(bank
);
537 if (stellaris_info
->did1
== 0)
539 WARNING("Cannot identify target as an Stellaris MCU");
540 return ERROR_FLASH_OPERATION_FAILED
;
543 /* Configure the flash controller timing */
544 stellaris_read_clock_info(bank
);
545 stellaris_set_flash_mode(bank
,0);
547 fmppe
= stellaris_info
->lockbits
;
548 for (lockregion
=first
;lockregion
<=last
;lockregion
++)
551 fmppe
&= ~(1<<lockregion
);
553 fmppe
|= (1<<lockregion
);
556 /* Clear and disable flash programming interrupts */
557 target_write_u32(target
, FLASH_CIM
, 0);
558 target_write_u32(target
, FLASH_MISC
, PMISC
|AMISC
);
560 DEBUG("fmppe 0x%x",fmppe
);
561 target_write_u32(target
, SCB_BASE
|FMPPE
, fmppe
);
563 target_write_u32(target
, FLASH_FMA
, 1);
564 /* Write commit command */
565 /* TODO safety check, sice this cannot be undone */
566 WARNING("Flash protection cannot be removed once commited, commit is NOT executed !");
567 /* target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_COMT); */
568 /* Wait until erase complete */
571 target_read_u32(target
, FLASH_FMC
, &flash_fmc
);
573 while(flash_fmc
& FMC_COMT
);
575 /* Check acess violations */
576 target_read_u32(target
, FLASH_CRIS
, &flash_cris
);
577 if(flash_cris
& (AMASK
))
579 WARNING("Error setting flash page protection, flash_cris 0x%x", flash_cris
);
580 target_write_u32(target
, FLASH_CRIS
, 0);
581 return ERROR_FLASH_OPERATION_FAILED
;
584 target_read_u32(target
, SCB_BASE
|FMPPE
, &stellaris_info
->lockbits
);
589 u8 stellaris_write_code
[] =
593 r1 = destination address
594 r2 = bytecount (in) - endaddr (work)
595 r3 = pFLASH_CTRL_BASE
601 0x07,0x4B, /* ldr r3,pFLASH_CTRL_BASE */
602 0x08,0x4C, /* ldr r4,FLASHWRITECMD */
603 0x01,0x25, /* movs r5, 1 */
604 0x00,0x26, /* movs r6, #0 */
606 0x19,0x60, /* str r1, [r3, #0] */
607 0x87,0x59, /* ldr r7, [r0, r6] */
608 0x5F,0x60, /* str r7, [r3, #4] */
609 0x9C,0x60, /* str r4, [r3, #8] */
611 0x9F,0x68, /* ldr r7, [r3, #8] */
612 0x2F,0x42, /* tst r7, r5 */
613 0xFC,0xD1, /* bne waitloop */
614 0x04,0x31, /* adds r1, r1, #4 */
615 0x04,0x36, /* adds r6, r6, #4 */
616 0x96,0x42, /* cmp r6, r2 */
617 0xF4,0xD1, /* bne mainloop */
618 0x00,0xBE, /* bkpt #0 */
619 /* pFLASH_CTRL_BASE: */
620 0x00,0xD0,0x0F,0x40, /* .word 0x400FD000 */
622 0x01,0x00,0x42,0xA4 /* .word 0xA4420001 */
625 int stellaris_write_block(struct flash_bank_s
*bank
, u8
*buffer
, u32 offset
, u32 wcount
)
627 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
628 target_t
*target
= stellaris_info
->target
;
629 u32 buffer_size
= 8192;
630 working_area_t
*source
;
631 working_area_t
*write_algorithm
;
632 u32 address
= bank
->base
+ offset
;
633 reg_param_t reg_params
[8];
634 armv7m_algorithm_t armv7m_info
;
637 DEBUG("(bank=%08X buffer=%08X offset=%08X wcount=%08X)",
638 bank
, buffer
, offset
, wcount
);
640 /* flash write code */
641 if (target_alloc_working_area(target
, sizeof(stellaris_write_code
), &write_algorithm
) != ERROR_OK
)
643 WARNING("no working area available, can't do block memory writes");
644 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
647 target_write_buffer(target
, write_algorithm
->address
, sizeof(stellaris_write_code
), stellaris_write_code
);
650 while (target_alloc_working_area(target
, buffer_size
, &source
) != ERROR_OK
)
652 DEBUG("called target_alloc_working_area(target=%08X buffer_size=%08X source=%08X)",
653 target
, buffer_size
, source
);
655 if (buffer_size
<= 256)
657 /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
659 target_free_working_area(target
, write_algorithm
);
661 WARNING("no large enough working area available, can't do block memory writes");
662 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
666 armv7m_info
.common_magic
= ARMV7M_COMMON_MAGIC
;
667 armv7m_info
.core_mode
= ARMV7M_MODE_ANY
;
668 armv7m_info
.core_state
= ARMV7M_STATE_THUMB
;
670 init_reg_param(®_params
[0], "r0", 32, PARAM_OUT
);
671 init_reg_param(®_params
[1], "r1", 32, PARAM_OUT
);
672 init_reg_param(®_params
[2], "r2", 32, PARAM_OUT
);
673 init_reg_param(®_params
[3], "r3", 32, PARAM_OUT
);
674 init_reg_param(®_params
[4], "r4", 32, PARAM_OUT
);
675 init_reg_param(®_params
[5], "r5", 32, PARAM_OUT
);
676 init_reg_param(®_params
[6], "r6", 32, PARAM_OUT
);
677 init_reg_param(®_params
[7], "r7", 32, PARAM_OUT
);
681 u32 thisrun_count
= (wcount
> (buffer_size
/ 4)) ? (buffer_size
/ 4) : wcount
;
683 target_write_buffer(target
, source
->address
, thisrun_count
* 4, buffer
);
685 buf_set_u32(reg_params
[0].value
, 0, 32, source
->address
);
686 buf_set_u32(reg_params
[1].value
, 0, 32, address
);
687 buf_set_u32(reg_params
[2].value
, 0, 32, 4*thisrun_count
);
688 WARNING("Algorithm flash write %i words to 0x%x, %i remaining",thisrun_count
,address
, wcount
);
689 DEBUG("Algorithm flash write %i words to 0x%x, %i remaining",thisrun_count
,address
, wcount
);
690 if ((retval
= target
->type
->run_algorithm(target
, 0, NULL
, 3, reg_params
, write_algorithm
->address
, write_algorithm
->address
+ sizeof(stellaris_write_code
)-10, 10000, &armv7m_info
)) != ERROR_OK
)
692 ERROR("error executing stellaris flash write algorithm");
693 target_free_working_area(target
, source
);
694 destroy_reg_param(®_params
[0]);
695 destroy_reg_param(®_params
[1]);
696 destroy_reg_param(®_params
[2]);
697 return ERROR_FLASH_OPERATION_FAILED
;
700 buffer
+= thisrun_count
* 4;
701 address
+= thisrun_count
* 4;
702 wcount
-= thisrun_count
;
706 target_free_working_area(target
, write_algorithm
);
707 target_free_working_area(target
, source
);
709 destroy_reg_param(®_params
[0]);
710 destroy_reg_param(®_params
[1]);
711 destroy_reg_param(®_params
[2]);
712 destroy_reg_param(®_params
[3]);
713 destroy_reg_param(®_params
[4]);
714 destroy_reg_param(®_params
[5]);
715 destroy_reg_param(®_params
[6]);
716 destroy_reg_param(®_params
[7]);
721 int stellaris_write(struct flash_bank_s
*bank
, u8
*buffer
, u32 offset
, u32 count
)
723 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
724 target_t
*target
= stellaris_info
->target
;
725 u32 dst_min_alignment
, wcount
, bytes_remaining
= count
;
726 u32 address
= offset
;
727 u32 fcr
,flash_cris
,flash_fmc
;
730 DEBUG("(bank=%08X buffer=%08X offset=%08X count=%08X)",
731 bank
, buffer
, offset
, count
);
733 if (stellaris_info
->target
->state
!= TARGET_HALTED
)
735 return ERROR_TARGET_NOT_HALTED
;
738 if (stellaris_info
->did1
== 0)
740 stellaris_read_part_info(bank
);
743 if (stellaris_info
->did1
== 0)
745 WARNING("Cannot identify target as a Stellaris processor");
746 return ERROR_FLASH_OPERATION_FAILED
;
749 if((offset
& 3) || (count
& 3))
751 WARNING("offset size must be word aligned");
752 return ERROR_FLASH_DST_BREAKS_ALIGNMENT
;
755 if (offset
+ count
> bank
->size
)
756 return ERROR_FLASH_DST_OUT_OF_BANK
;
758 /* Configure the flash controller timing */
759 stellaris_read_clock_info(bank
);
760 stellaris_set_flash_mode(bank
,0);
763 /* Clear and disable flash programming interrupts */
764 target_write_u32(target
, FLASH_CIM
, 0);
765 target_write_u32(target
, FLASH_MISC
, PMISC
|AMISC
);
767 /* multiple words to be programmed? */
770 /* try using a block write */
771 if ((retval
= stellaris_write_block(bank
, buffer
, offset
, count
/4)) != ERROR_OK
)
773 if (retval
== ERROR_TARGET_RESOURCE_NOT_AVAILABLE
)
775 /* if block write failed (no sufficient working area),
776 * we use normal (slow) single dword accesses */
777 WARNING("couldn't use block writes, falling back to single memory accesses");
779 else if (retval
== ERROR_FLASH_OPERATION_FAILED
)
781 /* if an error occured, we examine the reason, and quit */
782 target_read_u32(target
, FLASH_CRIS
, &flash_cris
);
784 ERROR("flash writing failed with CRIS: 0x%x", flash_cris
);
785 return ERROR_FLASH_OPERATION_FAILED
;
791 address
+= count
* 4;
800 if (!(address
&0xff)) DEBUG("0x%x",address
);
801 /* Program one word */
802 target_write_u32(target
, FLASH_FMA
, address
);
803 target_write_buffer(target
, FLASH_FMD
, 4, buffer
);
804 target_write_u32(target
, FLASH_FMC
, FMC_WRKEY
| FMC_WRITE
);
805 //DEBUG("0x%x 0x%x 0x%x",address,buf_get_u32(buffer, 0, 32),FMC_WRKEY | FMC_WRITE);
806 /* Wait until write complete */
809 target_read_u32(target
, FLASH_FMC
, &flash_fmc
);
811 while(flash_fmc
& FMC_WRITE
);
816 /* Check acess violations */
817 target_read_u32(target
, FLASH_CRIS
, &flash_cris
);
818 if(flash_cris
& (AMASK
))
820 DEBUG("flash_cris 0x%x", flash_cris
);
821 return ERROR_FLASH_OPERATION_FAILED
;
827 int stellaris_probe(struct flash_bank_s
*bank
)
829 /* we can't probe on an stellaris
830 * if this is an stellaris, it has the configured flash
832 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
834 if (stellaris_info
->did1
== 0)
836 stellaris_read_part_info(bank
);
839 if (stellaris_info
->did1
== 0)
841 WARNING("Cannot identify target as a LMI Stellaris");
842 return ERROR_FLASH_OPERATION_FAILED
;
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