1 /***************************************************************************
2 * Copyright (C) 2007-2010 by Øyvind Harboe *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
16 ***************************************************************************/
18 /* This file supports the zy1000 debugger:
20 * http://www.ultsol.com/index.php/component/content/article/8/33-zylin-zy1000-jtag-probe
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
36 * See Zylin web pages or contact Zylin for more information.
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
50 #include <target/embeddedice.h>
51 #include <jtag/minidriver.h>
52 #include <jtag/interface.h>
54 #include <helper/time_support.h>
56 #include <netinet/tcp.h>
58 /* Assume we're connecting to a revc w/60MHz clock. */
59 #define ZYLIN_KHZ 60000
61 /* The software needs to check if it's in RCLK mode or not */
62 static bool zy1000_rclk
;
64 static int zy1000_khz(int khz
, int *jtag_speed
)
70 /* Round speed up to nearest divisor.
73 * (64000 + 15999) / 16000 = 4
80 * (64000 + 15998) / 15999 = 5
87 speed
= (ZYLIN_KHZ
+ (khz
- 1)) / khz
;
88 speed
= (speed
+ 1) / 2;
91 /* maximum dividend */
99 static int zy1000_speed_div(int speed
, int *khz
)
104 *khz
= ZYLIN_KHZ
/ speed
;
109 static bool readPowerDropout(void)
112 /* sample and clear power dropout */
113 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x80);
114 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0x10, state
);
116 powerDropout
= (state
& 0x80) != 0;
121 static bool readSRST(void)
124 /* sample and clear SRST sensing */
125 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x00000040);
126 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0x10, state
);
128 srstAsserted
= (state
& 0x40) != 0;
132 static int zy1000_srst_asserted(int *srst_asserted
)
134 *srst_asserted
= readSRST();
138 static int zy1000_power_dropout(int *dropout
)
140 *dropout
= readPowerDropout();
144 /* Wait for SRST to assert or deassert */
145 static void waitSRST(bool asserted
)
150 const char *mode
= asserted
? "assert" : "deassert";
153 bool srstAsserted
= readSRST();
154 if ((asserted
&& srstAsserted
) || (!asserted
&& !srstAsserted
)) {
156 LOG_USER("SRST took %dms to %s", (int)total
, mode
);
162 start
= timeval_ms();
165 total
= timeval_ms() - start
;
170 LOG_ERROR("SRST took too long to %s: %" PRId64
"ms", mode
, total
);
176 void zy1000_reset(int trst
, int srst
)
178 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst
, srst
);
180 /* flush the JTAG FIFO. Not flushing the queue before messing with
181 * reset has such interesting bugs as causing hard to reproduce
182 * RCLK bugs as RCLK will stop responding when TRST is asserted
187 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x00000001);
189 /* Danger!!! if clk != 0 when in
190 * idle in TAP_IDLE, reset halt on str912 will fail.
192 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x00000001);
198 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x00000002);
201 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x00000002);
204 if (trst
|| (srst
&& (jtag_get_reset_config() & RESET_SRST_PULLS_TRST
))) {
205 /* we're now in the RESET state until trst is deasserted */
206 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x20, TAP_RESET
);
208 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
209 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x400);
212 /* wait for srst to float back up */
213 if ((!srst
&& ((jtag_get_reset_config() & RESET_TRST_PULLS_SRST
) == 0)) ||
214 (!srst
&& !trst
&& (jtag_get_reset_config() & RESET_TRST_PULLS_SRST
)))
218 int zy1000_speed(int speed
)
220 /* flush JTAG master FIFO before setting speed */
227 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x100);
229 LOG_DEBUG("jtag_speed using RCLK");
231 if (speed
> 8190 || speed
< 2) {
233 "valid ZY1000 jtag_speed=[8190,2]. With divisor is %dkHz / even values between 8190-2, i.e. min %dHz, max %dMHz",
235 (ZYLIN_KHZ
* 1000) / 8190,
236 ZYLIN_KHZ
/ (2 * 1000));
237 return ERROR_COMMAND_SYNTAX_ERROR
;
242 zy1000_speed_div(speed
, &khz
);
243 LOG_USER("jtag_speed %d => JTAG clk=%d kHz", speed
, khz
);
244 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x100);
245 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x1c, speed
);
250 static bool savePower
;
252 static void setPower(bool power
)
256 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x8);
258 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x8);
261 COMMAND_HANDLER(handle_power_command
)
266 COMMAND_PARSE_ON_OFF(CMD_ARGV
[0], enable
);
271 LOG_INFO("Target power %s", savePower
? "on" : "off");
274 return ERROR_COMMAND_SYNTAX_ERROR
;
280 #if !BUILD_ZY1000_MASTER
281 static char *tcp_server
= "notspecified";
282 static int jim_zy1000_server(Jim_Interp
*interp
, int argc
, Jim_Obj
* const *argv
)
287 tcp_server
= strdup(Jim_GetString(argv
[1], NULL
));
293 static int zylinjtag_Jim_Command_powerstatus(Jim_Interp
*interp
,
295 Jim_Obj
* const *argv
)
298 Jim_WrongNumArgs(interp
, 1, argv
, "powerstatus");
302 bool dropout
= readPowerDropout();
304 Jim_SetResult(interp
, Jim_NewIntObj(interp
, dropout
));
309 int zy1000_quit(void)
315 int interface_jtag_execute_queue(void)
321 /* We must make sure to write data read back to memory location before we return
324 zy1000_flush_readqueue();
326 /* and handle any callbacks... */
327 zy1000_flush_callbackqueue();
330 /* Only check for errors when using RCLK to speed up
333 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0x10, empty
);
334 /* clear JTAG error register */
335 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x400);
337 if ((empty
&0x400) != 0) {
338 LOG_WARNING("RCLK timeout");
339 /* the error is informative only as we don't want to break the firmware if there
340 * is a false positive.
342 /* return ERROR_FAIL; */
348 static void writeShiftValue(uint8_t *data
, int bits
);
350 /* here we shuffle N bits out/in */
351 static inline void scanBits(const uint8_t *out_value
,
355 tap_state_t shiftState
,
356 tap_state_t end_state
)
358 tap_state_t pause_state
= shiftState
;
359 for (int j
= 0; j
< num_bits
; j
+= 32) {
360 int k
= num_bits
- j
;
363 /* we have more to shift out */
364 } else if (pause_now
) {
365 /* this was the last to shift out this time */
366 pause_state
= end_state
;
369 /* we have (num_bits + 7)/8 bytes of bits to toggle out. */
370 /* bits are pushed out LSB to MSB */
373 if (out_value
!= NULL
) {
374 for (int l
= 0; l
< k
; l
+= 8)
375 value
|= out_value
[(j
+ l
)/8]<<l
;
377 /* mask away unused bits for easier debugging */
379 value
&= ~(((uint32_t)0xffffffff) << k
);
381 /* Shifting by >= 32 is not defined by the C standard
382 * and will in fact shift by &0x1f bits on nios */
385 shiftValueInner(shiftState
, pause_state
, k
, value
);
387 if (in_value
!= NULL
)
388 writeShiftValue(in_value
+ (j
/8), k
);
392 static inline void scanFields(int num_fields
,
393 const struct scan_field
*fields
,
394 tap_state_t shiftState
,
395 tap_state_t end_state
)
397 for (int i
= 0; i
< num_fields
; i
++) {
398 scanBits(fields
[i
].out_value
,
407 int interface_jtag_add_ir_scan(struct jtag_tap
*active
,
408 const struct scan_field
*fields
,
412 struct jtag_tap
*tap
, *nextTap
;
413 tap_state_t pause_state
= TAP_IRSHIFT
;
415 for (tap
= jtag_tap_next_enabled(NULL
); tap
!= NULL
; tap
= nextTap
) {
416 nextTap
= jtag_tap_next_enabled(tap
);
419 scan_size
= tap
->ir_length
;
421 /* search the list */
423 scanFields(1, fields
, TAP_IRSHIFT
, pause_state
);
424 /* update device information */
425 buf_cpy(fields
[0].out_value
, tap
->cur_instr
, scan_size
);
429 /* if a device isn't listed, set it to BYPASS */
430 assert(scan_size
<= 32);
431 shiftValueInner(TAP_IRSHIFT
, pause_state
, scan_size
, 0xffffffff);
433 /* Optimization code will check what the cur_instr is set to, so
434 * we must set it to bypass value.
436 buf_set_ones(tap
->cur_instr
, tap
->ir_length
);
445 int interface_jtag_add_plain_ir_scan(int num_bits
,
446 const uint8_t *out_bits
,
450 scanBits(out_bits
, in_bits
, num_bits
, true, TAP_IRSHIFT
, state
);
454 int interface_jtag_add_dr_scan(struct jtag_tap
*active
,
456 const struct scan_field
*fields
,
459 struct jtag_tap
*tap
, *nextTap
;
460 tap_state_t pause_state
= TAP_DRSHIFT
;
461 for (tap
= jtag_tap_next_enabled(NULL
); tap
!= NULL
; tap
= nextTap
) {
462 nextTap
= jtag_tap_next_enabled(tap
);
466 /* Find a range of fields to write to this tap */
468 assert(!tap
->bypass
);
470 scanFields(num_fields
, fields
, TAP_DRSHIFT
, pause_state
);
472 /* Shift out a 0 for disabled tap's */
474 shiftValueInner(TAP_DRSHIFT
, pause_state
, 1, 0);
480 int interface_jtag_add_plain_dr_scan(int num_bits
,
481 const uint8_t *out_bits
,
485 scanBits(out_bits
, in_bits
, num_bits
, true, TAP_DRSHIFT
, state
);
489 int interface_jtag_add_tlr()
491 setCurrentState(TAP_RESET
);
495 int interface_jtag_add_reset(int req_trst
, int req_srst
)
497 zy1000_reset(req_trst
, req_srst
);
501 static int zy1000_jtag_add_clocks(int num_cycles
, tap_state_t state
, tap_state_t clockstate
)
503 /* num_cycles can be 0 */
504 setCurrentState(clockstate
);
506 /* execute num_cycles, 32 at the time. */
508 for (i
= 0; i
< num_cycles
; i
+= 32) {
511 if (num_cycles
-i
< num
)
513 shiftValueInner(clockstate
, clockstate
, num
, 0);
517 /* finish in end_state */
518 setCurrentState(state
);
520 tap_state_t t
= TAP_IDLE
;
521 /* test manual drive code on any target */
523 uint8_t tms_scan
= tap_get_tms_path(t
, state
);
524 int tms_count
= tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
526 for (i
= 0; i
< tms_count
; i
++) {
527 tms
= (tms_scan
>> i
) & 1;
529 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, tms
);
532 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x20, state
);
538 int interface_jtag_add_runtest(int num_cycles
, tap_state_t state
)
540 return zy1000_jtag_add_clocks(num_cycles
, state
, TAP_IDLE
);
543 int interface_jtag_add_clocks(int num_cycles
)
545 return zy1000_jtag_add_clocks(num_cycles
, cmd_queue_cur_state
, cmd_queue_cur_state
);
548 int interface_add_tms_seq(unsigned num_bits
, const uint8_t *seq
, enum tap_state state
)
550 /*wait for the fifo to be empty*/
553 for (unsigned i
= 0; i
< num_bits
; i
++) {
556 if (((seq
[i
/8] >> (i
% 8)) & 1) == 0)
562 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, tms
);
566 if (state
!= TAP_INVALID
)
567 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x20, state
);
569 /* this would be normal if
570 * we are switching to SWD mode */
575 int interface_jtag_add_pathmove(int num_states
, const tap_state_t
*path
)
582 tap_state_t cur_state
= cmd_queue_cur_state
;
585 memset(seq
, 0, sizeof(seq
));
586 assert(num_states
< (int)((sizeof(seq
) * 8)));
589 if (tap_state_transition(cur_state
, false) == path
[state_count
])
591 else if (tap_state_transition(cur_state
, true) == path
[state_count
])
594 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
595 tap_state_name(cur_state
), tap_state_name(path
[state_count
]));
599 seq
[state_count
/8] = seq
[state_count
/8] | (tms
<< (state_count
% 8));
601 cur_state
= path
[state_count
];
606 return interface_add_tms_seq(state_count
, seq
, cur_state
);
609 static void jtag_pre_post_bits(struct jtag_tap
*tap
, int *pre
, int *post
)
611 /* bypass bits before and after */
616 struct jtag_tap
*cur_tap
, *nextTap
;
617 for (cur_tap
= jtag_tap_next_enabled(NULL
); cur_tap
!= NULL
; cur_tap
= nextTap
) {
618 nextTap
= jtag_tap_next_enabled(cur_tap
);
632 void embeddedice_write_dcc(struct jtag_tap
*tap
,
634 const uint8_t *buffer
,
640 for (i
= 0; i
< count
; i
++) {
641 embeddedice_write_reg_inner(tap
, reg_addr
, fast_target_buffer_get_u32(buffer
,
648 jtag_pre_post_bits(tap
, &pre_bits
, &post_bits
);
650 if ((pre_bits
> 32) || (post_bits
+ 6 > 32)) {
652 for (i
= 0; i
< count
; i
++) {
653 embeddedice_write_reg_inner(tap
, reg_addr
,
654 fast_target_buffer_get_u32(buffer
, little
));
659 for (i
= 0; i
< count
; i
++) {
660 /* Fewer pokes means we get to use the FIFO more efficiently */
661 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, pre_bits
, 0);
662 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, 32,
663 fast_target_buffer_get_u32(buffer
, little
));
664 /* Danger! here we need to exit into the TAP_IDLE state to make
665 * DCC pick up this value.
667 shiftValueInner(TAP_DRSHIFT
, TAP_IDLE
, 6 + post_bits
,
668 (reg_addr
| (1 << 5)));
675 int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap
*tap
,
677 const uint32_t *data
,
680 /* bypass bits before and after */
683 jtag_pre_post_bits(tap
, &pre_bits
, &post_bits
);
686 if ((pre_bits
> 32) || (post_bits
> 32)) {
687 int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap
*,
688 uint32_t, const uint32_t *, size_t);
689 return arm11_run_instr_data_to_core_noack_inner_default(tap
, opcode
, data
, count
);
691 static const uint8_t zero
;
693 /* FIX!!!!!! the target_write_memory() API started this nasty problem
694 * with unaligned uint32_t * pointers... */
695 const uint8_t *t
= (const uint8_t *)data
;
697 while (--count
> 0) {
699 /* Danger! This code doesn't update cmd_queue_cur_state, so
700 * invoking jtag_add_pathmove() before jtag_add_dr_scan() after
701 * this loop would fail!
703 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, pre_bits
, 0);
711 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, 32, value
);
713 shiftValueInner(TAP_DRSHIFT
, TAP_DRPAUSE
, post_bits
, 0);
715 /* copy & paste from arm11_dbgtap.c */
716 /* TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT,
717 * TAP_DRCAPTURE, TAP_DRSHIFT */
718 /* KLUDGE! we have to flush the fifo or the Nios CPU locks up.
719 * This is probably a bug in the Avalon bus(cross clocking bridge?)
720 * or in the jtag registers module.
723 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 1);
724 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 1);
725 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
726 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
727 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
728 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 1);
729 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
730 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
731 /* we don't have to wait for the queue to empty here */
732 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x20, TAP_DRSHIFT
);
735 static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay
[] = {
736 TAP_DREXIT2
, TAP_DRUPDATE
, TAP_IDLE
, TAP_IDLE
, TAP_IDLE
,
737 TAP_DRSELECT
, TAP_DRCAPTURE
, TAP_DRSHIFT
740 struct scan_field fields
[2] = {
741 { .num_bits
= 32, .out_value
= t
},
742 { .num_bits
= 2, .out_value
= &zero
},
746 jtag_add_dr_scan(tap
,
751 jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay
),
752 arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay
);
756 struct scan_field fields
[2] = {
757 { .num_bits
= 32, .out_value
= t
},
758 { .num_bits
= 2, .out_value
= &zero
},
761 /* This will happen on the last iteration updating cmd_queue_cur_state
762 * so we don't have to track it during the common code path
764 jtag_add_dr_scan(tap
,
769 return jtag_execute_queue();
773 static const struct command_registration zy1000_commands
[] = {
776 .handler
= handle_power_command
,
778 .help
= "Turn power switch to target on/off. "
779 "With no arguments, prints status.",
780 .usage
= "('on'|'off)",
782 #if !BUILD_ZY1000_MASTER
784 .name
= "zy1000_server",
786 .jim_handler
= jim_zy1000_server
,
787 .help
= "Tcpip address for ZY1000 server.",
792 .name
= "powerstatus",
794 .jim_handler
= zylinjtag_Jim_Command_powerstatus
,
795 .help
= "Returns power status of target",
797 COMMAND_REGISTRATION_DONE
800 #if !BUILD_ZY1000_MASTER
802 static int tcp_ip
= -1;
804 /* Write large packets if we can */
805 static size_t out_pos
;
806 static uint8_t out_buffer
[16384];
807 static size_t in_pos
;
808 static size_t in_write
;
809 static uint8_t in_buffer
[16384];
811 static bool flush_writes(void)
813 bool ok
= (write(tcp_ip
, out_buffer
, out_pos
) == (int)out_pos
);
818 static bool writeLong(uint32_t l
)
821 for (i
= 0; i
< 4; i
++) {
822 uint8_t c
= (l
>> (i
*8))&0xff;
823 out_buffer
[out_pos
++] = c
;
824 if (out_pos
>= sizeof(out_buffer
)) {
832 static bool readLong(uint32_t *out_data
)
836 for (i
= 0; i
< 4; i
++) {
838 if (in_pos
== in_write
) {
839 /* If we have some data that we can send, send them before
840 * we wait for more data
849 t
= read(tcp_ip
, in_buffer
, sizeof(in_buffer
));
852 in_write
= (size_t) t
;
855 c
= in_buffer
[in_pos
++];
857 data
|= (c
<< (i
*8));
864 ZY1000_CMD_POKE
= 0x0,
865 ZY1000_CMD_PEEK
= 0x8,
866 ZY1000_CMD_SLEEP
= 0x1,
867 ZY1000_CMD_WAITIDLE
= 2
870 #include <sys/socket.h> /* for socket(), connect(), send(), and recv() */
871 #include <arpa/inet.h> /* for sockaddr_in and inet_addr() */
873 /* We initialize this late since we need to know the server address
876 static void tcpip_open(void)
881 struct sockaddr_in echoServAddr
;/* Echo server address */
883 /* Create a reliable, stream socket using TCP */
884 tcp_ip
= socket(PF_INET
, SOCK_STREAM
, IPPROTO_TCP
);
886 fprintf(stderr
, "Failed to connect to zy1000 server\n");
890 /* Construct the server address structure */
891 memset(&echoServAddr
, 0, sizeof(echoServAddr
)); /* Zero out structure */
892 echoServAddr
.sin_family
= AF_INET
; /* Internet address family */
893 echoServAddr
.sin_addr
.s_addr
= inet_addr(tcp_server
); /* Server IP address */
894 echoServAddr
.sin_port
= htons(7777); /* Server port */
896 /* Establish the connection to the echo server */
897 if (connect(tcp_ip
, (struct sockaddr
*) &echoServAddr
, sizeof(echoServAddr
)) < 0) {
898 fprintf(stderr
, "Failed to connect to zy1000 server\n");
903 setsockopt(tcp_ip
, /* socket affected */
904 IPPROTO_TCP
, /* set option at TCP level */
905 TCP_NODELAY
, /* name of option */
906 (char *)&flag
, /* the cast is historical cruft */
907 sizeof(int)); /* length of option value */
912 void zy1000_tcpout(uint32_t address
, uint32_t data
)
915 if (!writeLong((ZY1000_CMD_POKE
<< 24) | address
) || !writeLong(data
)) {
916 fprintf(stderr
, "Could not write to zy1000 server\n");
921 /* By sending the wait to the server, we avoid a readback
922 * of status. Radically improves performance for this operation
923 * with long ping times.
928 if (!writeLong((ZY1000_CMD_WAITIDLE
<< 24))) {
929 fprintf(stderr
, "Could not write to zy1000 server\n");
934 uint32_t zy1000_tcpin(uint32_t address
)
938 zy1000_flush_readqueue();
941 if (!writeLong((ZY1000_CMD_PEEK
<< 24) | address
) || !readLong(&data
)) {
942 fprintf(stderr
, "Could not read from zy1000 server\n");
948 int interface_jtag_add_sleep(uint32_t us
)
951 if (!writeLong((ZY1000_CMD_SLEEP
<< 24)) || !writeLong(us
)) {
952 fprintf(stderr
, "Could not read from zy1000 server\n");
958 /* queue a readback */
959 #define readqueue_size 16384
963 } readqueue
[readqueue_size
];
965 static int readqueue_pos
;
967 /* flush the readqueue, this means reading any data that
968 * we're expecting and store them into the final position
970 void zy1000_flush_readqueue(void)
972 if (readqueue_pos
== 0) {
973 /* simply debugging by allowing easy breakpoints when there
974 * is something to do. */
979 for (i
= 0; i
< readqueue_pos
; i
++) {
981 if (!readLong(&value
)) {
982 fprintf(stderr
, "Could not read from zy1000 server\n");
986 uint8_t *in_value
= readqueue
[i
].dest
;
987 int k
= readqueue
[i
].bits
;
989 /* we're shifting in data to MSB, shift data to be aligned for returning the value */
992 for (int l
= 0; l
< k
; l
+= 8)
993 in_value
[l
/8] = (value
>> l
)&0xff;
998 /* By queuing the callback's we avoid flushing the
999 * read queue until jtag_execute_queue(). This can
1000 * reduce latency dramatically for cases where
1001 * callbacks are used extensively.
1003 #define callbackqueue_size 128
1004 static struct callbackentry
{
1005 jtag_callback_t callback
;
1006 jtag_callback_data_t data0
;
1007 jtag_callback_data_t data1
;
1008 jtag_callback_data_t data2
;
1009 jtag_callback_data_t data3
;
1010 } callbackqueue
[callbackqueue_size
];
1012 static int callbackqueue_pos
;
1014 void zy1000_jtag_add_callback4(jtag_callback_t callback
,
1015 jtag_callback_data_t data0
,
1016 jtag_callback_data_t data1
,
1017 jtag_callback_data_t data2
,
1018 jtag_callback_data_t data3
)
1020 if (callbackqueue_pos
>= callbackqueue_size
)
1021 zy1000_flush_callbackqueue();
1023 callbackqueue
[callbackqueue_pos
].callback
= callback
;
1024 callbackqueue
[callbackqueue_pos
].data0
= data0
;
1025 callbackqueue
[callbackqueue_pos
].data1
= data1
;
1026 callbackqueue
[callbackqueue_pos
].data2
= data2
;
1027 callbackqueue
[callbackqueue_pos
].data3
= data3
;
1028 callbackqueue_pos
++;
1031 * make callbacks synchronous for now as minidriver requires callback
1032 * to be synchronous.
1034 * We can get away with making read and writes asynchronous so we
1035 * don't completely kill performance.
1037 zy1000_flush_callbackqueue();
1040 static int zy1000_jtag_convert_to_callback4(jtag_callback_data_t data0
,
1041 jtag_callback_data_t data1
,
1042 jtag_callback_data_t data2
,
1043 jtag_callback_data_t data3
)
1045 ((jtag_callback1_t
)data1
)(data0
);
1049 void zy1000_jtag_add_callback(jtag_callback1_t callback
, jtag_callback_data_t data0
)
1051 zy1000_jtag_add_callback4(zy1000_jtag_convert_to_callback4
,
1053 (jtag_callback_data_t
)callback
,
1058 void zy1000_flush_callbackqueue(void)
1060 /* we have to flush the read queue so we have access to
1061 the data the callbacks will use
1063 zy1000_flush_readqueue();
1065 for (i
= 0; i
< callbackqueue_pos
; i
++) {
1066 struct callbackentry
*entry
= &callbackqueue
[i
];
1067 jtag_set_error(entry
->callback(entry
->data0
, entry
->data1
, entry
->data2
,
1070 callbackqueue_pos
= 0;
1073 static void writeShiftValue(uint8_t *data
, int bits
)
1077 if (!writeLong((ZY1000_CMD_PEEK
<< 24) | (ZY1000_JTAG_BASE
+ 0xc))) {
1078 fprintf(stderr
, "Could not read from zy1000 server\n");
1082 if (readqueue_pos
>= readqueue_size
)
1083 zy1000_flush_readqueue();
1085 readqueue
[readqueue_pos
].dest
= data
;
1086 readqueue
[readqueue_pos
].bits
= bits
;
1089 /* KLUDGE!!! minidriver requires readqueue to be synchronous */
1090 zy1000_flush_readqueue();
1095 static void writeShiftValue(uint8_t *data
, int bits
)
1099 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0xc, value
);
1100 VERBOSE(LOG_INFO("getShiftValue %08x", value
));
1102 /* data in, LSB to MSB */
1103 /* we're shifting in data to MSB, shift data to be aligned for returning the value */
1104 value
>>= 32 - bits
;
1106 for (int l
= 0; l
< bits
; l
+= 8)
1107 data
[l
/8] = (value
>> l
)&0xff;
1112 #if BUILD_ZY1000_MASTER
1114 #ifdef WATCHDOG_BASE
1115 /* If we connect to port 8888 we must send a char every 10s or the board resets itself */
1116 static void watchdog_server(cyg_addrword_t data
)
1118 int so_reuseaddr_option
= 1;
1120 int fd
= socket(AF_INET
, SOCK_STREAM
, 0);
1122 LOG_ERROR("error creating socket: %s", strerror(errno
));
1126 setsockopt(fd
, SOL_SOCKET
, SO_REUSEADDR
, (void *) &so_reuseaddr_option
,
1129 struct sockaddr_in sin
;
1130 unsigned int address_size
;
1131 address_size
= sizeof(sin
);
1132 memset(&sin
, 0, sizeof(sin
));
1133 sin
.sin_family
= AF_INET
;
1134 sin
.sin_addr
.s_addr
= INADDR_ANY
;
1135 sin
.sin_port
= htons(8888);
1137 if (bind(fd
, (struct sockaddr
*) &sin
, sizeof(sin
)) == -1) {
1138 LOG_ERROR("couldn't bind to socket: %s", strerror(errno
));
1142 if (listen(fd
, 1) == -1) {
1143 LOG_ERROR("couldn't listen on socket: %s", strerror(errno
));
1149 int watchdog_ip
= accept(fd
, (struct sockaddr
*) &sin
, &address_size
);
1151 /* Start watchdog, must be reset every 10 seconds. */
1152 HAL_WRITE_UINT32(WATCHDOG_BASE
+ 4, 4);
1154 if (watchdog_ip
< 0) {
1155 LOG_ERROR("couldn't open watchdog socket: %s", strerror(errno
));
1160 setsockopt(watchdog_ip
, /* socket affected */
1161 IPPROTO_TCP
, /* set option at TCP level */
1162 TCP_NODELAY
, /* name of option */
1163 (char *)&flag
, /* the cast is historical cruft */
1164 sizeof(int)); /* length of option value */
1169 if (read(watchdog_ip
, &buf
, 1) == 1) {
1171 HAL_WRITE_UINT32(WATCHDOG_BASE
+ 8, 0x1234);
1172 /* Echo so we can telnet in and see that resetting works */
1173 write(watchdog_ip
, &buf
, 1);
1175 /* Stop tickling the watchdog, the CPU will reset in < 10 seconds
1190 #if BUILD_ZY1000_MASTER
1191 int interface_jtag_add_sleep(uint32_t us
)
1198 #if BUILD_ZY1000_MASTER
1199 volatile void *zy1000_jtag_master
;
1200 #include <sys/mman.h>
1203 int zy1000_init(void)
1205 #if BUILD_ZY1000_MASTER
1206 int fd
= open("/dev/mem", O_RDWR
| O_SYNC
);
1208 LOG_ERROR("No access to /dev/mem");
1211 #ifndef REGISTERS_BASE
1212 #define REGISTERS_BASE 0x9002000
1213 #define REGISTERS_SPAN 128
1216 zy1000_jtag_master
= mmap(0,
1218 PROT_READ
| PROT_WRITE
,
1223 if (zy1000_jtag_master
== (void *) -1) {
1225 LOG_ERROR("No access to /dev/mem");
1230 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x30); /* Turn on LED1 & LED2 */
1232 setPower(true); /* on by default */
1234 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
1240 struct jtag_interface zy1000_interface
= {
1242 .supported
= DEBUG_CAP_TMS_SEQ
,
1243 .execute_queue
= NULL
,
1244 .speed
= zy1000_speed
,
1245 .commands
= zy1000_commands
,
1246 .init
= zy1000_init
,
1247 .quit
= zy1000_quit
,
1249 .speed_div
= zy1000_speed_div
,
1250 .power_dropout
= zy1000_power_dropout
,
1251 .srst_asserted
= zy1000_srst_asserted
,
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