zy1000: reset bugfix
[openocd.git] / src / jtag / zy1000 / zy1000.c
1 /***************************************************************************
2 * Copyright (C) 2007-2009 by Øyvind Harboe *
3 * *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
8 * *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
13 * *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
19
20 /* This file supports the zy1000 debugger: http://www.zylin.com/zy1000.html
21 *
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
28 *
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
32 *
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
35 *
36 * See Zylin web pages or contact Zylin for more information.
37 *
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
42 * systems(PCs).
43 */
44 #ifdef HAVE_CONFIG_H
45 #include "config.h"
46 #endif
47
48 #include <target/embeddedice.h>
49 #include <jtag/minidriver.h>
50 #include <jtag/interface.h>
51 #include "zy1000_version.h"
52
53 #include <cyg/hal/hal_io.h> // low level i/o
54 #include <cyg/hal/hal_diag.h>
55
56 #include <time.h>
57
58 #ifdef CYGPKG_HAL_NIOS2
59 #include <cyg/hal/io.h>
60 #include <cyg/firmwareutil/firmwareutil.h>
61 #endif
62
63 #define ZYLIN_VERSION GIT_ZY1000_VERSION
64 #define ZYLIN_DATE __DATE__
65 #define ZYLIN_TIME __TIME__
66 #define ZYLIN_OPENOCD GIT_OPENOCD_VERSION
67 #define ZYLIN_OPENOCD_VERSION "ZY1000 " ZYLIN_VERSION " " ZYLIN_DATE
68
69
70 static int zy1000_khz(int khz, int *jtag_speed)
71 {
72 if (khz == 0)
73 {
74 *jtag_speed = 0;
75 }
76 else
77 {
78 *jtag_speed = 64000/khz;
79 }
80 return ERROR_OK;
81 }
82
83 static int zy1000_speed_div(int speed, int *khz)
84 {
85 if (speed == 0)
86 {
87 *khz = 0;
88 }
89 else
90 {
91 *khz = 64000/speed;
92 }
93
94 return ERROR_OK;
95 }
96
97 static bool readPowerDropout(void)
98 {
99 cyg_uint32 state;
100 // sample and clear power dropout
101 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x80);
102 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
103 bool powerDropout;
104 powerDropout = (state & 0x80) != 0;
105 return powerDropout;
106 }
107
108
109 static bool readSRST(void)
110 {
111 cyg_uint32 state;
112 // sample and clear SRST sensing
113 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000040);
114 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
115 bool srstAsserted;
116 srstAsserted = (state & 0x40) != 0;
117 return srstAsserted;
118 }
119
120 static int zy1000_srst_asserted(int *srst_asserted)
121 {
122 *srst_asserted = readSRST();
123 return ERROR_OK;
124 }
125
126 static int zy1000_power_dropout(int *dropout)
127 {
128 *dropout = readPowerDropout();
129 return ERROR_OK;
130 }
131
132 void zy1000_reset(int trst, int srst)
133 {
134 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst, srst);
135
136 /* flush the JTAG FIFO. Not flushing the queue before messing with
137 * reset has such interesting bugs as causing hard to reproduce
138 * RCLK bugs as RCLK will stop responding when TRST is asserted
139 */
140 waitIdle();
141
142 if (!srst)
143 {
144 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000001);
145 }
146 else
147 {
148 /* Danger!!! if clk != 0 when in
149 * idle in TAP_IDLE, reset halt on str912 will fail.
150 */
151 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000001);
152 }
153
154 if (!trst)
155 {
156 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000002);
157 }
158 else
159 {
160 /* assert reset */
161 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000002);
162 }
163
164 if (trst||(srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
165 {
166 /* we're now in the RESET state until trst is deasserted */
167 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_RESET);
168 } else
169 {
170 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
171 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
172 }
173
174 /* wait for srst to float back up */
175 if (!srst)
176 {
177 int i;
178 for (i = 0; i < 1000; i++)
179 {
180 // We don't want to sense our own reset, so we clear here.
181 // There is of course a timing hole where we could loose
182 // a "real" reset.
183 if (!readSRST())
184 break;
185
186 /* wait 1ms */
187 alive_sleep(1);
188 }
189
190 if (i == 1000)
191 {
192 LOG_USER("SRST didn't deassert after %dms", i);
193 } else if (i > 1)
194 {
195 LOG_USER("SRST took %dms to deassert", i);
196 }
197 }
198 }
199
200 int zy1000_speed(int speed)
201 {
202 if (speed == 0)
203 {
204 /*0 means RCLK*/
205 speed = 0;
206 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x100);
207 LOG_DEBUG("jtag_speed using RCLK");
208 }
209 else
210 {
211 if (speed > 8190 || speed < 2)
212 {
213 LOG_USER("valid ZY1000 jtag_speed=[8190,2]. Divisor is 64MHz / even values between 8190-2, i.e. min 7814Hz, max 32MHz");
214 return ERROR_INVALID_ARGUMENTS;
215 }
216
217 LOG_USER("jtag_speed %d => JTAG clk=%f", speed, 64.0/(float)speed);
218 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x100);
219 ZY1000_POKE(ZY1000_JTAG_BASE + 0x1c, speed&~1);
220 }
221 return ERROR_OK;
222 }
223
224 static bool savePower;
225
226
227 static void setPower(bool power)
228 {
229 savePower = power;
230 if (power)
231 {
232 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x8);
233 } else
234 {
235 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x8);
236 }
237 }
238
239 COMMAND_HANDLER(handle_power_command)
240 {
241 switch (CMD_ARGC)
242 {
243 case 1: {
244 bool enable;
245 COMMAND_PARSE_ON_OFF(CMD_ARGV[0], enable);
246 setPower(enable);
247 // fall through
248 }
249 case 0:
250 LOG_INFO("Target power %s", savePower ? "on" : "off");
251 break;
252 default:
253 return ERROR_INVALID_ARGUMENTS;
254 }
255
256 return ERROR_OK;
257 }
258
259
260 /* Give TELNET a way to find out what version this is */
261 static int jim_zy1000_version(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
262 {
263 if ((argc < 1) || (argc > 3))
264 return JIM_ERR;
265 const char *version_str = NULL;
266
267 if (argc == 1)
268 {
269 version_str = ZYLIN_OPENOCD_VERSION;
270 } else
271 {
272 const char *str = Jim_GetString(argv[1], NULL);
273 const char *str2 = NULL;
274 if (argc > 2)
275 str2 = Jim_GetString(argv[2], NULL);
276 if (strcmp("openocd", str) == 0)
277 {
278 version_str = ZYLIN_OPENOCD;
279 }
280 else if (strcmp("zy1000", str) == 0)
281 {
282 version_str = ZYLIN_VERSION;
283 }
284 else if (strcmp("date", str) == 0)
285 {
286 version_str = ZYLIN_DATE;
287 }
288 else if (strcmp("time", str) == 0)
289 {
290 version_str = ZYLIN_TIME;
291 }
292 else if (strcmp("pcb", str) == 0)
293 {
294 #ifdef CYGPKG_HAL_NIOS2
295 version_str="c";
296 #else
297 version_str="b";
298 #endif
299 }
300 #ifdef CYGPKG_HAL_NIOS2
301 else if (strcmp("fpga", str) == 0)
302 {
303
304 /* return a list of 32 bit integers to describe the expected
305 * and actual FPGA
306 */
307 static char *fpga_id = "0x12345678 0x12345678 0x12345678 0x12345678";
308 cyg_uint32 id, timestamp;
309 HAL_READ_UINT32(SYSID_BASE, id);
310 HAL_READ_UINT32(SYSID_BASE+4, timestamp);
311 sprintf(fpga_id, "0x%08x 0x%08x 0x%08x 0x%08x", id, timestamp, SYSID_ID, SYSID_TIMESTAMP);
312 version_str = fpga_id;
313 if ((argc>2) && (strcmp("time", str2) == 0))
314 {
315 time_t last_mod = timestamp;
316 char * t = ctime (&last_mod) ;
317 t[strlen(t)-1] = 0;
318 version_str = t;
319 }
320 }
321 #endif
322
323 else
324 {
325 return JIM_ERR;
326 }
327 }
328
329 Jim_SetResult(interp, Jim_NewStringObj(interp, version_str, -1));
330
331 return JIM_OK;
332 }
333
334
335 #ifdef CYGPKG_HAL_NIOS2
336
337
338 struct info_forward
339 {
340 void *data;
341 struct cyg_upgrade_info *upgraded_file;
342 };
343
344 static void report_info(void *data, const char * format, va_list args)
345 {
346 char *s = alloc_vprintf(format, args);
347 LOG_USER_N("%s", s);
348 free(s);
349 }
350
351 struct cyg_upgrade_info firmware_info =
352 {
353 (cyg_uint8 *)0x84000000,
354 "/ram/firmware.phi",
355 "Firmware",
356 0x0300000,
357 0x1f00000 -
358 0x0300000,
359 "ZylinNiosFirmware\n",
360 report_info,
361 };
362
363 static int jim_zy1000_writefirmware(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
364 {
365 if (argc != 2)
366 return JIM_ERR;
367
368 int length;
369 const char *str = Jim_GetString(argv[1], &length);
370
371 /* */
372 int tmpFile;
373 if ((tmpFile = open(firmware_info.file, O_RDWR | O_CREAT | O_TRUNC)) <= 0)
374 {
375 return JIM_ERR;
376 }
377 bool success;
378 success = write(tmpFile, str, length) == length;
379 close(tmpFile);
380 if (!success)
381 return JIM_ERR;
382
383 if (!cyg_firmware_upgrade(NULL, firmware_info))
384 return JIM_ERR;
385
386 return JIM_OK;
387 }
388 #endif
389
390 static int
391 zylinjtag_Jim_Command_powerstatus(Jim_Interp *interp,
392 int argc,
393 Jim_Obj * const *argv)
394 {
395 if (argc != 1)
396 {
397 Jim_WrongNumArgs(interp, 1, argv, "powerstatus");
398 return JIM_ERR;
399 }
400
401 cyg_uint32 status;
402 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, status);
403
404 Jim_SetResult(interp, Jim_NewIntObj(interp, (status&0x80) != 0));
405
406 return JIM_OK;
407 }
408
409
410
411
412 int zy1000_init(void)
413 {
414 LOG_USER("%s", ZYLIN_OPENOCD_VERSION);
415
416 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x30); // Turn on LED1 & LED2
417
418 setPower(true); // on by default
419
420
421 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
422 zy1000_reset(0, 0);
423 zy1000_speed(jtag_get_speed());
424
425 return ERROR_OK;
426 }
427
428 int zy1000_quit(void)
429 {
430
431 return ERROR_OK;
432 }
433
434
435
436 int interface_jtag_execute_queue(void)
437 {
438 cyg_uint32 empty;
439
440 waitIdle();
441 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty);
442 /* clear JTAG error register */
443 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
444
445 if ((empty&0x400) != 0)
446 {
447 LOG_WARNING("RCLK timeout");
448 /* the error is informative only as we don't want to break the firmware if there
449 * is a false positive.
450 */
451 // return ERROR_FAIL;
452 }
453 return ERROR_OK;
454 }
455
456
457
458
459
460 static cyg_uint32 getShiftValue(void)
461 {
462 cyg_uint32 value;
463 waitIdle();
464 ZY1000_PEEK(ZY1000_JTAG_BASE + 0xc, value);
465 VERBOSE(LOG_INFO("getShiftValue %08x", value));
466 return value;
467 }
468 #if 0
469 static cyg_uint32 getShiftValueFlip(void)
470 {
471 cyg_uint32 value;
472 waitIdle();
473 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x18, value);
474 VERBOSE(LOG_INFO("getShiftValue %08x (flipped)", value));
475 return value;
476 }
477 #endif
478
479 #if 0
480 static void shiftValueInnerFlip(const tap_state_t state, const tap_state_t endState, int repeat, cyg_uint32 value)
481 {
482 VERBOSE(LOG_INFO("shiftValueInner %s %s %d %08x (flipped)", tap_state_name(state), tap_state_name(endState), repeat, value));
483 cyg_uint32 a,b;
484 a = state;
485 b = endState;
486 ZY1000_POKE(ZY1000_JTAG_BASE + 0xc, value);
487 ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (1 << 15) | (repeat << 8) | (a << 4) | b);
488 VERBOSE(getShiftValueFlip());
489 }
490 #endif
491
492 static void gotoEndState(tap_state_t end_state)
493 {
494 setCurrentState(end_state);
495 }
496
497 static __inline void scanFields(int num_fields, const struct scan_field *fields, tap_state_t shiftState, int pause)
498 {
499 int i;
500 int j;
501 int k;
502
503 for (i = 0; i < num_fields; i++)
504 {
505 cyg_uint32 value;
506
507 uint8_t *inBuffer = NULL;
508
509
510 // figure out where to store the input data
511 int num_bits = fields[i].num_bits;
512 if (fields[i].in_value != NULL)
513 {
514 inBuffer = fields[i].in_value;
515 }
516
517 // here we shuffle N bits out/in
518 j = 0;
519 while (j < num_bits)
520 {
521 tap_state_t pause_state;
522 int l;
523 k = num_bits-j;
524 pause_state = (shiftState == TAP_DRSHIFT)?TAP_DRSHIFT:TAP_IRSHIFT;
525 if (k > 32)
526 {
527 k = 32;
528 /* we have more to shift out */
529 } else if (pause&&(i == num_fields-1))
530 {
531 /* this was the last to shift out this time */
532 pause_state = (shiftState==TAP_DRSHIFT)?TAP_DRPAUSE:TAP_IRPAUSE;
533 }
534
535 // we have (num_bits + 7)/8 bytes of bits to toggle out.
536 // bits are pushed out LSB to MSB
537 value = 0;
538 if (fields[i].out_value != NULL)
539 {
540 for (l = 0; l < k; l += 8)
541 {
542 value|=fields[i].out_value[(j + l)/8]<<l;
543 }
544 }
545 /* mask away unused bits for easier debugging */
546 if (k < 32)
547 {
548 value&=~(((uint32_t)0xffffffff) << k);
549 } else
550 {
551 /* Shifting by >= 32 is not defined by the C standard
552 * and will in fact shift by &0x1f bits on nios */
553 }
554
555 shiftValueInner(shiftState, pause_state, k, value);
556
557 if (inBuffer != NULL)
558 {
559 // data in, LSB to MSB
560 value = getShiftValue();
561 // we're shifting in data to MSB, shift data to be aligned for returning the value
562 value >>= 32-k;
563
564 for (l = 0; l < k; l += 8)
565 {
566 inBuffer[(j + l)/8]=(value >> l)&0xff;
567 }
568 }
569 j += k;
570 }
571 }
572 }
573
574 int interface_jtag_add_ir_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
575 {
576
577 int j;
578 int scan_size = 0;
579 struct jtag_tap *tap, *nextTap;
580 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
581 {
582 nextTap = jtag_tap_next_enabled(tap);
583 int pause = (nextTap==NULL);
584
585 int found = 0;
586
587 scan_size = tap->ir_length;
588
589 /* search the list */
590 for (j = 0; j < num_fields; j++)
591 {
592 if (tap == fields[j].tap)
593 {
594 found = 1;
595
596 scanFields(1, fields + j, TAP_IRSHIFT, pause);
597 /* update device information */
598 buf_cpy(fields[j].out_value, tap->cur_instr, scan_size);
599
600 tap->bypass = 0;
601 break;
602 }
603 }
604
605 if (!found)
606 {
607 /* if a device isn't listed, set it to BYPASS */
608 uint8_t ones[]={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
609
610 struct scan_field tmp;
611 memset(&tmp, 0, sizeof(tmp));
612 tmp.out_value = ones;
613 tmp.num_bits = scan_size;
614 scanFields(1, &tmp, TAP_IRSHIFT, pause);
615 /* update device information */
616 buf_cpy(tmp.out_value, tap->cur_instr, scan_size);
617 tap->bypass = 1;
618 }
619 }
620 gotoEndState(state);
621
622 return ERROR_OK;
623 }
624
625
626
627
628
629 int interface_jtag_add_plain_ir_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
630 {
631 scanFields(num_fields, fields, TAP_IRSHIFT, 1);
632 gotoEndState(state);
633
634 return ERROR_OK;
635 }
636
637 int interface_jtag_add_dr_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
638 {
639
640 int j;
641 struct jtag_tap *tap, *nextTap;
642 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
643 {
644 nextTap = jtag_tap_next_enabled(tap);
645 int found = 0;
646 int pause = (nextTap==NULL);
647
648 for (j = 0; j < num_fields; j++)
649 {
650 if (tap == fields[j].tap)
651 {
652 found = 1;
653
654 scanFields(1, fields+j, TAP_DRSHIFT, pause);
655 }
656 }
657 if (!found)
658 {
659 struct scan_field tmp;
660 /* program the scan field to 1 bit length, and ignore it's value */
661 tmp.num_bits = 1;
662 tmp.out_value = NULL;
663 tmp.in_value = NULL;
664
665 scanFields(1, &tmp, TAP_DRSHIFT, pause);
666 }
667 else
668 {
669 }
670 }
671 gotoEndState(state);
672 return ERROR_OK;
673 }
674
675 int interface_jtag_add_plain_dr_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
676 {
677 scanFields(num_fields, fields, TAP_DRSHIFT, 1);
678 gotoEndState(state);
679 return ERROR_OK;
680 }
681
682
683 int interface_jtag_add_tlr()
684 {
685 setCurrentState(TAP_RESET);
686 return ERROR_OK;
687 }
688
689
690
691
692 int interface_jtag_add_reset(int req_trst, int req_srst)
693 {
694 zy1000_reset(req_trst, req_srst);
695 return ERROR_OK;
696 }
697
698 static int zy1000_jtag_add_clocks(int num_cycles, tap_state_t state, tap_state_t clockstate)
699 {
700 /* num_cycles can be 0 */
701 setCurrentState(clockstate);
702
703 /* execute num_cycles, 32 at the time. */
704 int i;
705 for (i = 0; i < num_cycles; i += 32)
706 {
707 int num;
708 num = 32;
709 if (num_cycles-i < num)
710 {
711 num = num_cycles-i;
712 }
713 shiftValueInner(clockstate, clockstate, num, 0);
714 }
715
716 #if !TEST_MANUAL()
717 /* finish in end_state */
718 setCurrentState(state);
719 #else
720 tap_state_t t = TAP_IDLE;
721 /* test manual drive code on any target */
722 int tms;
723 uint8_t tms_scan = tap_get_tms_path(t, state);
724 int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
725
726 for (i = 0; i < tms_count; i++)
727 {
728 tms = (tms_scan >> i) & 1;
729 waitIdle();
730 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
731 }
732 waitIdle();
733 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
734 #endif
735
736
737 return ERROR_OK;
738 }
739
740 int interface_jtag_add_runtest(int num_cycles, tap_state_t state)
741 {
742 return zy1000_jtag_add_clocks(num_cycles, state, TAP_IDLE);
743 }
744
745 int interface_jtag_add_clocks(int num_cycles)
746 {
747 return zy1000_jtag_add_clocks(num_cycles, cmd_queue_cur_state, cmd_queue_cur_state);
748 }
749
750 int interface_jtag_add_sleep(uint32_t us)
751 {
752 jtag_sleep(us);
753 return ERROR_OK;
754 }
755
756 int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
757 {
758 int state_count;
759 int tms = 0;
760
761 /*wait for the fifo to be empty*/
762 waitIdle();
763
764 state_count = 0;
765
766 tap_state_t cur_state = cmd_queue_cur_state;
767
768 while (num_states)
769 {
770 if (tap_state_transition(cur_state, false) == path[state_count])
771 {
772 tms = 0;
773 }
774 else if (tap_state_transition(cur_state, true) == path[state_count])
775 {
776 tms = 1;
777 }
778 else
779 {
780 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(cur_state), tap_state_name(path[state_count]));
781 exit(-1);
782 }
783
784 waitIdle();
785 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
786
787 cur_state = path[state_count];
788 state_count++;
789 num_states--;
790 }
791
792 waitIdle();
793 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, cur_state);
794 return ERROR_OK;
795 }
796
797
798
799 void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
800 {
801 // static int const reg_addr = 0x5;
802 tap_state_t end_state = jtag_get_end_state();
803 if (jtag_tap_next_enabled(jtag_tap_next_enabled(NULL)) == NULL)
804 {
805 /* better performance via code duplication */
806 if (little)
807 {
808 int i;
809 for (i = 0; i < count; i++)
810 {
811 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, 1));
812 shiftValueInner(TAP_DRSHIFT, end_state, 6, reg_addr | (1 << 5));
813 buffer += 4;
814 }
815 } else
816 {
817 int i;
818 for (i = 0; i < count; i++)
819 {
820 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, 0));
821 shiftValueInner(TAP_DRSHIFT, end_state, 6, reg_addr | (1 << 5));
822 buffer += 4;
823 }
824 }
825 }
826 else
827 {
828 int i;
829 for (i = 0; i < count; i++)
830 {
831 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
832 buffer += 4;
833 }
834 }
835 }
836
837
838 static const struct command_registration zy1000_commands[] = {
839 {
840 .name = "power",
841 .handler = handle_power_command,
842 .mode = COMMAND_ANY,
843 .help = "Turn power switch to target on/off. "
844 "With no arguments, prints status.",
845 .usage = "('on'|'off)",
846 },
847 {
848 .name = "zy1000_version",
849 .mode = COMMAND_ANY,
850 .jim_handler = jim_zy1000_version,
851 .help = "Print version info for zy1000.",
852 .usage = "['openocd'|'zy1000'|'date'|'time'|'pcb'|'fpga']",
853 },
854 {
855 .name = "powerstatus",
856 .mode = COMMAND_ANY,
857 .jim_handler = zylinjtag_Jim_Command_powerstatus,
858 .help = "Returns power status of target",
859 },
860 #ifdef CYGPKG_HAL_NIOS2
861 {
862 .name = "updatezy1000firmware",
863 .mode = COMMAND_ANY,
864 .jim_handler = jim_zy1000_writefirmware,
865 .help = "writes firmware to flash",
866 /* .usage = "some_string", */
867 },
868 #endif
869 COMMAND_REGISTRATION_DONE
870 };
871
872
873
874 struct jtag_interface zy1000_interface =
875 {
876 .name = "ZY1000",
877 .execute_queue = NULL,
878 .speed = zy1000_speed,
879 .commands = zy1000_commands,
880 .init = zy1000_init,
881 .quit = zy1000_quit,
882 .khz = zy1000_khz,
883 .speed_div = zy1000_speed_div,
884 .power_dropout = zy1000_power_dropout,
885 .srst_asserted = zy1000_srst_asserted,
886 };
887

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)