f7095a687407d5d2afe091d3a6a8b0d9a9730d6e
[openocd.git] / tcl / board / rsc-w910.cfg
1 # Avalue RSC-W8910 sbc
2 # http://www.avalue.com.tw/products/RSC-W910.cfm
3 # 2MB NOR Flash
4 # 64MB SDRAM
5 # 128MB NAND Flash
6
7 # Based on Nuvoton nuc910
8 source [find target/nuc910.cfg]
9
10 #
11 # reset only behaves correctly if we use srst_pulls_trst
12 #
13 reset_config trst_and_srst srst_pulls_trst
14
15 adapter_khz 1000
16 adapter_nsrst_delay 100
17 jtag_ntrst_delay 100
18
19 $_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x04000000 -work-area-backup 0
20
21 set _FLASHNAME $_CHIPNAME.flash
22 flash bank $_FLASHNAME cfi 0x20000000 0x00200000 2 2 $_TARGETNAME
23
24 #
25 # Target events
26 #
27
28 $_TARGETNAME configure -event reset-start {adapter_khz 1000}
29
30 $_TARGETNAME configure -event reset-init {
31 # switch on PLL for 200MHz operation
32 # running from 15MHz input clock
33
34 mww 0xB0000200 0x45180bb1 # CLKEN
35 mww 0xB0000204 0x00000f3c # CLKSEL
36 mww 0xB0000208 0x05007000 # CLKDIV
37 mww 0xB000020C 0x00004f24 # PLLCON0
38 mww 0xB0000210 0x00002b63 # PLLCON1
39 sleep 10
40
41 # we are now running @ 200MHz
42 # enable all openocd speed tweaks
43
44 arm7_9 dcc_downloads enable
45 arm7_9 fast_memory_access enable
46 adapter_khz 15000
47
48 # map nor flash to 0x20000000
49 # map sdram to 0x00000000
50
51 mww 0xb0001000 0x000530c1 # EBICON
52 mww 0xb0001004 0x40030084 # ROMCON
53 mww 0xb0001008 0x000010ee # SDCONF0
54 mww 0xb000100C 0x00000000 # SDCONF1
55 mww 0xb0001010 0x0000015b # SDTIME0
56 mww 0xb0001014 0x0000015b # SDTIME1
57 mww 0xb0001018 0x00000000 # EXT0CON
58 mww 0xb000101C 0x00000000 # EXT1CON
59 mww 0xb0001020 0x00000000 # EXT2CON
60 mww 0xb0001024 0x00000000 # EXT3CON
61 mww 0xb000102c 0x00ff0048 # CKSKEW
62 }

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