Documentation: fix warning "unbalanced square brackets"
[openocd.git] / tcl / chip / st / spear / quirk_no_srst.tcl
1 # SPDX-License-Identifier: GPL-2.0-or-later
2
3 # Quirks to bypass missing SRST on JTAG connector
4 # EVALSPEAr310 Rev. 2.0
5 # http://www.st.com/spear
6 #
7 # Date: 2010-08-17
8 # Author: Antonio Borneo <borneo.antonio@gmail.com>
9
10 # For boards that have JTAG SRST not connected.
11 # We use "arm9 vector_catch reset" to catch button reset event.
12
13
14 $_TARGETNAME configure -event reset-assert sp_reset_assert
15 $_TARGETNAME configure -event reset-deassert-post sp_reset_deassert_post
16
17 # keeps the name of the SPEAr target
18 global sp_target_name
19 set sp_target_name $_TARGETNAME
20
21 # Keeps the argument of "reset" command (run, init, halt).
22 global sp_reset_mode
23 set sp_reset_mode ""
24
25 # Helper procedure. Returns 0 is target is halted.
26 proc sp_is_halted {} {
27 global sp_target_name
28
29 return [expr {[string compare [$sp_target_name curstate] "halted" ] == 0}]
30 }
31
32 # wait for reset button to be pressed, causing CPU to get halted
33 proc sp_reset_deassert_post {} {
34 global sp_reset_mode
35
36 set bar(0) |
37 set bar(1) /
38 set bar(2) -
39 set bar(3) \\
40
41 poll on
42 echo "====> Press reset button on the board <===="
43 for {set i 0} { [sp_is_halted] == 0 } { set i [expr {$i + 1}]} {
44 echo -n "$bar([expr {$i & 3}])\r"
45 sleep 200
46 }
47
48 # Remove catch reset event
49 arm9 vector_catch none
50
51 # CPU is halted, but we typed "reset run" ...
52 if { [string compare $sp_reset_mode "run"] == 0 } {
53 resume
54 }
55 }
56
57 # Override reset-assert, since no SRST available
58 # Catch reset event
59 proc sp_reset_assert {} {
60 arm9 vector_catch reset
61 }
62
63 # Override default init_reset{mode} to catch parameter "mode"
64 proc init_reset {mode} {
65 global sp_reset_mode
66
67 set sp_reset_mode $mode
68
69 # We need to detect CPU get halted, so exit from halt
70 if { [sp_is_halted] } {
71 echo "Resuming CPU to detect reset"
72 resume
73 }
74
75 # Execute default init_reset{mode}
76 jtag arp_init-reset
77 }

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)