1 # SPDX-License-Identifier: GPL-2.0-or-later
3 # MDR32F9Q2I (1986ВЕ92У)
4 # http://milandr.ru/index.php?mact=Products,cntnt01,details,0&cntnt01productid=57&cntnt01returnid=68
6 source [find target/swj-dp.tcl]
8 if { [info exists CHIPNAME] } {
9 set _CHIPNAME $CHIPNAME
11 set _CHIPNAME mdr32f9q2i
14 if { [info exists ENDIAN] } {
20 # Work-area is a space in RAM used for flash programming
21 if { [info exists WORKAREASIZE] } {
22 set _WORKAREASIZE $WORKAREASIZE
24 set _WORKAREASIZE 0x8000
28 if { [info exists CPUTAPID] } {
29 set _CPUTAPID $CPUTAPID
32 set _CPUTAPID 0x4ba00477
35 set _CPUTAPID 0x2ba01477
38 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
39 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
41 set _TARGETNAME $_CHIPNAME.cpu
42 target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
44 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
46 # can't handle overlapping memory regions
47 if { [info exists IMEMORY] && [string equal $IMEMORY true] } {
48 flash bank ${_CHIPNAME}_info.flash mdr 0x08000000 0x01000 0 0 $_TARGETNAME 1 1 4
50 flash bank $_CHIPNAME.flash mdr 0x08000000 0x20000 0 0 $_TARGETNAME 0 32 4
53 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
56 adapter srst delay 100
62 # if srst is not fitted use SYSRESETREQ to
63 # perform a soft reset
64 cortex_m reset_config sysresetreq
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