2 # Texas Instruments DaVinci family: OMAPL138
4 if { [info exists CHIPNAME] } {
5 set _CHIPNAME $CHIPNAME
10 source [find target/icepick.cfg]
12 # Subsidiary TAP: ARM ETB11, with scan chain for 4K of ETM trace buffer
13 if { [info exists ETB_TAPID] } {
14 set _ETB_TAPID $ETB_TAPID
16 set _ETB_TAPID 0x2b900f0f
18 jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETB_TAPID -disable
19 jtag configure $_CHIPNAME.etb -event tap-enable \
20 "icepick_c_tapenable $_CHIPNAME.jrc 3"
22 # Subsidiary TAP: ARM926ejs with scan chains for ARM Debug, EmbeddedICE-RT, ETM.
23 if { [info exists CPU_TAPID] } {
24 set _CPU_TAPID $CPU_TAPID
26 set _CPU_TAPID 0x07926001
28 jtag newtap $_CHIPNAME arm -irlen 4 -irmask 0xf -expected-id $_CPU_TAPID -disable
29 jtag configure $_CHIPNAME.arm -event tap-enable \
30 "icepick_c_tapenable $_CHIPNAME.jrc 2"
32 # Primary TAP: ICEpick-C (JTAG route controller) and boundary scan
33 if { [info exists JRC_TAPID] } {
34 set _JRC_TAPID $JRC_TAPID
36 set _JRC_TAPID 0x0b7d102f
38 jtag newtap $_CHIPNAME jrc -irlen 6 -irmask 0x3f -expected-id $_JRC_TAPID
40 jtag configure $_CHIPNAME.jrc -event setup \
41 "jtag tapenable $_CHIPNAME.etb; jtag tapenable $_CHIPNAME.arm"
44 # GDB target: the ARM, using SRAM1 for scratch. SRAM0 (also 8K)
45 # and the ETB memory (4K) are other options, while trace is unused.
46 # Little-endian; use the OpenOCD default.
47 set _TARGETNAME $_CHIPNAME.arm
49 target create $_TARGETNAME arm926ejs -chain-position $_TARGETNAME
50 $_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 0x2000
52 # be absolutely certain the JTAG clock will work with the worst-case
53 # CLKIN = 20 MHz (best case: 30 MHz) even when no bootloader turns
54 # on the PLL and starts using it. OK to speed up after clock setup.
56 $_TARGETNAME configure -event "reset-start" { jtag_rclk 1500 }
58 arm7_9 fast_memory_access enable
59 arm7_9 dcc_downloads enable
62 etm config $_TARGETNAME 16 normal full etb
63 etb config $_TARGETNAME $_CHIPNAME.etb
65 gdb_breakpoint_override hard
Linking to existing account procedure
If you already have an account and want to add another login method
you
MUST first sign in with your existing account and
then change URL to read
https://review.openocd.org/login/?link
to get to this page again but this time it'll work for linking. Thank you.
SSH host keys fingerprints
1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=.. |
|+o.. . |
|*.o . . |
|+B . . . |
|Bo. = o S |
|Oo.+ + = |
|oB=.* = . o |
| =+=.+ + E |
|. .=o . o |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)