2 # Texas Instruments CC26x0 - ARM Cortex-M3
7 source [find target/icepick.cfg]
8 source [find target/ti-cjtag.cfg]
10 if { [info exists CHIPNAME] } {
11 set _CHIPNAME $CHIPNAME
19 if { [info exists DAP_TAPID] } {
20 set _DAP_TAPID $DAP_TAPID
22 set _DAP_TAPID 0x4BA00477
24 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
25 jtag configure $_CHIPNAME.cpu -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
28 # ICEpick-C (JTAG route controller)
30 if { [info exists JRC_TAPID] } {
31 set _JRC_TAPID $JRC_TAPID
33 set _JRC_TAPID 0x0B99A02F
35 jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
36 jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.cpu"
37 # A start sequence is needed to change from 2-pin cJTAG to 4-pin JTAG
38 jtag configure $_CHIPNAME.jrc -event post-reset "ti_cjtag_to_4pin_jtag $_CHIPNAME.jrc"
40 set _TARGETNAME $_CHIPNAME.cpu
41 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
42 target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
44 if { [info exists WORKAREASIZE] } {
45 set _WORKAREASIZE $WORKAREASIZE
47 set _WORKAREASIZE 0x4000
50 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
52 set _FLASHNAME $_CHIPNAME.flash
53 flash bank $_FLASHNAME cc26xx 0 0 0 0 $_TARGETNAME
55 reset_config srst_only
56 adapter srst delay 100
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