## SPDX-License-Identifier: BSD-3-Clause
##--------------------------------------------------------------------------
## Project Context: nanoXplore USB-JTAG Adapter Board, Spartan6
## Design Name:     NJTAG USB-JTAG Adapter FPGA source code
## Module Name:     _angie_openocd.ucf
## Target Device:   XC6SLX9-2 TQ144
## Tool versions:   ISE Webpack 13.2 -> 14.2
## Author:          Ahmed BOUDJELIDA    nanoXplore SAS
##--------------------------------------------------------------------------
# WARNING: PullUps on JTAG inputs should be enabled after configuration
# (bitgen option) since the pins are not connected.

net TRST	LOC = 'P48' ;
net TMS		LOC = 'P43' ;
net TCK		LOC = 'P44' ;
net TDI		LOC = 'P45' ;
net TDO		LOC = 'P46' ;
net SRST    LOC = 'P61' ;
net SI_TDO	LOC = 'P16' ;
net SO_TRST	LOC = 'P32' ;
net SO_TMS	LOC = 'P27' ;
net SO_TCK	LOC = 'P30' ;
net SO_TDI	LOC = 'P26' ;
net SO_SRST	LOC = 'P12' ;
net ST_0	LOC = 'P29' ;
net ST_1	LOC = 'P21' ;
net ST_2	LOC = 'P11' ;
net FTP<0>	LOC = 'P121' ;
net FTP<1>	LOC = 'P120' ;
net FTP<2>	LOC = 'P119' ;
net FTP<3>	LOC = 'P116' ;
net FTP<4>	LOC = 'P111' ;
net FTP<5>	LOC = 'P112' ;
net FTP<6>	LOC = 'P115' ;
net FTP<7>	LOC = 'P114' ;