- mb9bfxx1, /* Flash Type '1' */
- mb9bfxx2,
- mb9bfxx3,
- mb9bfxx4,
- mb9bfxx5,
- mb9bfxx6,
- mb9bfxx7,
- mb9bfxx8,
-
- mb9afxx1, /* Flash Type '2' */
- mb9afxx2,
- mb9afxx3,
- mb9afxx4,
- mb9afxx5,
- mb9afxx6,
- mb9afxx7,
- mb9afxx8,
+ MB9BFXX1, /* Flash Type '1' */
+ MB9BFXX2,
+ MB9BFXX3,
+ MB9BFXX4,
+ MB9BFXX5,
+ MB9BFXX6,
+ MB9BFXX7,
+ MB9BFXX8,
+
+ MB9AFXX1, /* Flash Type '2' */
+ MB9AFXX2,
+ MB9AFXX3,
+ MB9AFXX4,
+ MB9AFXX5,
+ MB9AFXX6,
+ MB9AFXX7,
+ MB9AFXX8,
- uint32_t u32DummyRead;
- int sector, odd;
- uint32_t u32FlashType;
- uint32_t u32FlashSeqAddress1;
- uint32_t u32FlashSeqAddress2;
+ uint32_t u32_dummy_read;
+ int odd;
+ uint32_t u32_flash_type;
+ uint32_t u32_flash_seq_address1;
+ uint32_t u32_flash_seq_address2;
struct working_area *write_algorithm;
struct reg_param reg_params[3];
struct armv7m_algorithm armv7m_info;
struct working_area *write_algorithm;
struct reg_param reg_params[3];
struct armv7m_algorithm armv7m_info;
- if (u32FlashType == fm3_flash_type1) {
- u32FlashSeqAddress1 = 0x00001550;
- u32FlashSeqAddress2 = 0x00000AA8;
- } else if (u32FlashType == fm3_flash_type2) {
- u32FlashSeqAddress1 = 0x00000AA8;
- u32FlashSeqAddress2 = 0x00000554;
+ if (u32_flash_type == FM3_FLASH_TYPE1) {
+ u32_flash_seq_address1 = 0x00001550;
+ u32_flash_seq_address2 = 0x00000AA8;
+ } else if (u32_flash_type == FM3_FLASH_TYPE2) {
+ u32_flash_seq_address1 = 0x00000AA8;
+ u32_flash_seq_address2 = 0x00000554;
/* disable HW watchdog */
retval = target_write_u32(target, 0x40011C00, 0x1ACCE551);
/* disable HW watchdog */
retval = target_write_u32(target, 0x40011C00, 0x1ACCE551);
retval = target_write_u32(target, 0x40000000, 0x0001);
if (retval != ERROR_OK)
return retval;
/* dummy read of FASZR */
retval = target_write_u32(target, 0x40000000, 0x0001);
if (retval != ERROR_OK)
return retval;
/* dummy read of FASZR */
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* u32FlashSeqAddress1 */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* u32FlashSeqAddress2 */
+ init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* u32_flash_seq_address1 */
+ init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* u32_flash_seq_address2 */
init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* offset */
/* write code buffer and use Flash sector erase code within fm3 */
init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* offset */
/* write code buffer and use Flash sector erase code within fm3 */
- buf_set_u32(reg_params[0].value, 0, 32, u32FlashSeqAddress1);
- buf_set_u32(reg_params[1].value, 0, 32, u32FlashSeqAddress2);
+ buf_set_u32(reg_params[0].value, 0, 32, u32_flash_seq_address1);
+ buf_set_u32(reg_params[1].value, 0, 32, u32_flash_seq_address2);
buf_set_u32(reg_params[2].value, 0, 32, offset);
retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
buf_set_u32(reg_params[2].value, 0, 32, offset);
retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
- uint32_t u32FlashType;
- uint32_t u32FlashSeqAddress1;
- uint32_t u32FlashSeqAddress2;
+ uint32_t u32_flash_type;
+ uint32_t u32_flash_seq_address1;
+ uint32_t u32_flash_seq_address2;
/* Increase buffer_size if needed */
if (buffer_size < (target->working_area_size / 2))
buffer_size = (target->working_area_size / 2);
/* Increase buffer_size if needed */
if (buffer_size < (target->working_area_size / 2))
buffer_size = (target->working_area_size / 2);
- if (u32FlashType == fm3_flash_type1) {
- u32FlashSeqAddress1 = 0x00001550;
- u32FlashSeqAddress2 = 0x00000AA8;
- } else if (u32FlashType == fm3_flash_type2) {
- u32FlashSeqAddress1 = 0x00000AA8;
- u32FlashSeqAddress2 = 0x00000554;
+ if (u32_flash_type == FM3_FLASH_TYPE1) {
+ u32_flash_seq_address1 = 0x00001550;
+ u32_flash_seq_address2 = 0x00000AA8;
+ } else if (u32_flash_type == FM3_FLASH_TYPE2) {
+ u32_flash_seq_address1 = 0x00000AA8;
+ u32_flash_seq_address2 = 0x00000554;
0x55, 0xF0, 0x01, 0x05, /* ORRS.W R5, R5, #1 */
0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */
0x35, 0x60, /* STR R5, [R6] */
0x55, 0xF0, 0x01, 0x05, /* ORRS.W R5, R5, #1 */
0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */
0x35, 0x60, /* STR R5, [R6] */
- /* u32DummyRead = fm3_FLASH_IF->FASZ; */
- 0x28, 0x4D, /* LDR.N R5, ??u32DummyRead */
+ /* u32_dummy_read = fm3_FLASH_IF->FASZ; */
+ 0x28, 0x4D, /* LDR.N R5, ??u32_dummy_read */
0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */
0x36, 0x68, /* LDR R6, [R6] */
0x2E, 0x60, /* STR R6, [R5] */
0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */
0x36, 0x68, /* LDR R6, [R6] */
0x2E, 0x60, /* STR R6, [R5] */
0x55, 0xF0, 0x02, 0x05, /* ORRS.W R5, R5, #2 */
0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */
0x35, 0x60, /* STR R5, [R6] */
0x55, 0xF0, 0x02, 0x05, /* ORRS.W R5, R5, #2 */
0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */
0x35, 0x60, /* STR R5, [R6] */
- /* u32DummyRead = fm3_FLASH_IF->FASZ; */
- 0x04, 0x4D, /* LDR.N R5, ??u32DummyRead */
+ /* u32_dummy_read = fm3_FLASH_IF->FASZ; */
+ 0x04, 0x4D, /* LDR.N R5, ??u32_dummy_read */
0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */
0x36, 0x68, /* LDR R6, [R6] */
0x2E, 0x60, /* STR R6, [R5] */
0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */
0x36, 0x68, /* LDR R6, [R6] */
0x2E, 0x60, /* STR R6, [R5] */
/* SRAM basic-address + 8.These address pointers will be patched, if a */
/* different start address in RAM is used (e.g. for Flash type 2)! */
/* Default SRAM basic-address is 0x20000000. */
/* SRAM basic-address + 8.These address pointers will be patched, if a */
/* different start address in RAM is used (e.g. for Flash type 2)! */
/* Default SRAM basic-address is 0x20000000. */
- 0x00, 0x00, 0x00, 0x20, /* u32DummyRead address in RAM (0x20000000) */
+ 0x00, 0x00, 0x00, 0x20, /* u32_dummy_read address in RAM (0x20000000) */
0x04, 0x00, 0x00, 0x20 /* u32FlashResult address in RAM (0x20000004) */
};
0x04, 0x00, 0x00, 0x20 /* u32FlashResult address in RAM (0x20000004) */
};
retval = target_write_u32(target, (write_algorithm->address + 8)
+ sizeof(fm3_flash_write_code) - 8, (write_algorithm->address));
if (retval != ERROR_OK)
retval = target_write_u32(target, (write_algorithm->address + 8)
+ sizeof(fm3_flash_write_code) - 8, (write_algorithm->address));
if (retval != ERROR_OK)
buf_set_u32(reg_params[0].value, 0, 32, source->address);
buf_set_u32(reg_params[1].value, 0, 32, address);
buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
buf_set_u32(reg_params[0].value, 0, 32, source->address);
buf_set_u32(reg_params[1].value, 0, 32, address);
buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
- buf_set_u32(reg_params[3].value, 0, 32, u32FlashSeqAddress1);
- buf_set_u32(reg_params[4].value, 0, 32, u32FlashSeqAddress2);
+ buf_set_u32(reg_params[3].value, 0, 32, u32_flash_seq_address1);
+ buf_set_u32(reg_params[4].value, 0, 32, u32_flash_seq_address2);
retval = target_run_algorithm(target, 0, NULL, 6, reg_params,
(write_algorithm->address + 8), 0, 1000, &armv7m_info);
retval = target_run_algorithm(target, 0, NULL, 6, reg_params,
(write_algorithm->address + 8), 0, 1000, &armv7m_info);
- if ((fm3_info->variant == mb9bfxx2)
- || (fm3_info->variant == mb9bfxx4)
- || (fm3_info->variant == mb9bfxx5)
- || (fm3_info->variant == mb9bfxx6)
- || (fm3_info->variant == mb9bfxx7)
- || (fm3_info->variant == mb9bfxx8)
- || (fm3_info->variant == mb9afxx2)
- || (fm3_info->variant == mb9afxx4)
- || (fm3_info->variant == mb9afxx5)
- || (fm3_info->variant == mb9afxx6)
- || (fm3_info->variant == mb9afxx7)
- || (fm3_info->variant == mb9afxx8)) {
+ if ((fm3_info->variant == MB9BFXX2)
+ || (fm3_info->variant == MB9BFXX4)
+ || (fm3_info->variant == MB9BFXX5)
+ || (fm3_info->variant == MB9BFXX6)
+ || (fm3_info->variant == MB9BFXX7)
+ || (fm3_info->variant == MB9BFXX8)
+ || (fm3_info->variant == MB9AFXX2)
+ || (fm3_info->variant == MB9AFXX4)
+ || (fm3_info->variant == MB9AFXX5)
+ || (fm3_info->variant == MB9AFXX6)
+ || (fm3_info->variant == MB9AFXX7)
+ || (fm3_info->variant == MB9AFXX8)) {
- if ((fm3_info->variant == mb9bfxx4)
- || (fm3_info->variant == mb9bfxx5)
- || (fm3_info->variant == mb9bfxx6)
- || (fm3_info->variant == mb9bfxx7)
- || (fm3_info->variant == mb9bfxx8)
- || (fm3_info->variant == mb9afxx4)
- || (fm3_info->variant == mb9afxx5)
- || (fm3_info->variant == mb9afxx6)
- || (fm3_info->variant == mb9afxx7)
- || (fm3_info->variant == mb9afxx8)) {
+ if ((fm3_info->variant == MB9BFXX4)
+ || (fm3_info->variant == MB9BFXX5)
+ || (fm3_info->variant == MB9BFXX6)
+ || (fm3_info->variant == MB9BFXX7)
+ || (fm3_info->variant == MB9BFXX8)
+ || (fm3_info->variant == MB9AFXX4)
+ || (fm3_info->variant == MB9AFXX5)
+ || (fm3_info->variant == MB9AFXX6)
+ || (fm3_info->variant == MB9AFXX7)
+ || (fm3_info->variant == MB9AFXX8)) {
- if ((fm3_info->variant == mb9bfxx5)
- || (fm3_info->variant == mb9bfxx6)
- || (fm3_info->variant == mb9bfxx7)
- || (fm3_info->variant == mb9bfxx8)
- || (fm3_info->variant == mb9afxx5)
- || (fm3_info->variant == mb9afxx6)
- || (fm3_info->variant == mb9afxx7)
- || (fm3_info->variant == mb9afxx8)) {
+ if ((fm3_info->variant == MB9BFXX5)
+ || (fm3_info->variant == MB9BFXX6)
+ || (fm3_info->variant == MB9BFXX7)
+ || (fm3_info->variant == MB9BFXX8)
+ || (fm3_info->variant == MB9AFXX5)
+ || (fm3_info->variant == MB9AFXX6)
+ || (fm3_info->variant == MB9AFXX7)
+ || (fm3_info->variant == MB9AFXX8)) {
- if ((fm3_info->variant == mb9bfxx6)
- || (fm3_info->variant == mb9bfxx7)
- || (fm3_info->variant == mb9bfxx8)
- || (fm3_info->variant == mb9afxx6)
- || (fm3_info->variant == mb9afxx7)
- || (fm3_info->variant == mb9afxx8)) {
+ if ((fm3_info->variant == MB9BFXX6)
+ || (fm3_info->variant == MB9BFXX7)
+ || (fm3_info->variant == MB9BFXX8)
+ || (fm3_info->variant == MB9AFXX6)
+ || (fm3_info->variant == MB9AFXX7)
+ || (fm3_info->variant == MB9AFXX8)) {
- if ((fm3_info->variant == mb9bfxx7)
- || (fm3_info->variant == mb9bfxx8)
- || (fm3_info->variant == mb9afxx7)
- || (fm3_info->variant == mb9afxx8)) {
+ if ((fm3_info->variant == MB9BFXX7)
+ || (fm3_info->variant == MB9BFXX8)
+ || (fm3_info->variant == MB9AFXX7)
+ || (fm3_info->variant == MB9AFXX8)) {
- uint32_t u32DummyRead;
- uint32_t u32FlashType;
- uint32_t u32FlashSeqAddress1;
- uint32_t u32FlashSeqAddress2;
+ uint32_t u32_dummy_read;
+ uint32_t u32_flash_type;
+ uint32_t u32_flash_seq_address1;
+ uint32_t u32_flash_seq_address2;
struct working_area *write_algorithm;
struct reg_param reg_params[3];
struct armv7m_algorithm armv7m_info;
struct working_area *write_algorithm;
struct reg_param reg_params[3];
struct armv7m_algorithm armv7m_info;
- u32FlashSeqAddress1 = 0x00001550;
- u32FlashSeqAddress2 = 0x00000AA8;
- } else if (u32FlashType == fm3_flash_type2) {
+ u32_flash_seq_address1 = 0x00001550;
+ u32_flash_seq_address2 = 0x00000AA8;
+ } else if (u32_flash_type == FM3_FLASH_TYPE2) {
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* u32FlashSeqAddress1 */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* u32FlashSeqAddress2 */
+ init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* u32_flash_seq_address1 */
+ init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* u32_flash_seq_address2 */
- buf_set_u32(reg_params[0].value, 0, 32, u32FlashSeqAddress1);
- buf_set_u32(reg_params[1].value, 0, 32, u32FlashSeqAddress2);
+ buf_set_u32(reg_params[0].value, 0, 32, u32_flash_seq_address1);
+ buf_set_u32(reg_params[1].value, 0, 32, u32_flash_seq_address2);
retval = target_run_algorithm(target, 0, NULL, 2, reg_params,
write_algorithm->address, 0, 100000, &armv7m_info);
retval = target_run_algorithm(target, 0, NULL, 2, reg_params,
write_algorithm->address, 0, 100000, &armv7m_info);
if (CMD_ARGC < 1)
return ERROR_COMMAND_SYNTAX_ERROR;
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (CMD_ARGC < 1)
return ERROR_COMMAND_SYNTAX_ERROR;
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- /* set all sectors as erased */
- for (i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_erased = 1;
-
- command_print(CMD_CTX, "fm3 chip erase complete");
+ command_print(CMD, "fm3 chip erase complete");