- int (*init)(uint8_t trn);
-
-
- /**
- * Synchronous read of an AP or DP register.
- *
- * @param cmd with APnDP/RnW/addr/parity bits
- * @param where to store value to read from register
- *
- * @return SWD_ACK_* code for the transaction
- * or (negative) fault code
- */
- int (*read_reg)(uint8_t cmd, uint32_t *value);
-
- /**
- * Synchronous write of an AP or DP register.
- *
- * @param cmd with APnDP/RnW/addr/parity bits
- * @param value to be written to the register
- *
- * @return SWD_ACK_* code for the transaction
- * or (negative) fault code
- */
- int (*write_reg)(uint8_t cmd, uint32_t value);
-
- /**
- * Synchronous block read of an AP or DP register.
- *
- * @param cmd with APnDP/RnW/addr/parity bits
- * @param number of reads from register to be executed
- * @param buffer to store data read from register
- *
- * @return SWD_ACK_* code for the transaction
- * or (negative) fault code
- */
- int (*read_block)(uint8_t cmd, uint32_t blocksize, uint8_t *buffer);
+ int (*init)(void);
+
+ /**
+ * Set the SWCLK frequency of the SWD link.
+ *
+ * The driver should round the desired value, downwards if possible, to
+ * the nearest supported frequency. A negative value should be ignored
+ * and can be used to query the current setting. If the driver does not
+ * support a variable frequency a fixed, nominal, value should be
+ * returned.
+ *
+ * If the frequency is increased, it must not apply before the currently
+ * queued transactions are executed. If the frequency is lowered, it may
+ * apply immediately.
+ *
+ * @param dap The DAP controlled by the SWD link.
+ * @param hz The desired frequency in Hz.
+ * @return The actual resulting frequency after rounding.
+ */
+ int_least32_t (*frequency)(struct adiv5_dap *dap, int_least32_t hz);
+
+ /**
+ * Queue a special SWDIO sequence.
+ *
+ * @param dap The DAP controlled by the SWD link.
+ * @param seq The special sequence to generate.
+ * @return ERROR_OK if the sequence was queued, negative error if the
+ * sequence is unsupported.
+ */
+ int (*switch_seq)(struct adiv5_dap *dap, enum swd_special_seq seq);
+
+ /**
+ * Queued read of an AP or DP register.
+ *
+ * @param dap The DAP controlled by the SWD link.
+ * @param Command byte with APnDP/RnW/addr/parity bits
+ * @param Where to store value to read from register
+ */
+ void (*read_reg)(struct adiv5_dap *dap, uint8_t cmd, uint32_t *value);
+
+ /**
+ * Queued write of an AP or DP register.
+ *
+ * @param dap The DAP controlled by the SWD link.
+ * @param Command byte with APnDP/RnW/addr/parity bits
+ * @param Value to be written to the register
+ */
+ void (*write_reg)(struct adiv5_dap *dap, uint8_t cmd, uint32_t value);
+
+ /**
+ * Execute any queued transactions and collect the result.
+ *
+ * @param dap The DAP controlled by the SWD link.
+ * @return ERROR_OK on success, Ack response code on WAIT/FAULT
+ * or negative error code on other kinds of failure.
+ */
+ int (*run)(struct adiv5_dap *dap);