-typedef enum armv4_5_mode
-{
- ARMV4_5_MODE_USR = 16,
- ARMV4_5_MODE_FIQ = 17,
- ARMV4_5_MODE_IRQ = 18,
- ARMV4_5_MODE_SVC = 19,
- ARMV4_5_MODE_ABT = 23,
- ARMV4_5_MODE_UND = 27,
- ARMV4_5_MODE_SYS = 31,
- ARMV4_5_MODE_ANY = -1
-} armv4_5_mode_t;
-
-extern char** armv4_5_mode_strings;
-
-typedef enum armv4_5_state
-{
- ARMV4_5_STATE_ARM,
- ARMV4_5_STATE_THUMB,
- ARMV4_5_STATE_JAZELLE,
-} armv4_5_state_t;
-
-extern char* armv4_5_state_strings[];
-
-extern int armv4_5_core_reg_map[7][17];
-
-#define ARMV4_5_CORE_REG_MODE(cache, mode, num) \
- cache->reg_list[armv4_5_core_reg_map[armv4_5_mode_to_number(mode)][num]]
-#define ARMV4_5_CORE_REG_MODENUM(cache, mode, num) \
- cache->reg_list[armv4_5_core_reg_map[mode][num]]
-
-/* offsets into armv4_5 core register cache */
-enum
-{
- ARMV4_5_CPSR = 31,
- ARMV4_5_SPSR_FIQ = 32,
- ARMV4_5_SPSR_IRQ = 33,
- ARMV4_5_SPSR_SVC = 34,
- ARMV4_5_SPSR_ABT = 35,
- ARMV4_5_SPSR_UND = 36
-};
-
-#define ARMV4_5_COMMON_MAGIC 0x0A450A45
-
-/* NOTE: this is being morphed into a generic toplevel holder for ARMs. */
-#define armv4_5_common_s arm
-
-/**
- * Represents a generic ARM core, with standard application registers.
- *
- * There are sixteen application registers (including PC, SP, LR) and a PSR.
- * Cortex-M series cores do not support as many core states or shadowed
- * registers as traditional ARM cores, and only support Thumb2 instructions.
- */
-struct arm
-{
- int common_magic;
- struct reg_cache *core_cache;
-
- int /* armv4_5_mode */ core_mode;
- enum armv4_5_state core_state;
-
- /** Flag reporting unavailability of the BKPT instruction. */
- bool is_armv4;
-
- /** Handle for the Embedded Trace Module, if one is present. */
- struct etm_context *etm;
-
- int (*full_context)(struct target *target);
- int (*read_core_reg)(struct target *target,
- int num, enum armv4_5_mode mode);
- int (*write_core_reg)(struct target *target,
- int num, enum armv4_5_mode mode, uint32_t value);
- void *arch_info;
-};
-
-#define target_to_armv4_5 target_to_arm
-
-/** Convert target handle to generic ARM target state handle. */
-static inline struct arm *target_to_arm(struct target *target)
-{
- return target->arch_info;
-}
-
-static inline bool is_arm(struct arm *arm)
-{
- return arm && arm->common_magic == ARMV4_5_COMMON_MAGIC;
-}
-
-struct armv4_5_algorithm
-{
- int common_magic;
-
- enum armv4_5_mode core_mode;
- enum armv4_5_state core_state;
-};
-
-struct armv4_5_core_reg
-{
- int num;
- enum armv4_5_mode mode;
- struct target *target;
- struct arm *armv4_5_common;
-};
-
-struct reg_cache* armv4_5_build_reg_cache(struct target *target,
- struct arm *armv4_5_common);
-
-/* map psr mode bits to linear number */
-static __inline int armv4_5_mode_to_number(enum armv4_5_mode mode)
-{
- switch (mode)
- {
- case ARMV4_5_MODE_USR: return 0; break;
- case ARMV4_5_MODE_FIQ: return 1; break;
- case ARMV4_5_MODE_IRQ: return 2; break;
- case ARMV4_5_MODE_SVC: return 3; break;
- case ARMV4_5_MODE_ABT: return 4; break;
- case ARMV4_5_MODE_UND: return 5; break;
- case ARMV4_5_MODE_SYS: return 6; break;
- case ARMV4_5_MODE_ANY: return 0; break; /* map MODE_ANY to user mode */
- default:
- LOG_ERROR("invalid mode value encountered %d", mode);
- return -1;
- }
-}
-
-/* map linear number to mode bits */
-static __inline enum armv4_5_mode armv4_5_number_to_mode(int number)
-{
- switch (number)
- {
- case 0: return ARMV4_5_MODE_USR; break;
- case 1: return ARMV4_5_MODE_FIQ; break;
- case 2: return ARMV4_5_MODE_IRQ; break;
- case 3: return ARMV4_5_MODE_SVC; break;
- case 4: return ARMV4_5_MODE_ABT; break;
- case 5: return ARMV4_5_MODE_UND; break;
- case 6: return ARMV4_5_MODE_SYS; break;
- default:
- LOG_ERROR("mode index out of bounds %d", number);
- return ARMV4_5_MODE_ANY;
- }
-};
-
-int armv4_5_arch_state(struct target *target);
-int armv4_5_get_gdb_reg_list(struct target *target,
- struct reg **reg_list[], int *reg_list_size);
-
-int armv4_5_register_commands(struct command_context *cmd_ctx);
-int armv4_5_init_arch_info(struct target *target, struct arm *armv4_5);
-
-int armv4_5_run_algorithm(struct target *target,
- int num_mem_params, struct mem_param *mem_params,
- int num_reg_params, struct reg_param *reg_params,
- uint32_t entry_point, uint32_t exit_point,
- int timeout_ms, void *arch_info);
-
-int armv4_5_invalidate_core_regs(struct target *target);
-
-int arm_checksum_memory(struct target *target,
- uint32_t address, uint32_t count, uint32_t *checksum);
-int arm_blank_check_memory(struct target *target,
- uint32_t address, uint32_t count, uint32_t *blank);
-
-
-/* ARM mode instructions