+#define TIME_DIV_FREESCALE 0.3
+/**
+ * Puts the core into debug mode, enabling the EOnCE module.
+ *
+ * @param target
+ * @param eonce_status Data read from the EOnCE status register.
+ *
+ * @return
+ */
+static int eonce_enter_debug_mode(struct target * target, uint16_t * eonce_status){
+ int retval = ERROR_OK;
+ uint32_t instr = JTAG_INSTR_DEBUG_REQUEST;
+ uint32_t ir_out;//not used, just to make jtag happy.
+ uint16_t instr_16;
+ uint16_t read_16;
+
+ // First try the easy way
+ retval = eonce_enter_debug_mode_without_reset(target,eonce_status);
+ if(retval == ERROR_OK)
+ return retval;
+
+ struct jtag_tap * tap_chp;
+ struct jtag_tap * tap_cpu;
+ tap_chp = jtag_tap_by_string("dsp568013.chp");
+ if(tap_chp == NULL){
+ retval = ERROR_FAIL;
+ err_check(retval,"Failed to get master tap.");
+ }
+ tap_cpu = jtag_tap_by_string("dsp568013.cpu");
+ if(tap_cpu == NULL){
+ retval = ERROR_FAIL;
+ err_check(retval,"Failed to get master tap.");
+ }
+
+ // Enable master tap
+ tap_chp->enabled = true;
+ tap_cpu->enabled = false;
+
+ instr = MASTER_TAP_CMD_IDCODE;
+ retval = dsp5680xx_irscan(target, & instr, & ir_out,DSP5680XX_JTAG_MASTER_TAP_IRLEN);
+ err_check_propagate(retval);
+ usleep(TIME_DIV_FREESCALE*100*1000);
+
+ // Enable EOnCE module
+ jtag_add_reset(0,1);
+ usleep(TIME_DIV_FREESCALE*200*1000);
+ instr = 0x0606ffff;// This was selected experimentally.
+ retval = dsp5680xx_drscan(target,(uint8_t *) & instr,(uint8_t *) & ir_out,32);
+ err_check_propagate(retval);
+ // ir_out now hold tap idcode
+
+ // Enable core tap
+ tap_chp->enabled = true;
+ retval = switch_tap(target,tap_chp,tap_cpu);
+ err_check_propagate(retval);
+
+ instr = JTAG_INSTR_ENABLE_ONCE;
+ //Two rounds of jtag 0x6 (enable eonce) to enable EOnCE.
+ retval = dsp5680xx_irscan(target, & instr, & ir_out,DSP5680XX_JTAG_CORE_TAP_IRLEN);
+ err_check_propagate(retval);
+ instr = JTAG_INSTR_DEBUG_REQUEST;
+ retval = dsp5680xx_irscan(target, & instr, & ir_out,DSP5680XX_JTAG_CORE_TAP_IRLEN);
+ err_check_propagate(retval);
+ instr_16 = 0x1;
+ retval = dsp5680xx_drscan(target,(uint8_t *) & instr_16,(uint8_t *) & read_16,8);
+ instr_16 = 0x20;
+ retval = dsp5680xx_drscan(target,(uint8_t *) & instr_16,(uint8_t *) & read_16,8);
+ usleep(TIME_DIV_FREESCALE*100*1000);
+ jtag_add_reset(0,0);
+ usleep(TIME_DIV_FREESCALE*300*1000);
+
+ instr = JTAG_INSTR_ENABLE_ONCE;
+ //Two rounds of jtag 0x6 (enable eonce) to enable EOnCE.
+ for(int i = 0; i<3; i++){
+ retval = dsp5680xx_irscan(target, & instr, & ir_out,DSP5680XX_JTAG_CORE_TAP_IRLEN);
+ err_check_propagate(retval);
+ }
+
+ for(int i = 0; i<3; i++){
+ instr_16 = 0x86;
+ dsp5680xx_drscan(target,(uint8_t *) & instr_16,(uint8_t *) & read_16,16);
+ instr_16 = 0xff;
+ dsp5680xx_drscan(target,(uint8_t *) & instr_16,(uint8_t *) & read_16,16);
+ }
+
+ // Verify that debug mode is enabled
+ uint16_t data_read_from_dr;
+ retval = eonce_read_status_reg(target,&data_read_from_dr);
+ err_check_propagate(retval);
+ if((data_read_from_dr&0x30) == 0x30){
+ LOG_DEBUG("EOnCE successfully entered debug mode.");
+ target->state = TARGET_HALTED;
+ retval = ERROR_OK;
+ }else{
+ LOG_DEBUG("Failed to set EOnCE module to debug mode.");
+ retval = ERROR_TARGET_FAILURE;
+ }
+ if(eonce_status!=NULL)
+ *eonce_status = data_read_from_dr;
+ return retval;
+}
+
+/**