Code Review / openocd.git / blobdiff
? search:
summary | shortlog | log | commit | commitdiff | review | tree
raw | inline | side by side
Rick Altherr <kc8apf@kc8apf.net> - fix flash write_bank output.
[openocd.git] / src / flash / cfi.c
diff --git a/src/flash/cfi.c b/src/flash/cfi.c
index 5f64e1161b3bcfa78e5dd5cfc0941688bfb82faa..be5bfb7d37915721bf3df185e9cb3c6f0a9c74ee 100644 (file)
--- a/src/flash/cfi.c
+++ b/src/flash/cfi.c
@@ -96,6 +96,7 @@ cfi_fixup_t cfi_jedec_fixups[] = {
        {CFI_MFR_FUJITSU, 0x226b, cfi_fixup_non_cfi, NULL},
        {CFI_MFR_AMIC, 0xb31a, cfi_fixup_non_cfi, NULL},
        {CFI_MFR_MX, 0x225b, cfi_fixup_non_cfi, NULL},
+       {CFI_MFR_AMD, 0x225b, cfi_fixup_non_cfi, NULL},
        {0, 0, NULL, NULL}
 };
 
@@ -110,6 +111,7 @@ cfi_fixup_t cfi_0002_fixups[] = {
        {CFI_MFR_FUJITSU, 0x226b, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
        {CFI_MFR_AMIC, 0xb31a, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]},
        {CFI_MFR_MX, 0x225b, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]},
+       {CFI_MFR_AMD, 0x225b, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]},
        {CFI_MFR_ANY, CFI_ID_ANY, cfi_fixup_0002_erase_regions, NULL},
        {0, 0, NULL, NULL}
 };
@@ -273,7 +275,7 @@ u8 cfi_intel_wait_status_busy(flash_bank_t *bank, int timeout)
        while ((!((status = cfi_get_u8(bank, 0, 0x0)) & 0x80)) && (timeout-- > 0))
        {
                LOG_DEBUG("status: 0x%x", status);
-               usleep(1000);
+               alive_sleep(1);
        }
 
        /* mask out bit 0 (reserved) */
@@ -333,7 +335,7 @@ int cfi_spansion_wait_status_busy(flash_bank_t *bank, int timeout)
                }
 
                oldstatus = status;
-               usleep(1000);
+               alive_sleep(1);
        } while (timeout-- > 0);
 
        LOG_ERROR("timeout, status: 0x%x", status);
@@ -343,6 +345,7 @@ int cfi_spansion_wait_status_busy(flash_bank_t *bank, int timeout)
 
 int cfi_read_intel_pri_ext(flash_bank_t *bank)
 {
+       int retval;
        cfi_flash_bank_t *cfi_info = bank->driver_priv;
        cfi_intel_pri_ext_t *pri_ext = malloc(sizeof(cfi_intel_pri_ext_t));
        target_t *target = bank->target;
@@ -357,9 +360,15 @@ int cfi_read_intel_pri_ext(flash_bank_t *bank)
        if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I'))
        {
                cfi_command(bank, 0xf0, command);
-               target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
                cfi_command(bank, 0xff, command);
-               target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
                LOG_ERROR("Could not read bank flash bank information");
                return ERROR_FLASH_BANK_INVALID;
        }
@@ -399,6 +408,7 @@ int cfi_read_intel_pri_ext(flash_bank_t *bank)
 
 int cfi_read_spansion_pri_ext(flash_bank_t *bank)
 {
+       int retval;
        cfi_flash_bank_t *cfi_info = bank->driver_priv;
        cfi_spansion_pri_ext_t *pri_ext = malloc(sizeof(cfi_spansion_pri_ext_t));
        target_t *target = bank->target;
@@ -413,7 +423,10 @@ int cfi_read_spansion_pri_ext(flash_bank_t *bank)
        if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I'))
        {
                cfi_command(bank, 0xf0, command);
-               target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
                LOG_ERROR("Could not read spansion bank information");
                return ERROR_FLASH_BANK_INVALID;
        }
@@ -460,6 +473,7 @@ int cfi_read_spansion_pri_ext(flash_bank_t *bank)
 
 int cfi_read_atmel_pri_ext(flash_bank_t *bank)
 {
+       int retval;
        cfi_atmel_pri_ext_t atmel_pri_ext;
        cfi_flash_bank_t *cfi_info = bank->driver_priv;
        cfi_spansion_pri_ext_t *pri_ext = malloc(sizeof(cfi_spansion_pri_ext_t));
@@ -482,7 +496,10 @@ int cfi_read_atmel_pri_ext(flash_bank_t *bank)
        if ((atmel_pri_ext.pri[0] != 'P') || (atmel_pri_ext.pri[1] != 'R') || (atmel_pri_ext.pri[2] != 'I'))
        {
                cfi_command(bank, 0xf0, command);
-               target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
                LOG_ERROR("Could not read atmel bank information");
                return ERROR_FLASH_BANK_INVALID;
        }
@@ -662,6 +679,7 @@ int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **
 
 int cfi_intel_erase(struct flash_bank_s *bank, int first, int last)
 {
+       int retval;
        cfi_flash_bank_t *cfi_info = bank->driver_priv;
        target_t *target = bank->target;
        u8 command[8];
@@ -672,17 +690,26 @@ int cfi_intel_erase(struct flash_bank_s *bank, int first, int last)
        for (i = first; i <= last; i++)
        {
                cfi_command(bank, 0x20, command);
-               target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
 
                cfi_command(bank, 0xd0, command);
-               target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
 
                if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->block_erase_timeout_typ)) == 0x80)
                        bank->sectors[i].is_erased = 1;
                else
                {
                        cfi_command(bank, 0xff, command);
-                       target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
+                       if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+                       {
+                               return retval;
+                       }
 
                        LOG_ERROR("couldn't erase block %i of flash bank at base 0x%x", i, bank->base);
                        return ERROR_FLASH_OPERATION_FAILED;
@@ -690,13 +717,13 @@ int cfi_intel_erase(struct flash_bank_s *bank, int first, int last)
        }
 
        cfi_command(bank, 0xff, command);
-       target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
+       return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
 
-       return ERROR_OK;
 }
 
 int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last)
 {
+       int retval;
        cfi_flash_bank_t *cfi_info = bank->driver_priv;
        cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
        target_t *target = bank->target;
@@ -706,29 +733,50 @@ int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last)
        for (i = first; i <= last; i++)
        {
                cfi_command(bank, 0xaa, command);
-               target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
 
                cfi_command(bank, 0x55, command);
-               target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
 
                cfi_command(bank, 0x80, command);
-               target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
 
                cfi_command(bank, 0xaa, command);
-               target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
 
                cfi_command(bank, 0x55, command);
-               target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
 
                cfi_command(bank, 0x30, command);
-               target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
 
                if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->block_erase_timeout_typ)) == ERROR_OK)
                        bank->sectors[i].is_erased = 1;
                else
                {
                        cfi_command(bank, 0xf0, command);
-                       target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
+                       if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+                       {
+                               return retval;
+                       }
 
                        LOG_ERROR("couldn't erase block %i of flash bank at base 0x%x", i, bank->base);
                        return ERROR_FLASH_OPERATION_FAILED;
@@ -736,9 +784,7 @@ int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last)
        }
 
        cfi_command(bank, 0xf0, command);
-       target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
-
-       return ERROR_OK;
+       return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
 }
 
 int cfi_erase(struct flash_bank_s *bank, int first, int last)
@@ -747,6 +793,7 @@ int cfi_erase(struct flash_bank_s *bank, int first, int last)
 
        if (bank->target->state != TARGET_HALTED)
        {
+               LOG_ERROR("Target not halted");
                return ERROR_TARGET_NOT_HALTED;
        }
 
@@ -777,6 +824,7 @@ int cfi_erase(struct flash_bank_s *bank, int first, int last)
 
 int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last)
 {
+       int retval;
        cfi_flash_bank_t *cfi_info = bank->driver_priv;
        cfi_intel_pri_ext_t *pri_ext = cfi_info->pri_ext;
        target_t *target = bank->target;
@@ -796,19 +844,28 @@ int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last)
        {
                cfi_command(bank, 0x60, command);
                LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
-               target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
                if (set)
                {
                        cfi_command(bank, 0x01, command);
                        LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
-                       target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command);
+                       if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+                       {
+                               return retval;
+                       }
                        bank->sectors[i].is_protected = 1;
                }
                else
                {
                        cfi_command(bank, 0xd0, command);
                        LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
-                       target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command);
+                       if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+                       {
+                               return retval;
+                       }
                        bank->sectors[i].is_protected = 0;
                }
 
@@ -823,14 +880,20 @@ int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last)
                        u8 block_status;
                        /* read block lock bit, to verify status */
                        cfi_command(bank, 0x90, command);
-                       target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command);
+                       if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
+                       {
+                               return retval;
+                       }
                        block_status = cfi_get_u8(bank, i, 0x2);
 
                        if ((block_status & 0x1) != set)
                        {
                                LOG_ERROR("couldn't change block lock status (set = %i, block_status = 0x%2.2x)", set, block_status);
                                cfi_command(bank, 0x70, command);
-                               target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command);
+                               if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
+                               {
+                                       return retval;
+                               }
                                cfi_intel_wait_status_busy(bank, 10);
 
                                if (retry > 10)
@@ -856,10 +919,16 @@ int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last)
                                cfi_intel_clear_status_register(bank);
 
                                cfi_command(bank, 0x60, command);
-                               target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command);
+                               if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+                               {
+                                       return retval;
+                               }
 
                                cfi_command(bank, 0x01, command);
-                               target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command);
+                               if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+                               {
+                                       return retval;
+                               }
 
                                cfi_intel_wait_status_busy(bank, 100);
                        }
@@ -867,9 +936,7 @@ int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last)
        }
 
        cfi_command(bank, 0xff, command);
-       target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
-
-       return ERROR_OK;
+       return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
 }
 
 int cfi_protect(struct flash_bank_s *bank, int set, int first, int last)
@@ -878,6 +945,7 @@ int cfi_protect(struct flash_bank_s *bank, int set, int first, int last)
 
        if (bank->target->state != TARGET_HALTED)
        {
+               LOG_ERROR("Target not halted");
                return ERROR_TARGET_NOT_HALTED;
        }
 
@@ -1145,7 +1213,10 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3
                u32 thisrun_count = (count > buffer_size) ? buffer_size : count;
                u32 wsm_error;
 
-               target_write_buffer(target, source->address, thisrun_count, buffer);
+               if((retval = target_write_buffer(target, source->address, thisrun_count, buffer)) != ERROR_OK)
+               {
+                       goto cleanup;
+               }
 
                buf_set_u32(reg_params[0].value, 0, 32, source->address);
                buf_set_u32(reg_params[1].value, 0, 32, address);
@@ -1224,7 +1295,7 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address,
        working_area_t *source;
        u32 buffer_size = 32768;
        u32 status;
-       int retval;
+       int retval, retvaltemp;
        int exit_code = ERROR_OK;
 
        /* input parameters - */
@@ -1383,11 +1454,18 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address,
                retval=target_alloc_working_area(target, target_code_size,
                                &cfi_info->write_algorithm);
                if (retval != ERROR_OK)
+               {
+                       free(target_code);
                        return retval;
+               }
 
                /* write algorithm code to working area */
-               target_write_buffer(target, cfi_info->write_algorithm->address,
-                                   target_code_size, target_code);
+               if((retval = target_write_buffer(target, cfi_info->write_algorithm->address,
+                                   target_code_size, target_code)) != ERROR_OK)
+               {
+                       free(target_code);
+                       return retval;
+               }
 
                free(target_code);
        }
@@ -1422,7 +1500,7 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address,
        {
                u32 thisrun_count = (count > buffer_size) ? buffer_size : count;
 
-               target_write_buffer(target, source->address, thisrun_count, buffer);
+               retvaltemp = target_write_buffer(target, source->address, thisrun_count, buffer);
 
                buf_set_u32(reg_params[0].value, 0, 32, source->address);
                buf_set_u32(reg_params[1].value, 0, 32, address);
@@ -1441,7 +1519,7 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address,
 
                status = buf_get_u32(reg_params[5].value, 0, 32);
 
-               if ((retval != ERROR_OK) || status != 0x80)
+               if ((retval != ERROR_OK) || (retvaltemp != ERROR_OK) || status != 0x80)
                {
                        LOG_DEBUG("status: 0x%x", status);
                        exit_code = ERROR_FLASH_OPERATION_FAILED;
@@ -1471,20 +1549,30 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address,
 
 int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
 {
+       int retval;
        cfi_flash_bank_t *cfi_info = bank->driver_priv;
        target_t *target = bank->target;
        u8 command[8];
 
        cfi_intel_clear_status_register(bank);
        cfi_command(bank, 0x40, command);
-       target->type->write_memory(target, address, bank->bus_width, 1, command);
+       if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
 
-       target->type->write_memory(target, address, bank->bus_width, 1, word);
+       if((retval = target->type->write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK)
+       {
+               return retval;
+       }
 
        if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != 0x80)
        {
                cfi_command(bank, 0xff, command);
-               target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
 
                LOG_ERROR("couldn't write word at base 0x%x, address %x", bank->base, address);
                return ERROR_FLASH_OPERATION_FAILED;
@@ -1495,6 +1583,7 @@ int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
 
 int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address)
 {
+       int retval;
        cfi_flash_bank_t *cfi_info = bank->driver_priv;
        target_t *target = bank->target;
        u8 command[8];
@@ -1532,11 +1621,17 @@ int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u3
 
        /* Initiate buffer operation _*/
        cfi_command(bank, 0xE8, command);
-       target->type->write_memory(target, address, bank->bus_width, 1, command);
+       if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
        if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->buf_write_timeout_max)) != 0x80)
        {
                cfi_command(bank, 0xff, command);
-               target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
 
                LOG_ERROR("couldn't start buffer write operation at base 0x%x, address %x", bank->base, address);
                return ERROR_FLASH_OPERATION_FAILED;
@@ -1544,17 +1639,29 @@ int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u3
 
        /* Write buffer wordcount-1 and data words */
        cfi_command(bank, bufferwsize-1, command);
-       target->type->write_memory(target, address, bank->bus_width, 1, command);
+       if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
 
-       target->type->write_memory(target, address, bank->bus_width, bufferwsize, word);
+       if((retval = target->type->write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK)
+       {
+               return retval;
+       }
 
        /* Commit write operation */
        cfi_command(bank, 0xd0, command);
-       target->type->write_memory(target, address, bank->bus_width, 1, command);
+       if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
        if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->buf_write_timeout_max)) != 0x80)
        {
                cfi_command(bank, 0xff, command);
-               target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
 
                LOG_ERROR("Buffer write at base 0x%x, address %x failed.", bank->base, address);
                return ERROR_FLASH_OPERATION_FAILED;
@@ -1565,26 +1672,42 @@ int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u3
 
 int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
 {
+       int retval;
        cfi_flash_bank_t *cfi_info = bank->driver_priv;
        cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
        target_t *target = bank->target;
        u8 command[8];
 
        cfi_command(bank, 0xaa, command);
-       target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command);
+       if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
 
        cfi_command(bank, 0x55, command);
-       target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command);
+       if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
 
        cfi_command(bank, 0xa0, command);
-       target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command);
+       if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
 
-       target->type->write_memory(target, address, bank->bus_width, 1, word);
+       if((retval = target->type->write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK)
+       {
+               return retval;
+       }
 
        if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != ERROR_OK)
        {
                cfi_command(bank, 0xf0, command);
-               target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
 
                LOG_ERROR("couldn't write word at base 0x%x, address %x", bank->base, address);
                return ERROR_FLASH_OPERATION_FAILED;
@@ -1593,6 +1716,96 @@ int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
        return ERROR_OK;
 }
 
+int cfi_spansion_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 address)
+{
+       int retval;
+       cfi_flash_bank_t *cfi_info = bank->driver_priv;
+       target_t *target = bank->target;
+       u8 command[8];
+       cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
+
+       /* Calculate buffer size and boundary mask */
+       u32 buffersize = 1UL << cfi_info->max_buf_write_size;
+       u32 buffermask = buffersize-1;
+       u32 bufferwsize;
+
+       /* Check for valid range */
+       if (address & buffermask)
+       {
+               LOG_ERROR("Write address at base 0x%x, address %x not aligned to 2^%d boundary", bank->base, address, cfi_info->max_buf_write_size);
+               return ERROR_FLASH_OPERATION_FAILED;
+       }
+       switch(bank->chip_width)
+       {
+       case 4 : bufferwsize = buffersize / 4; break;
+       case 2 : bufferwsize = buffersize / 2; break;
+       case 1 : bufferwsize = buffersize; break;
+       default:
+               LOG_ERROR("Unsupported chip width %d", bank->chip_width);
+               return ERROR_FLASH_OPERATION_FAILED;
+       }
+
+       /* Check for valid size */
+       if (wordcount > bufferwsize)
+       {
+               LOG_ERROR("Number of data words %d exceeds available buffersize %d", wordcount, buffersize);
+               return ERROR_FLASH_OPERATION_FAILED;
+       }
+
+       // Unlock
+       cfi_command(bank, 0xaa, command);
+       if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
+
+       cfi_command(bank, 0x55, command);
+       if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
+
+       // Buffer load command
+       cfi_command(bank, 0x25, command);
+       if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
+
+       /* Write buffer wordcount-1 and data words */
+       cfi_command(bank, bufferwsize-1, command);
+       if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
+
+       if((retval = target->type->write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK)
+       {
+               return retval;
+       }
+
+       /* Commit write operation */
+       cfi_command(bank, 0x29, command);
+       if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
+
+       if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != ERROR_OK)
+       {
+               cfi_command(bank, 0xf0, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
+
+               LOG_ERROR("couldn't write block at base 0x%x, address %x, size %x", bank->base, address, bufferwsize);
+               return ERROR_FLASH_OPERATION_FAILED;
+       }
+
+       return ERROR_OK;
+}
+
 int cfi_write_word(struct flash_bank_s *bank, u8 *word, u32 address)
 {
        cfi_flash_bank_t *cfi_info = bank->driver_priv;
@@ -1625,8 +1838,7 @@ int cfi_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 addr
                        return cfi_intel_write_words(bank, word, wordcount, address);
                        break;
                case 2:
-                       /* return cfi_spansion_write_words(bank, word, address); */
-                       LOG_ERROR("cfi primary command set %i unimplemented - FIXME", cfi_info->pri_id);
+                       return cfi_spansion_write_words(bank, word, wordcount, address); 
                        break;
                default:
                        LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
@@ -1649,7 +1861,10 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
        int retval;
 
        if (bank->target->state != TARGET_HALTED)
+       {
+               LOG_ERROR("Target not halted");
                return ERROR_TARGET_NOT_HALTED;
+       }
 
        if (offset + count > bank->size)
                return ERROR_FLASH_DST_OUT_OF_BANK;
@@ -1671,7 +1886,10 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
                for (i = 0; i < align; ++i, ++copy_p)
                {
                        u8 byte;
-                       target->type->read_memory(target, copy_p, 1, 1, &byte);
+                       if((retval = target->type->read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
+                       {
+                               return retval;
+                       }
                        cfi_add_byte(bank, current_word, byte);
                }
 
@@ -1687,7 +1905,10 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
                for (; (count == 0) && (i < bank->bus_width); ++i, ++copy_p)
                {
                        u8 byte;
-                       target->type->read_memory(target, copy_p, 1, 1, &byte);
+                       if((retval = target->type->read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
+                       {
+                               return retval;
+                       }
                        cfi_add_byte(bank, current_word, byte);
                }
 
@@ -1785,9 +2006,15 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
 
        /* return to read array mode, so we can read from flash again for padding */
        cfi_command(bank, 0xf0, current_word);
-       target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word);
+       if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK)
+       {
+               return retval;
+       }
        cfi_command(bank, 0xff, current_word);
-       target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word);
+       if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK)
+       {
+               return retval;
+       }
 
        /* handle unaligned tail bytes */
        if (count > 0)
@@ -1806,7 +2033,10 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
                for (; i < bank->bus_width; ++i, ++copy_p)
                {
                        u8 byte;
-                       target->type->read_memory(target, copy_p, 1, 1, &byte);
+                       if((retval = target->type->read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
+                       {
+                               return retval;
+                       }
                        cfi_add_byte(bank, current_word, byte);
                }
                retval = cfi_write_word(bank, current_word, write_p);
@@ -1816,11 +2046,12 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
 
        /* return to read array mode */
        cfi_command(bank, 0xf0, current_word);
-       target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word);
+       if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK)
+       {
+               return retval;
+       }
        cfi_command(bank, 0xff, current_word);
-       target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word);
-
-       return ERROR_OK;
+       return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word);
 }
 
 void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *bank, void *param)
@@ -1874,9 +2105,11 @@ int cfi_probe(struct flash_bank_s *bank)
        u32 offset = 0;
        u32 unlock1 = 0x555;
        u32 unlock2 = 0x2aa;
+       int retval;
 
        if (bank->target->state != TARGET_HALTED)
        {
+               LOG_ERROR("Target not halted");
                return ERROR_TARGET_NOT_HALTED;
        }
 
@@ -1893,31 +2126,58 @@ int cfi_probe(struct flash_bank_s *bank)
 
        /* switch to read identifier codes mode ("AUTOSELECT") */
        cfi_command(bank, 0xaa, command);
-       target->type->write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command);
+       if((retval = target->type->write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
        cfi_command(bank, 0x55, command);
-       target->type->write_memory(target, flash_address(bank, 0, unlock2), bank->bus_width, 1, command);
+       if((retval = target->type->write_memory(target, flash_address(bank, 0, unlock2), bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
        cfi_command(bank, 0x90, command);
-       target->type->write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command);
+       if((retval = target->type->write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
 
        if (bank->chip_width == 1)
        {
                u8 manufacturer, device_id;
-               target_read_u8(target, bank->base + 0x0, &manufacturer);
-               target_read_u8(target, bank->base + 0x1, &device_id);
+               if((retval = target_read_u8(target, bank->base + 0x0, &manufacturer)) != ERROR_OK)
+               {
+                       return retval;
+               }
+               if((retval = target_read_u8(target, bank->base + 0x1, &device_id)) != ERROR_OK)
+               {
+                       return retval;
+               }
                cfi_info->manufacturer = manufacturer;
                cfi_info->device_id = device_id;
        }
        else if (bank->chip_width == 2)
        {
-               target_read_u16(target, bank->base + 0x0, &cfi_info->manufacturer);
-               target_read_u16(target, bank->base + 0x2, &cfi_info->device_id);
+               if((retval = target_read_u16(target, bank->base + 0x0, &cfi_info->manufacturer)) != ERROR_OK)
+               {
+                       return retval;
+               }
+               if((retval = target_read_u16(target, bank->base + 0x2, &cfi_info->device_id)) != ERROR_OK)
+               {
+                       return retval;
+               }
        }
 
        /* switch back to read array mode */
        cfi_command(bank, 0xf0, command);
-       target->type->write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command);
+       if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
        cfi_command(bank, 0xff, command);
-       target->type->write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command);
+       if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
 
        cfi_fixup(bank, cfi_jedec_fixups);
 
@@ -1934,7 +2194,10 @@ int cfi_probe(struct flash_bank_s *bank)
                 * SST flashes clearly violate this, and we will consider them incompatbile for now
                 */
                cfi_command(bank, 0x98, command);
-               target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
 
                cfi_info->qry[0] = cfi_query_u8(bank, 0, 0x10);
                cfi_info->qry[1] = cfi_query_u8(bank, 0, 0x11);
@@ -1945,9 +2208,15 @@ int cfi_probe(struct flash_bank_s *bank)
                if ((cfi_info->qry[0] != 'Q') || (cfi_info->qry[1] != 'R') || (cfi_info->qry[2] != 'Y'))
                {
                        cfi_command(bank, 0xf0, command);
-                       target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
+                       if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+                       {
+                               return retval;
+                       }
                        cfi_command(bank, 0xff, command);
-                       target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
+                       if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+                       {
+                               return retval;
+                       }
                        LOG_ERROR("Could not probe bank");
                        return ERROR_FLASH_BANK_INVALID;
                }
@@ -2033,9 +2302,15 @@ int cfi_probe(struct flash_bank_s *bank)
                 * we use both reset commands, as some Intel flashes fail to recognize the 0xF0 command
                 */
                cfi_command(bank, 0xf0, command);
-               target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
                cfi_command(bank, 0xff, command);
-               target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
+               if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+               {
+                       return retval;
+               }
        }
 
        /* apply fixups depending on the primary command set */
@@ -2107,6 +2382,7 @@ int cfi_auto_probe(struct flash_bank_s *bank)
 
 int cfi_intel_protect_check(struct flash_bank_s *bank)
 {
+       int retval;
        cfi_flash_bank_t *cfi_info = bank->driver_priv;
        cfi_intel_pri_ext_t *pri_ext = cfi_info->pri_ext;
        target_t *target = bank->target;
@@ -2118,7 +2394,10 @@ int cfi_intel_protect_check(struct flash_bank_s *bank)
                return ERROR_FLASH_OPERATION_FAILED;
 
        cfi_command(bank, 0x90, command);
-       target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command);
+       if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
 
        for (i = 0; i < bank->num_sectors; i++)
        {
@@ -2131,13 +2410,12 @@ int cfi_intel_protect_check(struct flash_bank_s *bank)
        }
 
        cfi_command(bank, 0xff, command);
-       target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
-
-       return ERROR_OK;
+       return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
 }
 
 int cfi_spansion_protect_check(struct flash_bank_s *bank)
 {
+       int retval;
        cfi_flash_bank_t *cfi_info = bank->driver_priv;
        cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
        target_t *target = bank->target;
@@ -2145,13 +2423,22 @@ int cfi_spansion_protect_check(struct flash_bank_s *bank)
        int i;
 
        cfi_command(bank, 0xaa, command);
-       target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command);
+       if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
 
        cfi_command(bank, 0x55, command);
-       target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command);
+       if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
 
        cfi_command(bank, 0x90, command);
-       target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command);
+       if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
+       {
+               return retval;
+       }
 
        for (i = 0; i < bank->num_sectors; i++)
        {
@@ -2164,9 +2451,7 @@ int cfi_spansion_protect_check(struct flash_bank_s *bank)
        }
 
        cfi_command(bank, 0xf0, command);
-       target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
-
-       return ERROR_OK;
+       return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
 }
 
 int cfi_protect_check(struct flash_bank_s *bank)
@@ -2175,6 +2460,7 @@ int cfi_protect_check(struct flash_bank_s *bank)
 
        if (bank->target->state != TARGET_HALTED)
        {
+               LOG_ERROR("Target not halted");
                return ERROR_TARGET_NOT_HALTED;
        }
 
@@ -2254,7 +2540,7 @@ int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size)
                printed = snprintf(buf, buf_size, "size: 0x%x, interface desc: %i, max buffer write size: %x\n",
                                   1 << cfi_info->dev_size,
                                   cfi_info->interface_desc,
-                                  cfi_info->max_buf_write_size);
+                                  1 << cfi_info->max_buf_write_size);
        buf += printed;
        buf_size -= printed;
 
Open On-Chip Debugger

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)