#include "replacements.h"
#include "cfi.h"
+#include "non_cfi.h"
#include "flash.h"
#include "target.h"
int cfi_protect(struct flash_bank_s *bank, int set, int first, int last);
int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
int cfi_probe(struct flash_bank_s *bank);
+int cfi_auto_probe(struct flash_bank_s *bank);
int cfi_erase_check(struct flash_bank_s *bank);
int cfi_protect_check(struct flash_bank_s *bank);
int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size);
.protect = cfi_protect,
.write = cfi_write,
.probe = cfi_probe,
+ .auto_probe = cfi_auto_probe,
.erase_check = cfi_erase_check,
.protect_check = cfi_protect_check,
.info = cfi_info
};
/* CFI fixups foward declarations */
-void cfi_fixup_non_cfi(flash_bank_t *flash, void *param);
void cfi_fixup_0002_erase_regions(flash_bank_t *flash, void *param);
void cfi_fixup_0002_unlock_addresses(flash_bank_t *flash, void *param);
void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *flash, void *param);
{CFI_MFR_SST, 0x00D5, cfi_fixup_non_cfi, NULL},
{CFI_MFR_SST, 0x00D6, cfi_fixup_non_cfi, NULL},
{CFI_MFR_SST, 0x00D7, cfi_fixup_non_cfi, NULL},
+ {CFI_MFR_SST, 0x2780, cfi_fixup_non_cfi, NULL},
{CFI_MFR_ST, 0x00D5, cfi_fixup_non_cfi, NULL},
{CFI_MFR_ST, 0x00D6, cfi_fixup_non_cfi, NULL},
{CFI_MFR_AMD, 0x2223, cfi_fixup_non_cfi, NULL},
{CFI_MFR_SST, 0x00D5, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
{CFI_MFR_SST, 0x00D6, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
{CFI_MFR_SST, 0x00D7, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
+ {CFI_MFR_SST, 0x2780, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
{CFI_MFR_ATMEL, 0x00C8, cfi_fixup_atmel_reversed_erase_regions, NULL},
{CFI_MFR_ANY, CFI_ID_ANY, cfi_fixup_0002_erase_regions, NULL},
{0, 0, NULL, NULL}
}
}
-inline u32 flash_address(flash_bank_t *bank, int sector, u32 offset)
+/* inline u32 flash_address(flash_bank_t *bank, int sector, u32 offset) */
+__inline__ u32 flash_address(flash_bank_t *bank, int sector, u32 offset)
{
/* while the sector list isn't built, only accesses to sector 0 work */
if (sector == 0)
int cfi_register_commands(struct command_context_s *cmd_ctx)
{
- /*command_t *cfi_cmd = */register_command(cmd_ctx, NULL, "cfi", NULL, COMMAND_ANY, NULL);
+ /*command_t *cfi_cmd = */
+ register_command(cmd_ctx, NULL, "cfi", NULL, COMMAND_ANY, "flash bank cfi <base> <size> <chip_width> <bus_width> <targetNum> [jedec_probe/x16_as_x8]");
/*
register_command(cmd_ctx, cfi_cmd, "part_id", cfi_handle_part_id_command, COMMAND_EXEC,
"print part id of cfi flash bank <num>");
}
cfi_info = malloc(sizeof(cfi_flash_bank_t));
+ cfi_info->probed = 0;
bank->driver_priv = cfi_info;
cfi_info->write_algorithm = NULL;
/* FIXME Replace this by a simple memcpy() - still unsure about sideeffects */
static void cfi_add_byte(struct flash_bank_s *bank, u8 *word, u8 byte)
{
- //target_t *target = bank->target;
+ /* target_t *target = bank->target; */
int i;
- // NOTE:
- // The data to flash must not be changed in endian! We write a bytestrem in
- // target byte order already. Only the control and status byte lane of the flash
- // WSM is interpreted by the CPU in different ways, when read a u16 or u32
- // word (data seems to be in the upper or lower byte lane for u16 accesses).
+ /* NOTE:
+ * The data to flash must not be changed in endian! We write a bytestrem in
+ * target byte order already. Only the control and status byte lane of the flash
+ * WSM is interpreted by the CPU in different ways, when read a u16 or u32
+ * word (data seems to be in the upper or lower byte lane for u16 accesses).
+ */
- //if (target->endianness == TARGET_LITTLE_ENDIAN)
- //{
+#if 0
+ if (target->endianness == TARGET_LITTLE_ENDIAN)
+ {
+#endif
/* shift bytes */
for (i = 0; i < bank->bus_width - 1; i++)
word[i] = word[i + 1];
word[bank->bus_width - 1] = byte;
- //}
- //else
- //{
- // /* shift bytes */
- // for (i = bank->bus_width - 1; i > 0; i--)
- // word[i] = word[i - 1];
- // word[0] = byte;
- //}
+#if 0
+ }
+ else
+ {
+ /* shift bytes */
+ for (i = bank->bus_width - 1; i > 0; i--)
+ word[i] = word[i - 1];
+ word[0] = byte;
+ }
+#endif
}
/* Convert code image to target endian */
cfi_intel_clear_status_register(bank);
ERROR("Execution of flash algorythm failed. Can't fall back. Please report.");
retval = ERROR_FLASH_OPERATION_FAILED;
- //retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- // FIXME To allow fall back or recovery, we must save the actual status
- // somewhere, so that a higher level code can start recovery.
+ /* retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE; */
+ /* FIXME To allow fall back or recovery, we must save the actual status
+ somewhere, so that a higher level code can start recovery. */
goto cleanup;
}
}
/* allocate working area */
- if (target_alloc_working_area(target, 24 * 4,
- &cfi_info->write_algorithm) != ERROR_OK)
+ retval=target_alloc_working_area(target, 24 * 4,
+ &cfi_info->write_algorithm);
+ if (retval != ERROR_OK)
{
- WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+ return retval;
}
/* write algorithm code to working area */
return cfi_intel_write_words(bank, word, wordcount, address);
break;
case 2:
- //return cfi_spansion_write_words(bank, word, address);
+ /* return cfi_spansion_write_words(bank, word, address); */
ERROR("cfi primary command set %i unimplemented - FIXME", cfi_info->pri_id);
break;
default:
int retval;
if (bank->target->state != TARGET_HALTED)
- {
return ERROR_TARGET_NOT_HALTED;
- }
if (offset + count > bank->size)
return ERROR_FLASH_DST_OUT_OF_BANK;
{
INFO("Programming at %08x, count %08x bytes remaining", write_p, count);
}
+#if 0
+ /* NB! this is broken for spansion! */
if ((count > bufferwsize) && !(write_p & buffermask))
{
retval = cfi_write_words(bank, buffer, bufferwsize, write_p);
count -= buffersize;
}
else
+#endif
{
for (i = 0; i < bank->bus_width; i++)
current_word[i] = 0;
u32 unlock1 = 0x555;
u32 unlock2 = 0x2aa;
+ if (bank->target->state != TARGET_HALTED)
+ {
+ return ERROR_TARGET_NOT_HALTED;
+ }
+
+ cfi_info->probed = 0;
+
/* JEDEC standard JESD21C uses 0x5555 and 0x2aaa as unlock addresses,
* while CFI compatible AMD/Spansion flashes use 0x555 and 0x2aa
*/
}
}
}
+
+ cfi_info->probed = 1;
return ERROR_OK;
}
+int cfi_auto_probe(struct flash_bank_s *bank)
+{
+ cfi_flash_bank_t *cfi_info = bank->driver_priv;
+ if (cfi_info->probed)
+ return ERROR_OK;
+ return cfi_probe(bank);
+}
+
int cfi_erase_check(struct flash_bank_s *bank)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
int i;
int retval;
+ if (bank->target->state != TARGET_HALTED)
+ {
+ return ERROR_TARGET_NOT_HALTED;
+ }
+
if (!cfi_info->erase_check_algorithm)
{
u32 erase_check_code[] =
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
+ if (bank->target->state != TARGET_HALTED)
+ {
+ return ERROR_TARGET_NOT_HALTED;
+ }
+
if (cfi_info->qry[0] != 'Q')
return ERROR_FLASH_BANK_NOT_PROBED;